1 /* 2 * Blink LEDs using a PIC32 microcontroller. 3 * 4 * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software: you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation, either version 3 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "mips.h" 21 #include "pic32.h" 22 23 /* Disable JTAG functionality on pins. */ 24 25 .section .devcfg0, "a" 26 .word 0xfffffffb /* DEVCFG0<2> = JTAGEN = 0 */ 27 28 /* 29 Set the oscillator to be the FRC oscillator with PLL, with peripheral clock 30 divided by 2, and FRCDIV+PLL selected. 31 32 The watchdog timer (FWDTEN) is also disabled. 33 34 The secondary oscillator pin (FSOSCEN) is disabled to avoid pin conflicts with 35 RPB4. 36 */ 37 38 .section .devcfg1, "a" 39 .word 0xff7fdfd9 /* DEVCFG1<23> = FWDTEN = 0; DEVCFG1<13:12> = FPBDIV<1:0> = 1; 40 DEVCFG1<5> = FSOSCEN = 0; DEVCFG1<2:0> = FNOSC<2:0> = 001 */ 41 42 /* 43 Set the FRC oscillator PLL function with an input division of 4, an output 44 division of 2, a multiplication of 24, yielding a multiplication of 3. 45 46 The FRC is apparently at 16MHz and this produces a system clock of 48MHz. 47 48 The peripheral clock frequency (FPB) will be 24MHz given the above DEVCFG1 49 settings. 50 */ 51 52 .section .devcfg2, "a" 53 .word 0xfff9fffb /* DEVCFG2<18:16> = FPLLODIV<2:0> = 001; 54 DEVCFG2<6:4> = FPLLMUL<2:0> = 111; 55 DEVCFG2<2:0> = FPLLIDIV<2:0> = 011 */ 56 57 .text 58 .globl _start 59 60 _start: 61 /* Set pins for output. */ 62 63 jal init_pins 64 nop 65 66 /* Clear output (LED). */ 67 68 la $t0, PORTA 69 li $t1, (1 << 3) /* PORTA<3> = RA3 */ 70 sw $t1, CLR($t0) 71 72 /* Main program. */ 73 main: 74 li $a1, (3 << 24) /* counter ~= 50000000 */ 75 76 /* Monitoring loop. */ 77 loop: 78 addiu $a1, $a1, -1 /* counter -= 1 */ 79 bnez $a1, loop 80 nop 81 82 /* Invert output (LED). */ 83 84 la $t0, PORTA 85 li $t1, (1 << 3) /* PORTA<3> = RA3 */ 86 sw $t1, INV($t0) 87 88 j main 89 nop 90 91 92 93 init_pins: 94 /* DEVCFG0<2> needs setting to 0 before the program is run. */ 95 96 la $v0, CFGCON 97 li $v1, (1 << 3) /* CFGCON<3> = JTAGEN = 0 */ 98 sw $v1, CLR($v0) 99 100 init_outputs: 101 /* Remove analogue features from pins. */ 102 103 la $v0, ANSELA 104 sw $zero, 0($v0) /* ANSELA = 0 */ 105 la $v0, ANSELB 106 sw $zero, 0($v0) /* ANSELB = 0 */ 107 108 /* Set pins as outputs. */ 109 110 la $v0, TRISA 111 sw $zero, 0($v0) 112 la $v0, TRISB 113 sw $zero, 0($v0) 114 115 /* Clear outputs. */ 116 117 la $v0, PORTA 118 sw $zero, 0($v0) 119 la $v0, PORTB 120 sw $zero, 0($v0) 121 122 jr $ra 123 nop