# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1539968136 -7200
# Node ID 56f7040e64c6e6956ef0c55161f1f94104571e05
# Parent  f56fc460bc08d37983c11514ce68311679df0243
Fixed comments, indicating that it is the UART interrupt being handled that
causes the first DMA channel to be enabled.

diff -r f56fc460bc08 -r 56f7040e64c6 main.c
--- a/main.c	Fri Oct 19 18:05:07 2018 +0200
+++ b/main.c	Fri Oct 19 18:55:36 2018 +0200
@@ -68,7 +68,8 @@
     init_dma();
 
     /* Initiate DMA on the Timer2 interrupt. Since the channel is not
-       auto-enabled, it must be explicitly enabled upon completion. */
+       auto-enabled, it must be explicitly enabled elsewhere (when a UART
+       interrupt is handled). */
 
     dma_init(0, 3);
     dma_set_interrupt(0, T2, 1);
@@ -110,7 +111,8 @@
     oc_init_interrupt(1, 1, 3);
     oc_on(1);
 
-    /* Set UART interrupt priority above CPU priority to process events. */
+    /* Set UART interrupt priority above CPU priority to process events and to
+       enable the first DMA channel. */
 
     uart_init(1, 115200);
     uart_init_interrupt(1, UxRIF, 7, 3);