1 /* 2 * Access various peripherals on a board using the JZ4780. 3 * 4 * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S 23 audio over HDMI or via its internal codec to the headphone socket. */ 24 25 #include <l4/devices/aic-x1600.h> 26 27 #include <l4/devices/cpm-jz4780.h> 28 #include <l4/devices/dma-jz4780.h> 29 #include <l4/devices/gpio-jz4780.h> 30 #include <l4/devices/i2c-jz4780.h> 31 #include <l4/devices/msc-jz4780.h> 32 #include <l4/devices/rtc-jz4780.h> 33 34 /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary 35 header provides pins like GPC. */ 36 37 #include <l4/devices/spi-gpio.h> 38 #include <l4/devices/spi-hybrid.h> 39 #include <l4/devices/spi-jz4780.h> 40 #include <l4/devices/tcu-jz4780.h> 41 #include "common.h" 42 43 44 45 /* AIC adapter functions. */ 46 47 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 48 { 49 return x1600_aic_init(aic_start, start, end, cpm); 50 } 51 52 void *aic_get_channel(void *aic, int num, void *channel) 53 { 54 return x1600_aic_get_channel(aic, num, channel); 55 } 56 57 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 58 uint32_t count, uint32_t sample_rate, 59 uint8_t sample_size) 60 { 61 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 62 } 63 64 65 66 /* CPM adapter functions. */ 67 68 void *cpm_init(l4_addr_t cpm_base) 69 { 70 return jz4780_cpm_init(cpm_base); 71 } 72 73 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 74 { 75 return jz4780_cpm_clock_type(cpm, clock); 76 } 77 78 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 79 { 80 return jz4780_cpm_have_clock(cpm, clock); 81 } 82 83 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 84 { 85 jz4780_cpm_start_clock(cpm, clock); 86 } 87 88 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 89 { 90 jz4780_cpm_stop_clock(cpm, clock); 91 } 92 93 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 94 uint32_t parameters[]) 95 { 96 return jz4780_cpm_get_parameters(cpm, clock, parameters); 97 } 98 99 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 100 int num_parameters, uint32_t parameters[]) 101 { 102 return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters); 103 } 104 105 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 106 { 107 return jz4780_cpm_get_source(cpm, clock); 108 } 109 110 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 111 { 112 jz4780_cpm_set_source(cpm, clock, source); 113 } 114 115 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 116 { 117 return jz4780_cpm_get_source_clock(cpm, clock); 118 } 119 120 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 121 { 122 jz4780_cpm_set_source_clock(cpm, clock, source); 123 } 124 125 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 126 { 127 return jz4780_cpm_get_source_frequency(cpm, clock); 128 } 129 130 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 131 { 132 return jz4780_cpm_get_frequency(cpm, clock); 133 } 134 135 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 136 { 137 return jz4780_cpm_set_frequency(cpm, clock, frequency); 138 } 139 140 141 142 /* DMA adapter functions. */ 143 144 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 145 { 146 return jz4780_dma_init(start, end, cpm); 147 } 148 149 void dma_disable(void *dma_chip) 150 { 151 jz4780_dma_disable(dma_chip); 152 } 153 154 void dma_enable(void *dma_chip) 155 { 156 jz4780_dma_enable(dma_chip); 157 } 158 159 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 160 { 161 return jz4780_dma_get_channel(dma, channel, irq); 162 } 163 164 unsigned int dma_transfer(void *dma_channel, 165 uint32_t source, uint32_t destination, 166 unsigned int count, 167 int source_increment, int destination_increment, 168 uint8_t source_width, uint8_t destination_width, 169 uint8_t transfer_unit_size, 170 int type) 171 { 172 return jz4780_dma_transfer(dma_channel, source, destination, count, 173 source_increment, destination_increment, 174 source_width, destination_width, 175 transfer_unit_size, type); 176 } 177 178 unsigned int dma_wait(void *dma_channel) 179 { 180 return jz4780_dma_wait(dma_channel); 181 } 182 183 184 185 /* GPIO adapter functions. */ 186 187 void *gpio_init(l4_addr_t start, uint8_t port_number) 188 { 189 return jz4780_gpio_init(start, port_number); 190 } 191 192 void *gpio_init_shadow(l4_addr_t start, uint8_t port_number) 193 { 194 return jz4780_gpio_init(start, port_number); 195 } 196 197 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 198 { 199 jz4780_gpio_setup(gpio, pin, mode, value); 200 } 201 202 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 203 { 204 jz4780_gpio_config_pull(gpio, pin, mode); 205 } 206 207 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 208 { 209 jz4780_gpio_config_pad(gpio, pin, func, value); 210 } 211 212 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 213 { 214 jz4780_gpio_config_get(gpio, pin, reg, value); 215 } 216 217 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 218 { 219 jz4780_gpio_config_pad_get(gpio, pin, func, value); 220 } 221 222 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 223 { 224 jz4780_gpio_multi_setup(gpio, mask, mode, outvalues); 225 } 226 227 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 228 { 229 jz4780_gpio_multi_config_pad(gpio, mask, func, value); 230 } 231 232 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 233 { 234 jz4780_gpio_multi_set(gpio, mask, data); 235 } 236 237 unsigned gpio_multi_get(void *gpio, unsigned offset) 238 { 239 return jz4780_gpio_multi_get(gpio, offset); 240 } 241 242 int gpio_get(void *gpio, unsigned pin) 243 { 244 return jz4780_gpio_get(gpio, pin); 245 } 246 247 void gpio_set(void *gpio, unsigned pin, int value) 248 { 249 jz4780_gpio_set(gpio, pin, value); 250 } 251 252 void *gpio_get_irq(void *gpio, unsigned pin) 253 { 254 return jz4780_gpio_get_irq(gpio, pin); 255 } 256 257 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 258 { 259 return jz4780_gpio_irq_set_mode(gpio_irq, mode); 260 } 261 262 263 264 /* I2C adapter functions. */ 265 266 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 267 uint32_t frequency) 268 { 269 return jz4780_i2c_init(start, end, cpm, frequency); 270 } 271 272 void *i2c_get_channel(void *i2c, uint8_t channel) 273 { 274 return jz4780_i2c_get_channel(i2c, channel); 275 } 276 277 uint32_t i2c_get_frequency(void *i2c_channel) 278 { 279 return jz4780_i2c_get_frequency(i2c_channel); 280 } 281 282 void i2c_set_target(void *i2c_channel, uint8_t addr) 283 { 284 return jz4780_i2c_set_target(i2c_channel, addr); 285 } 286 287 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 288 int stop) 289 { 290 jz4780_i2c_start_read(i2c_channel, buf, total, stop); 291 } 292 293 void i2c_read(void *i2c_channel) 294 { 295 jz4780_i2c_read(i2c_channel); 296 } 297 298 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 299 int stop) 300 { 301 jz4780_i2c_start_write(i2c_channel, buf, total, stop); 302 } 303 304 void i2c_write(void *i2c_channel) 305 { 306 jz4780_i2c_write(i2c_channel); 307 } 308 309 int i2c_read_done(void *i2c_channel) 310 { 311 return jz4780_i2c_read_done(i2c_channel); 312 } 313 314 int i2c_write_done(void *i2c_channel) 315 { 316 return jz4780_i2c_write_done(i2c_channel); 317 } 318 319 unsigned int i2c_have_read(void *i2c_channel) 320 { 321 return jz4780_i2c_have_read(i2c_channel); 322 } 323 324 unsigned int i2c_have_written(void *i2c_channel) 325 { 326 return jz4780_i2c_have_written(i2c_channel); 327 } 328 329 int i2c_failed(void *i2c_channel) 330 { 331 return jz4780_i2c_failed(i2c_channel); 332 } 333 334 void i2c_stop(void *i2c_channel) 335 { 336 jz4780_i2c_stop(i2c_channel); 337 } 338 339 340 341 /* MSC adapter functions. */ 342 343 void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end, void *cpm) 344 { 345 return jz4780_msc_init(msc_start, start, end, cpm); 346 } 347 348 void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) 349 { 350 return jz4780_msc_get_channel(msc, channel, irq, dma); 351 } 352 353 struct msc_card *msc_get_cards(void *msc_channel) 354 { 355 return jz4780_msc_get_cards(msc_channel); 356 } 357 358 uint8_t msc_num_cards(void *msc_channel) 359 { 360 return jz4780_msc_num_cards(msc_channel); 361 } 362 363 void msc_enable(void *msc_channel) 364 { 365 jz4780_msc_enable(msc_channel); 366 } 367 368 uint32_t msc_read_blocks(void *msc_channel, uint8_t card, 369 struct dma_region *region, 370 uint32_t block_address, uint32_t block_count) 371 { 372 return jz4780_msc_read_blocks(msc_channel, card, region, block_address, 373 block_count); 374 } 375 376 377 378 /* RTC adapter functions. */ 379 380 void *rtc_init(l4_addr_t start, void *cpm) 381 { 382 return jz4780_rtc_init(start, cpm); 383 } 384 385 enum Clock_identifiers rtc_get_clock(void *rtc) 386 { 387 return jz4780_rtc_get_clock(rtc); 388 } 389 390 void rtc_disable(void *rtc) 391 { 392 jz4780_rtc_disable(rtc); 393 } 394 395 void rtc_enable(void *rtc) 396 { 397 jz4780_rtc_enable(rtc); 398 } 399 400 void rtc_alarm_disable(void *rtc) 401 { 402 jz4780_rtc_alarm_disable(rtc); 403 } 404 405 void rtc_alarm_enable(void *rtc) 406 { 407 jz4780_rtc_alarm_enable(rtc); 408 } 409 410 uint32_t rtc_get_seconds(void *rtc) 411 { 412 return jz4780_rtc_get_seconds(rtc); 413 } 414 415 void rtc_set_seconds(void *rtc, uint32_t seconds) 416 { 417 jz4780_rtc_set_seconds(rtc, seconds); 418 } 419 420 uint32_t rtc_get_alarm_seconds(void *rtc) 421 { 422 return jz4780_rtc_get_alarm_seconds(rtc); 423 } 424 425 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 426 { 427 jz4780_rtc_set_alarm_seconds(rtc, seconds); 428 } 429 430 void rtc_hibernate(void *rtc) 431 { 432 jz4780_rtc_hibernate(rtc); 433 } 434 435 void rtc_power_down(void *rtc) 436 { 437 jz4780_rtc_power_down(rtc); 438 } 439 440 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 441 { 442 jz4780_rtc_set_regulator(rtc, base, adjustment); 443 } 444 445 446 447 /* SPI adapter functions. */ 448 449 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 450 { 451 return jz4780_spi_init(spi_start, start, end, cpm); 452 } 453 454 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 455 void *control_chip, int control_pin, int control_alt_func) 456 { 457 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 458 459 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 460 } 461 462 void *spi_get_channel_gpio(uint64_t frequency, 463 void *clock_chip, int clock_pin, 464 void *data_chip, int data_pin, 465 void *enable_chip, int enable_pin, 466 void *control_chip, int control_pin) 467 { 468 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 469 data_pin, enable_chip, enable_pin, control_chip, 470 control_pin); 471 472 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 473 } 474 475 void spi_acquire_control(void *channel, int level) 476 { 477 spi_hybrid_acquire_control(channel, level); 478 } 479 480 void spi_release_control(void *channel) 481 { 482 spi_hybrid_release_control(channel); 483 } 484 485 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 486 { 487 spi_hybrid_send(channel, bytes, data); 488 } 489 490 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], 491 uint8_t unit_size, uint8_t char_size, int big_endian) 492 { 493 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 494 } 495 496 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 497 l4re_dma_space_dma_addr_t paddr, uint32_t count, 498 uint8_t unit_size, uint8_t char_size, 499 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 500 { 501 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 502 char_size, desc_vaddr, desc_paddr); 503 } 504 505 506 507 /* TCU adapter functions. */ 508 509 void *tcu_init(l4_addr_t start, l4_addr_t end) 510 { 511 return jz4780_tcu_init(start, end); 512 } 513 514 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 515 { 516 return jz4780_tcu_get_channel(tcu, channel, irq); 517 } 518 519 void tcu_disable(void *tcu_channel) 520 { 521 jz4780_tcu_disable(tcu_channel); 522 } 523 524 void tcu_enable(void *tcu_channel) 525 { 526 jz4780_tcu_enable(tcu_channel); 527 } 528 529 int tcu_is_enabled(void *tcu_channel) 530 { 531 return jz4780_tcu_is_enabled(tcu_channel); 532 } 533 534 uint8_t tcu_get_clock(void *tcu_channel) 535 { 536 return jz4780_tcu_get_clock(tcu_channel); 537 } 538 539 void tcu_set_clock(void *tcu_channel, uint8_t clock) 540 { 541 jz4780_tcu_set_clock(tcu_channel, clock); 542 } 543 544 uint32_t tcu_get_prescale(void *tcu_channel) 545 { 546 return jz4780_tcu_get_prescale(tcu_channel); 547 } 548 549 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 550 { 551 jz4780_tcu_set_prescale(tcu_channel, prescale); 552 } 553 554 uint32_t tcu_get_counter(void *tcu_channel) 555 { 556 return jz4780_tcu_get_counter(tcu_channel); 557 } 558 559 void tcu_set_counter(void *tcu_channel, uint32_t value) 560 { 561 jz4780_tcu_set_counter(tcu_channel, value); 562 } 563 564 uint8_t tcu_get_count_mode(void *tcu_channel) 565 { 566 return jz4780_tcu_get_count_mode(tcu_channel); 567 } 568 569 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 570 { 571 jz4780_tcu_set_count_mode(tcu_channel, mode); 572 } 573 574 uint32_t tcu_get_full_data_value(void *tcu_channel) 575 { 576 return jz4780_tcu_get_full_data_value(tcu_channel); 577 } 578 579 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 580 { 581 jz4780_tcu_set_full_data_value(tcu_channel, value); 582 } 583 584 uint32_t tcu_get_half_data_value(void *tcu_channel) 585 { 586 return jz4780_tcu_get_half_data_value(tcu_channel); 587 } 588 589 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 590 { 591 jz4780_tcu_set_half_data_value(tcu_channel, value); 592 } 593 594 int tcu_get_full_data_mask(void *tcu_channel) 595 { 596 return jz4780_tcu_get_full_data_mask(tcu_channel); 597 } 598 599 void tcu_set_full_data_mask(void *tcu_channel, int masked) 600 { 601 jz4780_tcu_set_full_data_mask(tcu_channel, masked); 602 } 603 604 int tcu_get_half_data_mask(void *tcu_channel) 605 { 606 return jz4780_tcu_get_half_data_mask(tcu_channel); 607 } 608 609 void tcu_set_half_data_mask(void *tcu_channel, int masked) 610 { 611 jz4780_tcu_set_half_data_mask(tcu_channel, masked); 612 } 613 614 int tcu_have_interrupt(void *tcu_channel) 615 { 616 return jz4780_tcu_have_interrupt(tcu_channel); 617 } 618 619 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 620 { 621 return jz4780_tcu_wait_for_irq(tcu_channel, timeout); 622 } 623 624 625 626 /* Memory regions. */ 627 628 const char *io_memory_regions[] = { 629 [AIC] = "jz4780-aic", 630 [CPM] = "jz4780-cpm", 631 [DMA] = "jz4780-dma", 632 [GPIO] = "jz4780-gpio", 633 [I2C] = "jz4780-i2c", 634 [MSC] = "jz4780-msc", 635 [RTC] = "jz4780-rtc", 636 [SSI] = "jz4780-ssi", 637 [TCU] = "jz4780-tcu", 638 }; 639 640 641 642 /* AIC definitions. */ 643 644 void *aic_channels[] = {NULL, NULL}; 645 646 const unsigned int num_aic_channels = 2; 647 648 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 649 650 651 652 /* CPM definitions. */ 653 654 struct clock_info clocks[] = { 655 {"ext", Clock_external, "EXCLK"}, 656 {"ext_512", Clock_external_div, "EXCLK/512"}, 657 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 658 {"plla", Clock_pll_A, "PLL A"}, 659 {"plle", Clock_pll_E, "PLL E"}, 660 {"pllm", Clock_pll_M, "PLL M"}, 661 {"pllv", Clock_pll_V, "PLL V"}, 662 {"main", Clock_main, "Main (SCLK_A)"}, 663 {"cpu", Clock_cpu, "CPU"}, 664 {"l2c", Clock_l2cache, "L2 cache"}, 665 {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, 666 {"ahb0", Clock_hclock0, "AHB0"}, 667 {"ahb2", Clock_hclock2, "AHB2"}, 668 {"apb", Clock_pclock, "APB"}, 669 {"dma", Clock_dma, "DMA"}, 670 {"hdmi", Clock_lcd, "HDMI"}, 671 {"lcd", Clock_lcd, "LCD"}, 672 {"lcd0", Clock_lcd_pixel0, "LCD0 pixel"}, 673 {"lcd1", Clock_lcd_pixel1, "LCD1 pixel"}, 674 {"msc", Clock_msc, "MSC"}, 675 {"msc0", Clock_msc0, "MSC0"}, 676 {"msc1", Clock_msc1, "MSC1"}, 677 {"msc2", Clock_msc1, "MSC2"}, 678 {"otg0", Clock_otg0, "USB OTG0"}, 679 {"otg1", Clock_otg1, "USB OTG1"}, 680 {"i2c0", Clock_i2c0, "I2C0"}, 681 {"i2c1", Clock_i2c1, "I2C1"}, 682 {"i2c2", Clock_i2c2, "I2C2"}, 683 {"i2c3", Clock_i2c3, "I2C3"}, 684 {"i2c4", Clock_i2c4, "I2C4"}, 685 {"i2s0", Clock_i2s0, "I2S0"}, 686 {"i2s1", Clock_i2s1, "I2S1"}, 687 {"pcm", Clock_pcm, "PCM"}, 688 {"rtc", Clock_rtc, "RTC"}, 689 {"ssi", Clock_ssi, "SSI"}, 690 {"ssi0", Clock_ssi0, "SSI0"}, 691 {"ssi1", Clock_ssi1, "SSI1"}, 692 {"uart0", Clock_uart0, "UART0"}, 693 {"uart1", Clock_uart1, "UART1"}, 694 {"uart2", Clock_uart2, "UART2"}, 695 {"uart3", Clock_uart3, "UART3"}, 696 {"uart4", Clock_uart4, "UART4"}, 697 {"usbphy", Clock_usb_phy, "USB PHY"}, 698 {NULL, Clock_none, NULL}, 699 }; 700 701 702 703 /* DMA definitions. */ 704 705 void *dma_channels[32] = {NULL}; 706 707 const unsigned int num_dma_channels = 32; 708 709 struct dma_region dma_regions[8]; 710 711 const unsigned int num_dma_regions = 8; 712 713 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 714 715 716 717 /* GPIO definitions. */ 718 719 const unsigned int num_gpio_ports = 6; 720 721 const char gpio_port_labels[] = "ABCDEF"; 722 723 724 725 /* I2C definitions. */ 726 727 void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL}; 728 729 const unsigned int num_i2c_channels = 5; 730 731 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; 732 733 734 735 /* MSC definitions. */ 736 737 void *msc_channels[] = {NULL, NULL, NULL}; 738 739 const unsigned int num_msc_channels = 3; 740 741 l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; 742 743 744 745 /* SPI definitions. */ 746 747 void *spi_channels[] = {NULL, NULL}; 748 749 const unsigned int num_spi_channels = 2; 750 751 752 753 /* TCU definitions. */ 754 755 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 756 757 const unsigned int num_tcu_channels = 8; 758 const unsigned int tcu_irq_num = 1; 759 760 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;