1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/pkg/devices/lib/rtc/include/rtc-defs.h Sat May 04 01:31:54 2024 +0200
1.3 @@ -0,0 +1,125 @@
1.4 +/*
1.5 + * RTC (real-time clock) support for various devices.
1.6 + *
1.7 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
1.8 + *
1.9 + * This program is free software; you can redistribute it and/or
1.10 + * modify it under the terms of the GNU General Public License as
1.11 + * published by the Free Software Foundation; either version 2 of
1.12 + * the License, or (at your option) any later version.
1.13 + *
1.14 + * This program is distributed in the hope that it will be useful,
1.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.17 + * GNU General Public License for more details.
1.18 + *
1.19 + * You should have received a copy of the GNU General Public License
1.20 + * along with this program; if not, write to the Free Software
1.21 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
1.22 + * Boston, MA 02110-1301, USA
1.23 + */
1.24 +
1.25 +#pragma once
1.26 +
1.27 +#ifdef __cplusplus
1.28 +
1.29 +// Register locations.
1.30 +
1.31 +enum Regs : unsigned
1.32 +{
1.33 + Rtc_control = 0x000, // RTCCR
1.34 + Rtc_seconds = 0x004, // RTCSR
1.35 + Rtc_alarm_seconds = 0x008, // RTCSAR
1.36 + Rtc_regulator = 0x00c, // RTCGR
1.37 +
1.38 + Hibernate_control = 0x020, // HCR
1.39 + Hibernate_wakeup_filter_counter = 0x024, // HWFCR
1.40 + Hibernate_reset_counter = 0x028, // HRCR
1.41 + Hibernate_wakeup_control = 0x02c, // HWCR
1.42 + Hibernate_wakeup_status = 0x030, // HWRSR
1.43 + Hibernate_scratch_pattern = 0x034, // HSPR
1.44 + Hibernate_write_enable_pattern = 0x03c, // WENR
1.45 + Hibernate_wakeup_pin_configure = 0x048, // WKUPPINCR
1.46 +};
1.47 +
1.48 +// Field definitions.
1.49 +
1.50 +enum Control_bits : unsigned
1.51 +{
1.52 + Control_write_ready = 0x80, // WRDY
1.53 + Control_1Hz = 0x40, // 1HZ
1.54 + Control_1Hz_irq_enable = 0x20, // 1HZIE
1.55 + Control_alarm = 0x10, // AF
1.56 + Control_alarm_irq_enable = 0x08, // AIE
1.57 + Control_alarm_enable = 0x04, // AE
1.58 + Control_external_divided = 0x02, // SELEXC (JZ4780)
1.59 + Control_rtc_enable = 0x01, // RTCE
1.60 +};
1.61 +
1.62 +enum Regulator_bits : unsigned
1.63 +{
1.64 + Regulator_lock = 0x80000000, // LOCK
1.65 + Regulator_adjust_count_mask = 0x03ff0000, // ADJC
1.66 + Regulator_1Hz_cycle_count_mask = 0x0000ffff, // NC1HZ
1.67 +};
1.68 +
1.69 +enum Regulator_limits : unsigned
1.70 +{
1.71 + Regulator_adjust_count_limit = 0x03ff, // ADJC
1.72 + Regulator_1Hz_cycle_count_limit = 0xffff, // NC1HZ
1.73 +};
1.74 +
1.75 +enum Regulator_shifts : unsigned
1.76 +{
1.77 + Regulator_adjust_count_shift = 16, // ADJC
1.78 + Regulator_1Hz_cycle_count_shift = 0, // NC1HZ
1.79 +};
1.80 +
1.81 +enum Hibernate_control_bits : unsigned
1.82 +{
1.83 + Hibernate_power_down = 0x01, // PD
1.84 +};
1.85 +
1.86 +enum Hibernate_wakeup_filter_counter_bits : unsigned
1.87 +{
1.88 + Wakeup_minimum_time_mask = 0xffe0, // HWFCR
1.89 +};
1.90 +
1.91 +enum Hibernate_reset_counter_bits : unsigned
1.92 +{
1.93 + Reset_assert_time_mask = 0x7800, // HRCR
1.94 +};
1.95 +
1.96 +enum Hibernate_wakeup_control_bits : unsigned
1.97 +{
1.98 + Power_detect_enable_mask = 0xfffffff8, // EPDET
1.99 + Rtc_alarm_wakeup_enable = 0x00000001, // EALM
1.100 +};
1.101 +
1.102 +enum Hibernate_wakeup_status_bits : unsigned
1.103 +{
1.104 + Accident_power_down = 0x0100, // APD
1.105 + Hibernate_reset = 0x0020, // HR
1.106 + Pad_pin_reset = 0x0010, // PPR
1.107 + Wakeup_pin_status = 0x0002, // PIN
1.108 + Rtc_alarm_status = 0x0001, // ALM
1.109 +};
1.110 +
1.111 +enum Hibernate_write_enable_pattern_bits : unsigned
1.112 +{
1.113 + Write_enable_status = 0x80000000, // WEN
1.114 + Write_enable_pattern_mask = 0x0000ffff, // WENPAT
1.115 + Write_enable_pattern = 0x0000a55a, // WENPAT
1.116 +};
1.117 +
1.118 +enum Hibernate_wakeup_pin_configure_bits : unsigned
1.119 +{
1.120 + Rtc_oscillator_test_enable = 0x00080000, // OSC_TE
1.121 + Oscillator_xtclk_rtclk = 0x00040000, // OSC_RETON
1.122 + Oscillator_xtclk_low = 0x00000000, // OSC_RETON
1.123 + Rtc_internal_oscillator_enable = 0x00010000, // OSC_EN
1.124 + Wakeup_pin_extended_press_mask = 0x000000f0, // P_JUD_LEN
1.125 + Wakeup_pin_extended_press_enable = 0x0000000f, // P_RST_LEN
1.126 +};
1.127 +
1.128 +#endif /* __cplusplus */
2.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
2.2 +++ b/pkg/devices/lib/rtc/include/rtc-generic.h Sat May 04 01:31:54 2024 +0200
2.3 @@ -0,0 +1,88 @@
2.4 +/*
2.5 + * RTC (real-time clock) support for various devices.
2.6 + *
2.7 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
2.8 + *
2.9 + * This program is free software; you can redistribute it and/or
2.10 + * modify it under the terms of the GNU General Public License as
2.11 + * published by the Free Software Foundation; either version 2 of
2.12 + * the License, or (at your option) any later version.
2.13 + *
2.14 + * This program is distributed in the hope that it will be useful,
2.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2.17 + * GNU General Public License for more details.
2.18 + *
2.19 + * You should have received a copy of the GNU General Public License
2.20 + * along with this program; if not, write to the Free Software
2.21 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
2.22 + * Boston, MA 02110-1301, USA
2.23 + */
2.24 +
2.25 +#pragma once
2.26 +
2.27 +#include <l4/sys/types.h>
2.28 +#include <stdint.h>
2.29 +
2.30 +
2.31 +
2.32 +#ifdef __cplusplus
2.33 +
2.34 +#include <l4/devices/cpm-generic.h>
2.35 +#include <l4/devices/hw_register_block.h>
2.36 +#include <l4/devices/clocks.h>
2.37 +
2.38 +class Rtc_chip
2.39 +{
2.40 +protected:
2.41 + Cpm_chip *_cpm;
2.42 + Hw::Register_block<32> _regs;
2.43 +
2.44 + /* Utility methods. */
2.45 +
2.46 + uint32_t read_checked(unsigned reg);
2.47 + void wait();
2.48 + void write_enable();
2.49 + void _power_down();
2.50 +
2.51 + /* Device-specific methods. */
2.52 +
2.53 + virtual void _pre_power_down();
2.54 +
2.55 +public:
2.56 + explicit Rtc_chip(l4_addr_t addr, Cpm_chip *cpm);
2.57 +
2.58 + virtual enum Clock_identifiers get_clock();
2.59 +
2.60 + void disable();
2.61 +
2.62 + void enable();
2.63 +
2.64 + void alarm_disable();
2.65 +
2.66 + void alarm_enable();
2.67 +
2.68 + void wakeup_alarm_disable();
2.69 +
2.70 + void wakeup_alarm_enable();
2.71 +
2.72 + uint32_t get_seconds();
2.73 +
2.74 + void set_seconds(uint32_t seconds);
2.75 +
2.76 + uint32_t get_alarm_seconds();
2.77 +
2.78 + void set_alarm_seconds(uint32_t seconds);
2.79 +
2.80 + void set_regulator(uint32_t base, uint32_t adjustment);
2.81 +
2.82 + void hibernate();
2.83 +
2.84 + void power_down();
2.85 +};
2.86 +
2.87 +// Generic access to the RTC abstraction.
2.88 +
2.89 +Rtc_chip *new_rtc_chip(const char *name, l4_addr_t start, Cpm_chip *cpm);
2.90 +
2.91 +#endif /* __cplusplus */
3.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
3.2 +++ b/pkg/devices/lib/rtc/include/rtc-jz4780.h Sat May 04 01:31:54 2024 +0200
3.3 @@ -0,0 +1,79 @@
3.4 +/*
3.5 + * RTC (real-time clock) support for the JZ4780.
3.6 + *
3.7 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
3.8 + *
3.9 + * This program is free software; you can redistribute it and/or
3.10 + * modify it under the terms of the GNU General Public License as
3.11 + * published by the Free Software Foundation; either version 2 of
3.12 + * the License, or (at your option) any later version.
3.13 + *
3.14 + * This program is distributed in the hope that it will be useful,
3.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3.17 + * GNU General Public License for more details.
3.18 + *
3.19 + * You should have received a copy of the GNU General Public License
3.20 + * along with this program; if not, write to the Free Software
3.21 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
3.22 + * Boston, MA 02110-1301, USA
3.23 + */
3.24 +
3.25 +#pragma once
3.26 +
3.27 +#include <l4/sys/types.h>
3.28 +#include <stdint.h>
3.29 +
3.30 +
3.31 +
3.32 +#ifdef __cplusplus
3.33 +
3.34 +#include <l4/devices/rtc-generic.h>
3.35 +
3.36 +class Rtc_jz4780_chip : public Rtc_chip
3.37 +{
3.38 +public:
3.39 + explicit Rtc_jz4780_chip(l4_addr_t addr, Cpm_chip *cpm);
3.40 +};
3.41 +
3.42 +Rtc_chip *jz4780_rtc_chip(l4_addr_t rtc_base, Cpm_chip *cpm);
3.43 +
3.44 +#endif /* __cplusplus */
3.45 +
3.46 +
3.47 +
3.48 +/* C language interface. */
3.49 +
3.50 +EXTERN_C_BEGIN
3.51 +
3.52 +void *jz4780_rtc_init(l4_addr_t rtc_base, void *cpm);
3.53 +
3.54 +enum Clock_identifiers jz4780_rtc_get_clock(void *rtc);
3.55 +
3.56 +void jz4780_rtc_disable(void *rtc);
3.57 +
3.58 +void jz4780_rtc_enable(void *rtc);
3.59 +
3.60 +void jz4780_rtc_alarm_disable(void *rtc);
3.61 +
3.62 +void jz4780_rtc_alarm_enable(void *rtc);
3.63 +
3.64 +void jz4780_rtc_wakeup_alarm_disable(void *rtc);
3.65 +
3.66 +void jz4780_rtc_wakeup_alarm_enable(void *rtc);
3.67 +
3.68 +uint32_t jz4780_rtc_get_seconds(void *rtc);
3.69 +
3.70 +void jz4780_rtc_set_seconds(void *rtc, uint32_t seconds);
3.71 +
3.72 +uint32_t jz4780_rtc_get_alarm_seconds(void *rtc);
3.73 +
3.74 +void jz4780_rtc_set_alarm_seconds(void *rtc, uint32_t seconds);
3.75 +
3.76 +void jz4780_rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment);
3.77 +
3.78 +void jz4780_rtc_hibernate(void *rtc);
3.79 +
3.80 +void jz4780_rtc_power_down(void *rtc);
3.81 +
3.82 +EXTERN_C_END
4.1 --- a/pkg/devices/lib/rtc/include/rtc-x1600.h Sat May 04 01:30:06 2024 +0200
4.2 +++ b/pkg/devices/lib/rtc/include/rtc-x1600.h Sat May 04 01:31:54 2024 +0200
4.3 @@ -1,7 +1,7 @@
4.4 /*
4.5 * RTC (real-time clock) support for the X1600.
4.6 *
4.7 - * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk>
4.8 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
4.9 *
4.10 * This program is free software; you can redistribute it and/or
4.11 * modify it under the terms of the GNU General Public License as
4.12 @@ -28,53 +28,18 @@
4.13
4.14 #ifdef __cplusplus
4.15
4.16 -#include <l4/devices/cpm-x1600.h>
4.17 -#include <l4/devices/hw_register_block.h>
4.18 +#include <l4/devices/rtc-generic.h>
4.19
4.20 -class Rtc_x1600_chip
4.21 +class Rtc_x1600_chip : public Rtc_chip
4.22 {
4.23 protected:
4.24 - /* Only use the CPM for the X1600, not other chips. */
4.25 -
4.26 - Cpm_x1600_chip *_cpm;
4.27 - Hw::Register_block<32> _regs;
4.28 -
4.29 - /* Utility methods. */
4.30 -
4.31 - uint32_t read_checked(unsigned reg);
4.32 - void wait();
4.33 - void write_enable();
4.34 - void _power_down();
4.35 + void _pre_power_down();
4.36
4.37 public:
4.38 - explicit Rtc_x1600_chip(l4_addr_t addr, Cpm_x1600_chip *cpm = NULL);
4.39 -
4.40 - void disable();
4.41 -
4.42 - void enable();
4.43 -
4.44 - void alarm_disable();
4.45 -
4.46 - void alarm_enable();
4.47 -
4.48 - void wakeup_alarm_disable();
4.49 -
4.50 - void wakeup_alarm_enable();
4.51 + explicit Rtc_x1600_chip(l4_addr_t addr, Cpm_chip *cpm = NULL);
4.52 +};
4.53
4.54 - uint32_t get_seconds();
4.55 -
4.56 - void set_seconds(uint32_t seconds);
4.57 -
4.58 - uint32_t get_alarm_seconds();
4.59 -
4.60 - void set_alarm_seconds(uint32_t seconds);
4.61 -
4.62 - void set_regulator(uint32_t base, uint32_t adjustment);
4.63 -
4.64 - void hibernate();
4.65 -
4.66 - void power_down();
4.67 -};
4.68 +Rtc_chip *x1600_rtc_chip(l4_addr_t rtc_base, Cpm_chip *cpm);
4.69
4.70 #endif /* __cplusplus */
4.71
4.72 @@ -86,6 +51,8 @@
4.73
4.74 void *x1600_rtc_init(l4_addr_t rtc_base, void *cpm);
4.75
4.76 +enum Clock_identifiers x1600_rtc_get_clock(void *rtc);
4.77 +
4.78 void x1600_rtc_disable(void *rtc);
4.79
4.80 void x1600_rtc_enable(void *rtc);
5.1 --- a/pkg/devices/lib/rtc/src/Makefile Sat May 04 01:30:06 2024 +0200
5.2 +++ b/pkg/devices/lib/rtc/src/Makefile Sat May 04 01:31:54 2024 +0200
5.3 @@ -4,7 +4,7 @@
5.4 TARGET = librtc.o.a librtc.o.so
5.5 PC_FILENAME := libdrivers-rtc
5.6
5.7 -SRC_CC := x1600.cc
5.8 +SRC_CC := common.cc generic.cc jz4780.cc x1600.cc
5.9
5.10 PRIVATE_INCDIR += $(PKGDIR)/lib/rtc/include
5.11
6.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
6.2 +++ b/pkg/devices/lib/rtc/src/common.cc Sat May 04 01:31:54 2024 +0200
6.3 @@ -0,0 +1,198 @@
6.4 +/*
6.5 + * Real-time clock support.
6.6 + *
6.7 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
6.8 + *
6.9 + * This program is free software; you can redistribute it and/or
6.10 + * modify it under the terms of the GNU General Public License as
6.11 + * published by the Free Software Foundation; either version 2 of
6.12 + * the License, or (at your option) any later version.
6.13 + *
6.14 + * This program is distributed in the hope that it will be useful,
6.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6.17 + * GNU General Public License for more details.
6.18 + *
6.19 + * You should have received a copy of the GNU General Public License
6.20 + * along with this program; if not, write to the Free Software
6.21 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
6.22 + * Boston, MA 02110-1301, USA
6.23 + */
6.24 +
6.25 +#include <l4/devices/hw_mmio_register_block.h>
6.26 +#include "rtc-defs.h"
6.27 +#include "rtc-generic.h"
6.28 +
6.29 +
6.30 +
6.31 +// Peripheral abstraction.
6.32 +
6.33 +Rtc_chip::Rtc_chip(l4_addr_t addr, Cpm_chip *cpm)
6.34 +: _cpm(cpm)
6.35 +{
6.36 + _regs = new Hw::Mmio_register_block<32>(addr);
6.37 +
6.38 + // Reset time regulation, in case it is completely scrambled.
6.39 + // NOTE: Using 32768 cycles for a 1Hz signal.
6.40 +
6.41 + set_regulator(32767, 0);
6.42 +}
6.43 +
6.44 +enum Clock_identifiers
6.45 +Rtc_chip::get_clock()
6.46 +{
6.47 + return Clock_rtc;
6.48 +}
6.49 +
6.50 +uint32_t
6.51 +Rtc_chip::read_checked(unsigned reg)
6.52 +{
6.53 + uint32_t last, current;
6.54 +
6.55 + wait();
6.56 + last = _regs[reg];
6.57 +
6.58 + while (1)
6.59 + {
6.60 + wait();
6.61 + current = _regs[reg];
6.62 +
6.63 + if (current == last)
6.64 + return current;
6.65 + else
6.66 + last = current;
6.67 + }
6.68 +}
6.69 +
6.70 +void
6.71 +Rtc_chip::wait()
6.72 +{
6.73 + while (!(_regs[Rtc_control] & Control_write_ready));
6.74 +}
6.75 +
6.76 +void
6.77 +Rtc_chip::write_enable()
6.78 +{
6.79 + wait();
6.80 + _regs[Hibernate_write_enable_pattern] = Write_enable_pattern;
6.81 +
6.82 + while (!(_regs[Hibernate_write_enable_pattern] & Write_enable_status));
6.83 +
6.84 + wait();
6.85 +}
6.86 +
6.87 +void
6.88 +Rtc_chip::disable()
6.89 +{
6.90 + write_enable();
6.91 + _regs[Rtc_control] = _regs[Rtc_control] & ~Control_rtc_enable;
6.92 +}
6.93 +
6.94 +void
6.95 +Rtc_chip::enable()
6.96 +{
6.97 + write_enable();
6.98 + _regs[Rtc_control] = _regs[Rtc_control] | Control_rtc_enable;
6.99 +}
6.100 +
6.101 +void
6.102 +Rtc_chip::alarm_disable()
6.103 +{
6.104 + write_enable();
6.105 + _regs[Rtc_control] = _regs[Rtc_control] & ~Control_alarm_enable;
6.106 +}
6.107 +
6.108 +void
6.109 +Rtc_chip::alarm_enable()
6.110 +{
6.111 + write_enable();
6.112 + _regs[Rtc_control] = (_regs[Rtc_control] & ~Control_alarm) | Control_alarm_enable;
6.113 +}
6.114 +
6.115 +void
6.116 +Rtc_chip::wakeup_alarm_disable()
6.117 +{
6.118 + write_enable();
6.119 + _regs[Hibernate_wakeup_control] = _regs[Hibernate_wakeup_control] & ~Rtc_alarm_wakeup_enable;
6.120 +}
6.121 +
6.122 +void
6.123 +Rtc_chip::wakeup_alarm_enable()
6.124 +{
6.125 + write_enable();
6.126 + _regs[Hibernate_wakeup_control] = _regs[Hibernate_wakeup_control] | Rtc_alarm_wakeup_enable;
6.127 +}
6.128 +
6.129 +uint32_t
6.130 +Rtc_chip::get_seconds()
6.131 +{
6.132 + return read_checked(Rtc_seconds);
6.133 +}
6.134 +
6.135 +void
6.136 +Rtc_chip::set_seconds(uint32_t seconds)
6.137 +{
6.138 + write_enable();
6.139 + _regs[Rtc_seconds] = seconds;
6.140 +}
6.141 +
6.142 +uint32_t
6.143 +Rtc_chip::get_alarm_seconds()
6.144 +{
6.145 + return read_checked(Rtc_alarm_seconds);
6.146 +}
6.147 +
6.148 +void
6.149 +Rtc_chip::set_alarm_seconds(uint32_t seconds)
6.150 +{
6.151 + write_enable();
6.152 + _regs[Rtc_alarm_seconds] = seconds;
6.153 +}
6.154 +
6.155 +void
6.156 +Rtc_chip::set_regulator(uint32_t base, uint32_t adjustment)
6.157 +{
6.158 + base = base ? base - 1 : 0;
6.159 + adjustment = adjustment ? adjustment - 1 : 0;
6.160 +
6.161 + if (base > Regulator_1Hz_cycle_count_limit)
6.162 + base = Regulator_1Hz_cycle_count_limit;
6.163 +
6.164 + if (adjustment > Regulator_adjust_count_limit)
6.165 + adjustment = Regulator_adjust_count_limit;
6.166 +
6.167 + write_enable();
6.168 + _regs[Rtc_regulator] = (base << Regulator_1Hz_cycle_count_shift) |
6.169 + (adjustment << Regulator_adjust_count_shift);
6.170 +}
6.171 +
6.172 +// Device-specific method.
6.173 +
6.174 +void
6.175 +Rtc_chip::_pre_power_down()
6.176 +{
6.177 +}
6.178 +
6.179 +void
6.180 +Rtc_chip::_power_down()
6.181 +{
6.182 + _pre_power_down();
6.183 +
6.184 + write_enable();
6.185 + _regs[Hibernate_control] = _regs[Hibernate_control] | Hibernate_power_down;
6.186 +}
6.187 +
6.188 +void
6.189 +Rtc_chip::hibernate()
6.190 +{
6.191 + alarm_enable();
6.192 + wakeup_alarm_enable();
6.193 + _power_down();
6.194 +}
6.195 +
6.196 +void
6.197 +Rtc_chip::power_down()
6.198 +{
6.199 + wakeup_alarm_disable();
6.200 + _power_down();
6.201 +}
7.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
7.2 +++ b/pkg/devices/lib/rtc/src/generic.cc Sat May 04 01:31:54 2024 +0200
7.3 @@ -0,0 +1,56 @@
7.4 +/*
7.5 + * Generic access to real-time clock functionality.
7.6 + *
7.7 + * Copyright (C) 2024 Paul Boddie <paul@boddie.org.uk>
7.8 + *
7.9 + * This program is free software; you can redistribute it and/or
7.10 + * modify it under the terms of the GNU General Public License as
7.11 + * published by the Free Software Foundation; either version 2 of
7.12 + * the License, or (at your option) any later version.
7.13 + *
7.14 + * This program is distributed in the hope that it will be useful,
7.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7.17 + * GNU General Public License for more details.
7.18 + *
7.19 + * You should have received a copy of the GNU General Public License
7.20 + * along with this program; if not, write to the Free Software
7.21 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
7.22 + * Boston, MA 02110-1301, USA
7.23 + */
7.24 +
7.25 +#include <string.h>
7.26 +#include "rtc-generic.h"
7.27 +
7.28 +/* Function declarations reproduced here to avoid clock identifier conflicts in
7.29 + the chip-specific headers. */
7.30 +
7.31 +//extern Rtc_chip *jz4730_rtc_chip(l4_addr_t, Cpm_chip *);
7.32 +//extern Rtc_chip *jz4740_rtc_chip(l4_addr_t, Cpm_chip *);
7.33 +extern Rtc_chip *jz4780_rtc_chip(l4_addr_t, Cpm_chip *);
7.34 +extern Rtc_chip *x1600_rtc_chip(l4_addr_t, Cpm_chip *);
7.35 +
7.36 +struct rtc_function
7.37 +{
7.38 + const char *name;
7.39 + Rtc_chip *(*function)(l4_addr_t, Cpm_chip *);
7.40 +};
7.41 +
7.42 +static struct rtc_function functions[] = {
7.43 + //{"jz4730", jz4730_rtc_chip},
7.44 + //{"jz4740", jz4740_rtc_chip},
7.45 + {"jz4780", jz4780_rtc_chip},
7.46 + {"x1600", x1600_rtc_chip},
7.47 + {NULL, NULL}
7.48 +};
7.49 +
7.50 +Rtc_chip *new_rtc_chip(const char *name, l4_addr_t start, Cpm_chip *cpm)
7.51 +{
7.52 + for (struct rtc_function *f = functions; f->name != NULL; f++)
7.53 + {
7.54 + if (!strcmp(name, f->name))
7.55 + return f->function(start, cpm);
7.56 + }
7.57 +
7.58 + return NULL;
7.59 +}
8.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
8.2 +++ b/pkg/devices/lib/rtc/src/jz4780.cc Sat May 04 01:31:54 2024 +0200
8.3 @@ -0,0 +1,107 @@
8.4 +/*
8.5 + * Real-time clock support.
8.6 + *
8.7 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
8.8 + *
8.9 + * This program is free software; you can redistribute it and/or
8.10 + * modify it under the terms of the GNU General Public License as
8.11 + * published by the Free Software Foundation; either version 2 of
8.12 + * the License, or (at your option) any later version.
8.13 + *
8.14 + * This program is distributed in the hope that it will be useful,
8.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8.17 + * GNU General Public License for more details.
8.18 + *
8.19 + * You should have received a copy of the GNU General Public License
8.20 + * along with this program; if not, write to the Free Software
8.21 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
8.22 + * Boston, MA 02110-1301, USA
8.23 + */
8.24 +
8.25 +#include "rtc-jz4780.h"
8.26 +#include "rtc-defs.h"
8.27 +
8.28 +
8.29 +
8.30 +// Peripheral abstraction.
8.31 +
8.32 +Rtc_jz4780_chip::Rtc_jz4780_chip(l4_addr_t addr, Cpm_chip *cpm)
8.33 +: Rtc_chip(addr, cpm)
8.34 +{
8.35 +}
8.36 +
8.37 +Rtc_chip *jz4780_rtc_chip(l4_addr_t rtc_base, Cpm_chip *cpm)
8.38 +{
8.39 + return new Rtc_jz4780_chip(rtc_base, cpm);
8.40 +}
8.41 +
8.42 +
8.43 +
8.44 +// C language interface functions.
8.45 +
8.46 +void
8.47 +*jz4780_rtc_init(l4_addr_t rtc_base, void *cpm)
8.48 +{
8.49 + return (void *) jz4780_rtc_chip(rtc_base, static_cast<Cpm_chip *>(cpm));
8.50 +}
8.51 +
8.52 +enum Clock_identifiers jz4780_rtc_get_clock(void *rtc)
8.53 +{
8.54 + return static_cast<Rtc_chip *>(rtc)->get_clock();
8.55 +}
8.56 +
8.57 +void jz4780_rtc_disable(void *rtc)
8.58 +{
8.59 + static_cast<Rtc_chip *>(rtc)->disable();
8.60 +}
8.61 +
8.62 +void jz4780_rtc_enable(void *rtc)
8.63 +{
8.64 + static_cast<Rtc_chip *>(rtc)->enable();
8.65 +}
8.66 +
8.67 +void jz4780_rtc_alarm_disable(void *rtc)
8.68 +{
8.69 + static_cast<Rtc_chip *>(rtc)->alarm_disable();
8.70 +}
8.71 +
8.72 +void jz4780_rtc_alarm_enable(void *rtc)
8.73 +{
8.74 + static_cast<Rtc_chip *>(rtc)->alarm_enable();
8.75 +}
8.76 +
8.77 +uint32_t jz4780_rtc_get_seconds(void *rtc)
8.78 +{
8.79 + return static_cast<Rtc_chip *>(rtc)->get_seconds();
8.80 +}
8.81 +
8.82 +void jz4780_rtc_set_seconds(void *rtc, uint32_t seconds)
8.83 +{
8.84 + static_cast<Rtc_chip *>(rtc)->set_seconds(seconds);
8.85 +}
8.86 +
8.87 +uint32_t jz4780_rtc_get_alarm_seconds(void *rtc)
8.88 +{
8.89 + return static_cast<Rtc_chip *>(rtc)->get_alarm_seconds();
8.90 +}
8.91 +
8.92 +void jz4780_rtc_set_alarm_seconds(void *rtc, uint32_t seconds)
8.93 +{
8.94 + static_cast<Rtc_chip *>(rtc)->set_alarm_seconds(seconds);
8.95 +}
8.96 +
8.97 +void jz4780_rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment)
8.98 +{
8.99 + static_cast<Rtc_chip *>(rtc)->set_regulator(base, adjustment);
8.100 +}
8.101 +
8.102 +void jz4780_rtc_hibernate(void *rtc)
8.103 +{
8.104 + static_cast<Rtc_chip *>(rtc)->hibernate();
8.105 +}
8.106 +
8.107 +void jz4780_rtc_power_down(void *rtc)
8.108 +{
8.109 + static_cast<Rtc_chip *>(rtc)->power_down();
8.110 +}
9.1 --- a/pkg/devices/lib/rtc/src/x1600.cc Sat May 04 01:30:06 2024 +0200
9.2 +++ b/pkg/devices/lib/rtc/src/x1600.cc Sat May 04 01:31:54 2024 +0200
9.3 @@ -1,7 +1,7 @@
9.4 /*
9.5 * Real-time clock support.
9.6 *
9.7 - * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk>
9.8 + * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>
9.9 *
9.10 * This program is free software; you can redistribute it and/or
9.11 * modify it under the terms of the GNU General Public License as
9.12 @@ -19,267 +19,31 @@
9.13 * Boston, MA 02110-1301, USA
9.14 */
9.15
9.16 -#include <l4/devices/hw_mmio_register_block.h>
9.17 #include "rtc-x1600.h"
9.18 -
9.19 -
9.20 -
9.21 -// Register locations.
9.22 -
9.23 -enum Regs : unsigned
9.24 -{
9.25 - Rtc_control = 0x000, // RTCCR
9.26 - Rtc_seconds = 0x004, // RTCSR
9.27 - Rtc_alarm_seconds = 0x008, // RTCSAR
9.28 - Rtc_regulator = 0x00c, // RTCGR
9.29 -
9.30 - Hibernate_control = 0x020, // HCR
9.31 - Hibernate_wakeup_filter_counter = 0x024, // HWFCR
9.32 - Hibernate_reset_counter = 0x028, // HRCR
9.33 - Hibernate_wakeup_control = 0x02c, // HWCR
9.34 - Hibernate_wakeup_status = 0x030, // HWRSR
9.35 - Hibernate_scratch_pattern = 0x034, // HSPR
9.36 - Hibernate_write_enable_pattern = 0x03c, // WENR
9.37 - Hibernate_wakeup_pin_configure = 0x048, // WKUPPINCR
9.38 -};
9.39 -
9.40 -// Field definitions.
9.41 -
9.42 -enum Control_bits : unsigned
9.43 -{
9.44 - Control_write_ready = 0x80, // WRDY
9.45 - Control_1Hz = 0x40, // 1HZ
9.46 - Control_1Hz_irq_enable = 0x20, // 1HZIE
9.47 - Control_alarm = 0x10, // AF
9.48 - Control_alarm_irq_enable = 0x08, // AIE
9.49 - Control_alarm_enable = 0x04, // AE
9.50 - Control_rtc_enable = 0x01, // RTCE
9.51 -};
9.52 -
9.53 -enum Regulator_bits : unsigned
9.54 -{
9.55 - Regulator_lock = 0x80000000, // LOCK
9.56 - Regulator_adjust_count_mask = 0x03ff0000, // ADJC
9.57 - Regulator_1Hz_cycle_count_mask = 0x0000ffff, // NC1HZ
9.58 -};
9.59 -
9.60 -enum Regulator_limits : unsigned
9.61 -{
9.62 - Regulator_adjust_count_limit = 0x03ff, // ADJC
9.63 - Regulator_1Hz_cycle_count_limit = 0xffff, // NC1HZ
9.64 -};
9.65 -
9.66 -enum Regulator_shifts : unsigned
9.67 -{
9.68 - Regulator_adjust_count_shift = 16, // ADJC
9.69 - Regulator_1Hz_cycle_count_shift = 0, // NC1HZ
9.70 -};
9.71 -
9.72 -enum Hibernate_control_bits : unsigned
9.73 -{
9.74 - Hibernate_power_down = 0x01, // PD
9.75 -};
9.76 -
9.77 -enum Hibernate_wakeup_filter_counter_bits : unsigned
9.78 -{
9.79 - Wakeup_minimum_time_mask = 0xffe0, // HWFCR
9.80 -};
9.81 -
9.82 -enum Hibernate_reset_counter_bits : unsigned
9.83 -{
9.84 - Reset_assert_time_mask = 0x7800, // HRCR
9.85 -};
9.86 -
9.87 -enum Hibernate_wakeup_control_bits : unsigned
9.88 -{
9.89 - Power_detect_enable_mask = 0xfffffff8, // EPDET
9.90 - Rtc_alarm_wakeup_enable = 0x00000001, // EALM
9.91 -};
9.92 -
9.93 -enum Hibernate_wakeup_status_bits : unsigned
9.94 -{
9.95 - Accident_power_down = 0x0100, // APD
9.96 - Hibernate_reset = 0x0020, // HR
9.97 - Pad_pin_reset = 0x0010, // PPR
9.98 - Wakeup_pin_status = 0x0002, // PIN
9.99 - Rtc_alarm_status = 0x0001, // ALM
9.100 -};
9.101 -
9.102 -enum Hibernate_write_enable_pattern_bits : unsigned
9.103 -{
9.104 - Write_enable_status = 0x80000000, // WEN
9.105 - Write_enable_pattern_mask = 0x0000ffff, // WENPAT
9.106 - Write_enable_pattern = 0x0000a55a, // WENPAT
9.107 -};
9.108 -
9.109 -enum Hibernate_wakeup_pin_configure_bits : unsigned
9.110 -{
9.111 - Rtc_oscillator_test_enable = 0x00080000, // OSC_TE
9.112 - Oscillator_xtclk_rtclk = 0x00040000, // OSC_RETON
9.113 - Oscillator_xtclk_low = 0x00000000, // OSC_RETON
9.114 - Rtc_internal_oscillator_enable = 0x00010000, // OSC_EN
9.115 - Wakeup_pin_extended_press_mask = 0x000000f0, // P_JUD_LEN
9.116 - Wakeup_pin_extended_press_enable = 0x0000000f, // P_RST_LEN
9.117 -};
9.118 +#include "rtc-defs.h"
9.119
9.120
9.121
9.122 // Peripheral abstraction.
9.123
9.124 -Rtc_x1600_chip::Rtc_x1600_chip(l4_addr_t addr, Cpm_x1600_chip *cpm)
9.125 -: _cpm(cpm)
9.126 -{
9.127 - _regs = new Hw::Mmio_register_block<32>(addr);
9.128 -}
9.129 -
9.130 -uint32_t
9.131 -Rtc_x1600_chip::read_checked(unsigned reg)
9.132 -{
9.133 - uint32_t last, current;
9.134 -
9.135 - wait();
9.136 - last = _regs[reg];
9.137 -
9.138 - while (1)
9.139 - {
9.140 - wait();
9.141 - current = _regs[reg];
9.142 -
9.143 - if (current == last)
9.144 - return current;
9.145 - else
9.146 - last = current;
9.147 - }
9.148 -}
9.149 -
9.150 -void
9.151 -Rtc_x1600_chip::wait()
9.152 +Rtc_x1600_chip::Rtc_x1600_chip(l4_addr_t addr, Cpm_chip *cpm)
9.153 +: Rtc_chip(addr, cpm)
9.154 {
9.155 - while (!(_regs[Rtc_control] & Control_write_ready));
9.156 -}
9.157 -
9.158 -void
9.159 -Rtc_x1600_chip::write_enable()
9.160 -{
9.161 - wait();
9.162 - _regs[Hibernate_write_enable_pattern] = Write_enable_pattern;
9.163 -
9.164 - while (!(_regs[Hibernate_write_enable_pattern] & Write_enable_status));
9.165 -
9.166 - wait();
9.167 -}
9.168 -
9.169 -void
9.170 -Rtc_x1600_chip::disable()
9.171 -{
9.172 - write_enable();
9.173 - _regs[Rtc_control] = _regs[Rtc_control] & ~Control_rtc_enable;
9.174 -}
9.175 -
9.176 -void
9.177 -Rtc_x1600_chip::enable()
9.178 -{
9.179 - write_enable();
9.180 - _regs[Rtc_control] = _regs[Rtc_control] | Control_rtc_enable;
9.181 -}
9.182 -
9.183 -void
9.184 -Rtc_x1600_chip::alarm_disable()
9.185 -{
9.186 - write_enable();
9.187 - _regs[Rtc_control] = _regs[Rtc_control] & ~Control_alarm_enable;
9.188 }
9.189
9.190 void
9.191 -Rtc_x1600_chip::alarm_enable()
9.192 -{
9.193 - write_enable();
9.194 - _regs[Rtc_control] = (_regs[Rtc_control] & ~Control_alarm) | Control_alarm_enable;
9.195 -}
9.196 -
9.197 -void
9.198 -Rtc_x1600_chip::wakeup_alarm_disable()
9.199 -{
9.200 - write_enable();
9.201 - _regs[Hibernate_wakeup_control] = _regs[Hibernate_wakeup_control] & ~Rtc_alarm_wakeup_enable;
9.202 -}
9.203 -
9.204 -void
9.205 -Rtc_x1600_chip::wakeup_alarm_enable()
9.206 -{
9.207 - write_enable();
9.208 - _regs[Hibernate_wakeup_control] = _regs[Hibernate_wakeup_control] | Rtc_alarm_wakeup_enable;
9.209 -}
9.210 -
9.211 -uint32_t
9.212 -Rtc_x1600_chip::get_seconds()
9.213 -{
9.214 - return read_checked(Rtc_seconds);
9.215 -}
9.216 -
9.217 -void
9.218 -Rtc_x1600_chip::set_seconds(uint32_t seconds)
9.219 -{
9.220 - write_enable();
9.221 - _regs[Rtc_seconds] = seconds;
9.222 -}
9.223 -
9.224 -uint32_t
9.225 -Rtc_x1600_chip::get_alarm_seconds()
9.226 -{
9.227 - return read_checked(Rtc_alarm_seconds);
9.228 -}
9.229 -
9.230 -void
9.231 -Rtc_x1600_chip::set_alarm_seconds(uint32_t seconds)
9.232 -{
9.233 - write_enable();
9.234 - _regs[Rtc_alarm_seconds] = seconds;
9.235 -}
9.236 -
9.237 -void
9.238 -Rtc_x1600_chip::set_regulator(uint32_t base, uint32_t adjustment)
9.239 -{
9.240 - base = base ? base - 1 : 0;
9.241 - adjustment = adjustment ? adjustment - 1 : 0;
9.242 -
9.243 - if (base > Regulator_1Hz_cycle_count_limit)
9.244 - base = Regulator_1Hz_cycle_count_limit;
9.245 -
9.246 - if (adjustment > Regulator_adjust_count_limit)
9.247 - adjustment = Regulator_adjust_count_limit;
9.248 -
9.249 - write_enable();
9.250 - _regs[Rtc_regulator] = (base << Regulator_1Hz_cycle_count_shift) |
9.251 - (adjustment << Regulator_adjust_count_shift);
9.252 -}
9.253 -
9.254 -void
9.255 -Rtc_x1600_chip::_power_down()
9.256 +Rtc_x1600_chip::_pre_power_down()
9.257 {
9.258 /* Set CPU frequency to L2 cache frequency before powering down. This is
9.259 apparently necessary according to the X1600 manual. */
9.260
9.261 if (_cpm != NULL)
9.262 _cpm->set_frequency(Clock_cpu, _cpm->get_frequency(Clock_l2cache));
9.263 -
9.264 - write_enable();
9.265 - _regs[Hibernate_control] = _regs[Hibernate_control] | Hibernate_power_down;
9.266 }
9.267
9.268 -void
9.269 -Rtc_x1600_chip::hibernate()
9.270 +Rtc_chip *x1600_rtc_chip(l4_addr_t rtc_base, Cpm_chip *cpm)
9.271 {
9.272 - alarm_enable();
9.273 - wakeup_alarm_enable();
9.274 - _power_down();
9.275 -}
9.276 -
9.277 -void
9.278 -Rtc_x1600_chip::power_down()
9.279 -{
9.280 - wakeup_alarm_disable();
9.281 - _power_down();
9.282 + return new Rtc_x1600_chip(rtc_base, cpm);
9.283 }
9.284
9.285
9.286 @@ -289,60 +53,65 @@
9.287 void
9.288 *x1600_rtc_init(l4_addr_t rtc_base, void *cpm)
9.289 {
9.290 - return (void *) new Rtc_x1600_chip(rtc_base, static_cast<Cpm_x1600_chip *>(cpm));
9.291 + return (void *) x1600_rtc_chip(rtc_base, static_cast<Cpm_chip *>(cpm));
9.292 +}
9.293 +
9.294 +enum Clock_identifiers x1600_rtc_get_clock(void *rtc)
9.295 +{
9.296 + return static_cast<Rtc_chip *>(rtc)->get_clock();
9.297 }
9.298
9.299 void x1600_rtc_disable(void *rtc)
9.300 {
9.301 - static_cast<Rtc_x1600_chip *>(rtc)->disable();
9.302 + static_cast<Rtc_chip *>(rtc)->disable();
9.303 }
9.304
9.305 void x1600_rtc_enable(void *rtc)
9.306 {
9.307 - static_cast<Rtc_x1600_chip *>(rtc)->enable();
9.308 + static_cast<Rtc_chip *>(rtc)->enable();
9.309 }
9.310
9.311 void x1600_rtc_alarm_disable(void *rtc)
9.312 {
9.313 - static_cast<Rtc_x1600_chip *>(rtc)->alarm_disable();
9.314 + static_cast<Rtc_chip *>(rtc)->alarm_disable();
9.315 }
9.316
9.317 void x1600_rtc_alarm_enable(void *rtc)
9.318 {
9.319 - static_cast<Rtc_x1600_chip *>(rtc)->alarm_enable();
9.320 + static_cast<Rtc_chip *>(rtc)->alarm_enable();
9.321 }
9.322
9.323 uint32_t x1600_rtc_get_seconds(void *rtc)
9.324 {
9.325 - return static_cast<Rtc_x1600_chip *>(rtc)->get_seconds();
9.326 + return static_cast<Rtc_chip *>(rtc)->get_seconds();
9.327 }
9.328
9.329 void x1600_rtc_set_seconds(void *rtc, uint32_t seconds)
9.330 {
9.331 - static_cast<Rtc_x1600_chip *>(rtc)->set_seconds(seconds);
9.332 + static_cast<Rtc_chip *>(rtc)->set_seconds(seconds);
9.333 }
9.334
9.335 uint32_t x1600_rtc_get_alarm_seconds(void *rtc)
9.336 {
9.337 - return static_cast<Rtc_x1600_chip *>(rtc)->get_alarm_seconds();
9.338 + return static_cast<Rtc_chip *>(rtc)->get_alarm_seconds();
9.339 }
9.340
9.341 void x1600_rtc_set_alarm_seconds(void *rtc, uint32_t seconds)
9.342 {
9.343 - static_cast<Rtc_x1600_chip *>(rtc)->set_alarm_seconds(seconds);
9.344 + static_cast<Rtc_chip *>(rtc)->set_alarm_seconds(seconds);
9.345 }
9.346
9.347 void x1600_rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment)
9.348 {
9.349 - static_cast<Rtc_x1600_chip *>(rtc)->set_regulator(base, adjustment);
9.350 + static_cast<Rtc_chip *>(rtc)->set_regulator(base, adjustment);
9.351 }
9.352
9.353 void x1600_rtc_hibernate(void *rtc)
9.354 {
9.355 - static_cast<Rtc_x1600_chip *>(rtc)->hibernate();
9.356 + static_cast<Rtc_chip *>(rtc)->hibernate();
9.357 }
9.358
9.359 void x1600_rtc_power_down(void *rtc)
9.360 {
9.361 - static_cast<Rtc_x1600_chip *>(rtc)->power_down();
9.362 + static_cast<Rtc_chip *>(rtc)->power_down();
9.363 }
10.1 --- a/pkg/landfall-examples/hw_info/common.h Sat May 04 01:30:06 2024 +0200
10.2 +++ b/pkg/landfall-examples/hw_info/common.h Sat May 04 01:31:54 2024 +0200
10.3 @@ -189,6 +189,8 @@
10.4
10.5 void *rtc_init(l4_addr_t start, void *cpm);
10.6
10.7 +enum Clock_identifiers rtc_get_clock(void *rtc);
10.8 +
10.9 void rtc_disable(void *rtc);
10.10
10.11 void rtc_enable(void *rtc);
11.1 --- a/pkg/landfall-examples/hw_info/hw_info.c Sat May 04 01:30:06 2024 +0200
11.2 +++ b/pkg/landfall-examples/hw_info/hw_info.c Sat May 04 01:31:54 2024 +0200
11.3 @@ -356,7 +356,7 @@
11.4 const char *source_id = clock_id(cpm_get_source_clock(cpm, clocks[i].clock));
11.5 int num_parameters = cpm_get_parameters(cpm, clocks[i].clock, parameters);
11.6
11.7 - for (int p = 0, pos = 0; p < num_parameters; p++)
11.8 + for (int p = 0, pos = 0; (p < num_parameters) && (p < 4); p++)
11.9 {
11.10 int result = sprintf(parameter_str + pos, "%-7d ", parameters[p]);
11.11 if (result < 0)
11.12 @@ -1326,6 +1326,13 @@
11.13
11.14 /* RTC operations. */
11.15
11.16 +static void rtc_clock_frequency(void *rtc, void *cpm)
11.17 +{
11.18 + enum Clock_identifiers clock = rtc_get_clock(rtc);
11.19 +
11.20 + printf("RTC frequency: %lld\n", cpm_get_frequency(cpm, clock));
11.21 +}
11.22 +
11.23 static void rtc_reset(void *rtc, void *cpm)
11.24 {
11.25 unsigned int seconds;
11.26 @@ -1333,10 +1340,9 @@
11.27 if (!read_number("Seconds", &seconds))
11.28 return;
11.29
11.30 - /* NOTE: Assuming EXCLK/512 as RTC source. */
11.31 -
11.32 + enum Clock_identifiers clock = rtc_get_clock(rtc);
11.33 uint32_t rtc_seconds = rtc_get_seconds(rtc);
11.34 - uint32_t value = seconds * cpm_get_frequency(cpm, Clock_external) / 512;
11.35 + uint32_t value = seconds * cpm_get_frequency(cpm, clock);
11.36
11.37 rtc_alarm_disable(rtc);
11.38 rtc_set_alarm_seconds(rtc, rtc_seconds + value);
11.39 @@ -1871,7 +1877,9 @@
11.40
11.41 if ((token = read_token(NULL)) != NULL)
11.42 {
11.43 - if (!strcmp(token, "d") || !strcmp(token, "disable"))
11.44 + if (!strcmp(token, "c") || !strcmp(token, "clock-frequency"))
11.45 + rtc_clock_frequency(rtc, cpm);
11.46 + else if (!strcmp(token, "d") || !strcmp(token, "disable"))
11.47 rtc_disable(rtc);
11.48 else if (!strcmp(token, "e") || !strcmp(token, "enable"))
11.49 rtc_enable(rtc);
11.50 @@ -1888,10 +1896,10 @@
11.51 else if (!strcmp(token, "sa") || !strcmp(token, "set-alarm"))
11.52 _rtc_set_seconds(rtc, 1);
11.53 else
11.54 - printf("rtc disable | enable | get | get-alarm | power-down | reset | set | set-alarm\n");
11.55 + printf("rtc clock-frequency | disable | enable | get | get-alarm | power-down | reset | set | set-alarm\n");
11.56 }
11.57 else
11.58 - printf("rtc disable | enable | get | get-alarm | power-down | reset | set | set-alarm\n");
11.59 + printf("rtc clock-frequency | disable | enable | get | get-alarm | power-down | reset | set | set-alarm\n");
11.60 }
11.61
11.62 static void handle_spi(void *spi, void *gpio[])
12.1 --- a/pkg/landfall-examples/hw_info/jz4780.c Sat May 04 01:30:06 2024 +0200
12.2 +++ b/pkg/landfall-examples/hw_info/jz4780.c Sat May 04 01:31:54 2024 +0200
12.3 @@ -29,10 +29,7 @@
12.4 #include <l4/devices/gpio-jz4780.h>
12.5 #include <l4/devices/i2c-jz4780.h>
12.6 #include <l4/devices/msc-jz4780.h>
12.7 -
12.8 -/* The X1600 RTC functionality is a subset of that in the JZ4780. */
12.9 -
12.10 -#include <l4/devices/rtc-x1600.h>
12.11 +#include <l4/devices/rtc-jz4780.h>
12.12
12.13 /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary
12.14 header provides pins like GPC. */
12.15 @@ -382,65 +379,67 @@
12.16
12.17 void *rtc_init(l4_addr_t start, void *cpm)
12.18 {
12.19 - /* Ignore the CPM requirement for the JZ4780. */
12.20 + return jz4780_rtc_init(start, cpm);
12.21 +}
12.22
12.23 - (void) cpm;
12.24 - return x1600_rtc_init(start, NULL);
12.25 +enum Clock_identifiers rtc_get_clock(void *rtc)
12.26 +{
12.27 + return jz4780_rtc_get_clock(rtc);
12.28 }
12.29
12.30 void rtc_disable(void *rtc)
12.31 {
12.32 - x1600_rtc_disable(rtc);
12.33 + jz4780_rtc_disable(rtc);
12.34 }
12.35
12.36 void rtc_enable(void *rtc)
12.37 {
12.38 - x1600_rtc_enable(rtc);
12.39 + jz4780_rtc_enable(rtc);
12.40 }
12.41
12.42 void rtc_alarm_disable(void *rtc)
12.43 {
12.44 - x1600_rtc_alarm_disable(rtc);
12.45 + jz4780_rtc_alarm_disable(rtc);
12.46 }
12.47
12.48 void rtc_alarm_enable(void *rtc)
12.49 {
12.50 - x1600_rtc_alarm_enable(rtc);
12.51 + jz4780_rtc_alarm_enable(rtc);
12.52 }
12.53
12.54 uint32_t rtc_get_seconds(void *rtc)
12.55 {
12.56 - return x1600_rtc_get_seconds(rtc);
12.57 + return jz4780_rtc_get_seconds(rtc);
12.58 }
12.59
12.60 void rtc_set_seconds(void *rtc, uint32_t seconds)
12.61 {
12.62 - x1600_rtc_set_seconds(rtc, seconds);
12.63 + jz4780_rtc_set_seconds(rtc, seconds);
12.64 }
12.65
12.66 uint32_t rtc_get_alarm_seconds(void *rtc)
12.67 {
12.68 - return x1600_rtc_get_alarm_seconds(rtc);
12.69 + return jz4780_rtc_get_alarm_seconds(rtc);
12.70 }
12.71
12.72 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds)
12.73 {
12.74 - x1600_rtc_set_alarm_seconds(rtc, seconds);
12.75 + jz4780_rtc_set_alarm_seconds(rtc, seconds);
12.76 }
12.77
12.78 void rtc_hibernate(void *rtc)
12.79 {
12.80 - x1600_rtc_hibernate(rtc);
12.81 + jz4780_rtc_hibernate(rtc);
12.82 }
12.83
12.84 void rtc_power_down(void *rtc)
12.85 {
12.86 - x1600_rtc_power_down(rtc);
12.87 + jz4780_rtc_power_down(rtc);
12.88 }
12.89
12.90 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment)
12.91 {
12.92 - x1600_rtc_set_regulator(rtc, base, adjustment);
12.93 + jz4780_rtc_set_regulator(rtc, base, adjustment);
12.94 }
12.95
12.96
13.1 --- a/pkg/landfall-examples/hw_info/x1600.c Sat May 04 01:30:06 2024 +0200
13.2 +++ b/pkg/landfall-examples/hw_info/x1600.c Sat May 04 01:31:54 2024 +0200
13.3 @@ -374,6 +374,11 @@
13.4 return x1600_rtc_init(start, cpm);
13.5 }
13.6
13.7 +enum Clock_identifiers rtc_get_clock(void *rtc)
13.8 +{
13.9 + return x1600_rtc_get_clock(rtc);
13.10 +}
13.11 +
13.12 void rtc_disable(void *rtc)
13.13 {
13.14 x1600_rtc_disable(rtc);