paul@1 | 1 | #!/usr/bin/env python |
paul@1 | 2 | |
paul@1 | 3 | """ |
paul@1 | 4 | Acorn Electron ULA simulation. |
paul@1 | 5 | """ |
paul@1 | 6 | |
paul@29 | 7 | from array import array |
paul@29 | 8 | from itertools import repeat |
paul@29 | 9 | |
paul@22 | 10 | LINES_PER_ROW = 8 # the number of pixel lines per character row |
paul@22 | 11 | MAX_HEIGHT = 256 # the height of the screen in pixels |
paul@40 | 12 | MAX_WIDTH = 640 # the width of the screen in pixels |
paul@40 | 13 | |
paul@40 | 14 | MAX_CSYNC = 2 # the scanline during which vsync ends |
paul@40 | 15 | MIN_PIXELLINE = 38 # the first scanline involving pixel generation |
paul@22 | 16 | MAX_SCANLINE = 312 # the number of scanlines in each frame |
paul@40 | 17 | |
paul@40 | 18 | MAX_PIXELLINE = MIN_PIXELLINE + MAX_HEIGHT |
paul@40 | 19 | |
paul@40 | 20 | MAX_HSYNC = 75 # the number of cycles in each hsync period |
paul@40 | 21 | MIN_PIXELPOS = 264 # the first cycle involving pixel generation |
paul@40 | 22 | MAX_SCANPOS = 1024 # the number of cycles in each scanline |
paul@40 | 23 | |
paul@40 | 24 | MAX_PIXELPOS = MIN_PIXELPOS + MAX_WIDTH |
paul@40 | 25 | |
paul@22 | 26 | SCREEN_LIMIT = 0x8000 # the first address after the screen memory |
paul@22 | 27 | MAX_MEMORY = 0x10000 # the number of addressable memory locations |
paul@40 | 28 | MAX_RAM = 0x10000 # the number of addressable RAM locations (64Kb in each IC) |
paul@3 | 29 | BLANK = (0, 0, 0) |
paul@1 | 30 | |
paul@29 | 31 | def update(ula): |
paul@1 | 32 | |
paul@1 | 33 | """ |
paul@31 | 34 | Update the 'ula' for one frame. Return the resulting screen. |
paul@31 | 35 | """ |
paul@31 | 36 | |
paul@31 | 37 | video = ula.video |
paul@31 | 38 | |
paul@31 | 39 | i = 0 |
paul@31 | 40 | limit = MAX_SCANLINE * MAX_SCANPOS |
paul@31 | 41 | while i < limit: |
paul@31 | 42 | ula.update() |
paul@31 | 43 | video.update() |
paul@31 | 44 | i += 1 |
paul@32 | 45 | return video.screen.tolist() |
paul@31 | 46 | |
paul@31 | 47 | class Video: |
paul@31 | 48 | |
paul@31 | 49 | """ |
paul@31 | 50 | A class representing the video circuitry. |
paul@1 | 51 | """ |
paul@1 | 52 | |
paul@31 | 53 | def __init__(self): |
paul@31 | 54 | self.screen = array("B", repeat(0, MAX_WIDTH * 3 * MAX_HEIGHT)) |
paul@31 | 55 | self.colour = BLANK |
paul@31 | 56 | self.csync = 1 |
paul@31 | 57 | self.hs = 1 |
paul@40 | 58 | self.x = 0 |
paul@40 | 59 | self.y = 0 |
paul@1 | 60 | |
paul@40 | 61 | def set_csync(self, value): |
paul@40 | 62 | if self.csync and not value: |
paul@40 | 63 | self.y = 0 |
paul@40 | 64 | self.pos = 0 |
paul@40 | 65 | self.csync = value |
paul@40 | 66 | |
paul@40 | 67 | def set_hs(self, value): |
paul@40 | 68 | if self.hs and not value: |
paul@40 | 69 | self.x = 0 |
paul@40 | 70 | self.y += 1 |
paul@40 | 71 | self.hs = value |
paul@31 | 72 | |
paul@31 | 73 | def update(self): |
paul@40 | 74 | if MIN_PIXELLINE <= self.y < MAX_PIXELLINE: |
paul@40 | 75 | if MIN_PIXELPOS <= self.x < MAX_PIXELPOS: |
paul@31 | 76 | self.screen[self.pos] = self.colour[0]; self.pos += 1 |
paul@31 | 77 | self.screen[self.pos] = self.colour[1]; self.pos += 1 |
paul@31 | 78 | self.screen[self.pos] = self.colour[2]; self.pos += 1 |
paul@40 | 79 | self.x += 1 |
paul@40 | 80 | |
paul@40 | 81 | class RAM: |
paul@40 | 82 | |
paul@40 | 83 | """ |
paul@40 | 84 | A class representing the RAM circuits (IC4 to IC7). Each circuit |
paul@40 | 85 | traditionally holds 64 kilobits, with two accesses required to read 2 bits |
paul@40 | 86 | from each in order to obtain a whole byte. Here, we model the circuits with |
paul@40 | 87 | a list of 65536 half-bytes with each bit representing a bit stored on a |
paul@40 | 88 | separate IC. |
paul@40 | 89 | """ |
paul@40 | 90 | |
paul@40 | 91 | def __init__(self): |
paul@40 | 92 | |
paul@40 | 93 | "Initialise the RAM circuits." |
paul@40 | 94 | |
paul@40 | 95 | self.memory = [0] * MAX_RAM |
paul@40 | 96 | self.row_address = 0 |
paul@40 | 97 | self.column_address = 0 |
paul@40 | 98 | self.data = 0 |
paul@40 | 99 | |
paul@40 | 100 | def row_select(self, address): |
paul@40 | 101 | self.row_address = address |
paul@40 | 102 | |
paul@40 | 103 | def row_deselect(self): |
paul@40 | 104 | pass |
paul@40 | 105 | |
paul@40 | 106 | def column_select(self, address): |
paul@40 | 107 | self.column_address = address |
paul@40 | 108 | |
paul@40 | 109 | # Read the data. |
paul@40 | 110 | |
paul@40 | 111 | self.data = self.memory[self.row_address << 8 | self.column_address] |
paul@40 | 112 | |
paul@40 | 113 | def column_deselect(self): |
paul@40 | 114 | pass |
paul@40 | 115 | |
paul@40 | 116 | # Convenience methods. |
paul@40 | 117 | |
paul@40 | 118 | def fill(self, start, end, value): |
paul@40 | 119 | for i in xrange(start, end): |
paul@40 | 120 | self.memory[i << 1] = value >> 4 |
paul@40 | 121 | self.memory[i << 1 | 0x1] = value & 0xf |
paul@29 | 122 | |
paul@2 | 123 | class ULA: |
paul@2 | 124 | |
paul@31 | 125 | """ |
paul@31 | 126 | A class providing the ULA functionality. Instances of this class refer to |
paul@31 | 127 | the system memory, maintain internal state (such as information about the |
paul@31 | 128 | current screen mode), and provide outputs (such as the current pixel |
paul@31 | 129 | colour). |
paul@31 | 130 | """ |
paul@1 | 131 | |
paul@2 | 132 | modes = [ |
paul@2 | 133 | (640, 1, 32), (320, 2, 32), (160, 4, 32), # (width, depth, rows) |
paul@3 | 134 | (640, 1, 25), (320, 1, 32), (160, 2, 32), |
paul@3 | 135 | (320, 1, 25) |
paul@2 | 136 | ] |
paul@2 | 137 | |
paul@2 | 138 | palette = range(0, 8) * 2 |
paul@2 | 139 | |
paul@40 | 140 | def __init__(self, ram, video): |
paul@1 | 141 | |
paul@40 | 142 | "Initialise the ULA with the given 'ram' and 'video' instances." |
paul@2 | 143 | |
paul@40 | 144 | self.ram = ram |
paul@31 | 145 | self.video = video |
paul@2 | 146 | self.set_mode(6) |
paul@1 | 147 | |
paul@2 | 148 | # Internal state. |
paul@2 | 149 | |
paul@31 | 150 | self.reset() |
paul@31 | 151 | |
paul@31 | 152 | def reset(self): |
paul@31 | 153 | |
paul@31 | 154 | "Reset the ULA." |
paul@31 | 155 | |
paul@40 | 156 | # Internal state. |
paul@40 | 157 | |
paul@40 | 158 | self.cycle = 0 # counter within each 2MHz period |
paul@40 | 159 | self.access = 0 # counter used to determine whether a byte needs reading |
paul@40 | 160 | self.ram_address = 0 # address given to the RAM |
paul@40 | 161 | self.data = 0 # data read from the RAM |
paul@41 | 162 | self.buffer = [BLANK]*8 # pixel buffer for decoded RAM data |
paul@40 | 163 | |
paul@40 | 164 | self.reset_vertical() |
paul@31 | 165 | |
paul@2 | 166 | def set_mode(self, mode): |
paul@1 | 167 | |
paul@2 | 168 | """ |
paul@2 | 169 | For the given 'mode', initialise the... |
paul@1 | 170 | |
paul@2 | 171 | * width in pixels |
paul@2 | 172 | * colour depth in bits per pixel |
paul@2 | 173 | * number of character rows |
paul@2 | 174 | * character row size in bytes |
paul@2 | 175 | * screen size in bytes |
paul@2 | 176 | * default screen start address |
paul@2 | 177 | * horizontal pixel scaling factor |
paul@2 | 178 | * line spacing in pixels |
paul@2 | 179 | * number of entries in the pixel buffer |
paul@31 | 180 | |
paul@31 | 181 | The ULA should be reset after a mode switch in order to cleanly display |
paul@31 | 182 | a full screen. |
paul@2 | 183 | """ |
paul@1 | 184 | |
paul@12 | 185 | self.width, self.depth, rows = ULA.modes[mode] |
paul@3 | 186 | |
paul@31 | 187 | columns = (self.width * self.depth) / 8 # bits read -> bytes read |
paul@40 | 188 | self.access_frequency = 80 / columns # cycle frequency for reading bytes |
paul@31 | 189 | row_size = columns * LINES_PER_ROW |
paul@2 | 190 | |
paul@3 | 191 | # Memory access configuration. |
paul@4 | 192 | # Note the limitation on positioning the screen start. |
paul@3 | 193 | |
paul@4 | 194 | screen_size = row_size * rows |
paul@4 | 195 | self.screen_start = (SCREEN_LIMIT - screen_size) & 0xff00 |
paul@4 | 196 | self.screen_size = SCREEN_LIMIT - self.screen_start |
paul@3 | 197 | |
paul@3 | 198 | # Scanline configuration. |
paul@1 | 199 | |
paul@22 | 200 | self.xscale = MAX_WIDTH / self.width # pixel width in display pixels |
paul@3 | 201 | self.spacing = MAX_HEIGHT / rows - LINES_PER_ROW # pixels between rows |
paul@3 | 202 | |
paul@3 | 203 | # Start of unused region. |
paul@3 | 204 | |
paul@3 | 205 | self.footer = rows * LINES_PER_ROW |
paul@22 | 206 | self.margin = MAX_SCANLINE - rows * (LINES_PER_ROW + self.spacing) + self.spacing |
paul@3 | 207 | |
paul@3 | 208 | # Internal pixel buffer size. |
paul@3 | 209 | |
paul@2 | 210 | self.buffer_limit = 8 / self.depth |
paul@1 | 211 | |
paul@40 | 212 | def vsync(self, value=0): |
paul@40 | 213 | |
paul@40 | 214 | "Signal the start of a frame." |
paul@40 | 215 | |
paul@40 | 216 | self.csync = value |
paul@40 | 217 | self.video.set_csync(value) |
paul@40 | 218 | |
paul@40 | 219 | def hsync(self, value=0): |
paul@40 | 220 | |
paul@40 | 221 | "Signal the end of a scanline." |
paul@40 | 222 | |
paul@40 | 223 | self.hs = value |
paul@40 | 224 | self.video.set_hs(value) |
paul@40 | 225 | |
paul@40 | 226 | def reset_vertical(self): |
paul@2 | 227 | |
paul@2 | 228 | "Signal the start of a frame." |
paul@1 | 229 | |
paul@2 | 230 | self.line_start = self.address = self.screen_start |
paul@5 | 231 | self.line = self.line_start % LINES_PER_ROW |
paul@3 | 232 | self.ssub = 0 |
paul@31 | 233 | self.y = 0 |
paul@40 | 234 | self.x = 0 |
paul@2 | 235 | |
paul@40 | 236 | def reset_horizontal(self): |
paul@1 | 237 | |
paul@40 | 238 | "Reset horizontal state within the active region of the frame." |
paul@31 | 239 | |
paul@31 | 240 | self.y += 1 |
paul@40 | 241 | self.x = 0 |
paul@40 | 242 | |
paul@40 | 243 | if not self.inside_frame(): |
paul@40 | 244 | return |
paul@2 | 245 | |
paul@3 | 246 | # Support spacing between character rows. |
paul@3 | 247 | |
paul@3 | 248 | if self.ssub: |
paul@3 | 249 | self.ssub -= 1 |
paul@3 | 250 | return |
paul@3 | 251 | |
paul@2 | 252 | self.line += 1 |
paul@2 | 253 | |
paul@3 | 254 | # If not on a row boundary, move to the next line. |
paul@3 | 255 | |
paul@3 | 256 | if self.line % LINES_PER_ROW: |
paul@2 | 257 | self.address = self.line_start + 1 |
paul@2 | 258 | self.wrap_address() |
paul@2 | 259 | |
paul@2 | 260 | # After the end of the last line in a row, the address should already |
paul@2 | 261 | # have been positioned on the last line of the next column. |
paul@1 | 262 | |
paul@2 | 263 | else: |
paul@2 | 264 | self.address -= LINES_PER_ROW - 1 |
paul@2 | 265 | self.wrap_address() |
paul@1 | 266 | |
paul@3 | 267 | # Test for the footer region. |
paul@3 | 268 | |
paul@3 | 269 | if self.spacing and self.line == self.footer: |
paul@22 | 270 | self.ssub = self.margin |
paul@3 | 271 | return |
paul@1 | 272 | |
paul@3 | 273 | # Support spacing between character rows. |
paul@2 | 274 | |
paul@22 | 275 | self.ssub = self.spacing |
paul@3 | 276 | |
paul@3 | 277 | self.line_start = self.address |
paul@1 | 278 | |
paul@40 | 279 | def in_frame(self): return MIN_PIXELLINE <= self.y < MAX_PIXELLINE |
paul@40 | 280 | def inside_frame(self): return MIN_PIXELLINE < self.y < MAX_PIXELLINE |
paul@40 | 281 | def read_pixels(self): return MIN_PIXELPOS - 8 <= self.x < MAX_PIXELPOS - 8 and self.in_frame() |
paul@40 | 282 | def make_pixels(self): return MIN_PIXELPOS <= self.x < MAX_PIXELPOS and self.in_frame() |
paul@31 | 283 | |
paul@31 | 284 | def update(self): |
paul@1 | 285 | |
paul@2 | 286 | """ |
paul@40 | 287 | Update the state of the ULA for each clock cycle. This involves updating |
paul@40 | 288 | the pixel colour by reading from the pixel buffer. |
paul@2 | 289 | """ |
paul@2 | 290 | |
paul@40 | 291 | # Detect the end of the scanline. |
paul@40 | 292 | |
paul@40 | 293 | if self.x == MAX_SCANPOS: |
paul@40 | 294 | self.reset_horizontal() |
paul@40 | 295 | |
paul@40 | 296 | # Detect the end of the frame. |
paul@40 | 297 | |
paul@40 | 298 | if self.y == MAX_SCANLINE: |
paul@40 | 299 | self.reset_vertical() |
paul@40 | 300 | |
paul@40 | 301 | |
paul@40 | 302 | |
paul@40 | 303 | # Clock management. |
paul@40 | 304 | |
paul@40 | 305 | access_ram = self.access == 0 and self.read_pixels() and not self.ssub |
paul@40 | 306 | |
paul@40 | 307 | # Set row address (for ULA access only). |
paul@40 | 308 | |
paul@40 | 309 | if self.cycle == 0: |
paul@40 | 310 | |
paul@40 | 311 | # NOTE: Propagate CPU address here. |
paul@40 | 312 | |
paul@40 | 313 | if access_ram: |
paul@40 | 314 | self.ram_address = (self.address & 0xff80) >> 7 |
paul@40 | 315 | |
paul@40 | 316 | # Latch row address, set column address (for ULA access only). |
paul@40 | 317 | |
paul@40 | 318 | elif self.cycle == 1: |
paul@40 | 319 | |
paul@40 | 320 | # NOTE: Permit CPU access here. |
paul@31 | 321 | |
paul@40 | 322 | if access_ram: |
paul@40 | 323 | self.ram.row_select(self.ram_address) |
paul@40 | 324 | |
paul@40 | 325 | # NOTE: Propagate CPU address here. |
paul@40 | 326 | |
paul@40 | 327 | if access_ram: |
paul@40 | 328 | self.ram_address = (self.address & 0x7f) << 1 |
paul@40 | 329 | |
paul@40 | 330 | # Latch column address. |
paul@40 | 331 | |
paul@40 | 332 | elif self.cycle == 2: |
paul@40 | 333 | |
paul@40 | 334 | # NOTE: Permit CPU access here. |
paul@31 | 335 | |
paul@40 | 336 | if access_ram: |
paul@40 | 337 | self.ram.column_select(self.ram_address) |
paul@40 | 338 | |
paul@40 | 339 | # Read 4 bits (for ULA access only). |
paul@40 | 340 | # NOTE: Perhaps map alternate bits, not half-bytes. |
paul@40 | 341 | |
paul@40 | 342 | elif self.cycle == 3: |
paul@40 | 343 | |
paul@40 | 344 | # NOTE: Propagate CPU data here. |
paul@40 | 345 | |
paul@40 | 346 | if access_ram: |
paul@40 | 347 | self.data = self.ram.data << 4 |
paul@40 | 348 | |
paul@40 | 349 | # Set column address (for ULA access only). |
paul@40 | 350 | |
paul@40 | 351 | elif self.cycle == 4: |
paul@40 | 352 | self.ram.column_deselect() |
paul@31 | 353 | |
paul@40 | 354 | # NOTE: Propagate CPU address here. |
paul@40 | 355 | |
paul@40 | 356 | if access_ram: |
paul@40 | 357 | self.ram_address = (self.address & 0x7f) << 1 | 0x1 |
paul@40 | 358 | |
paul@40 | 359 | # Latch column address. |
paul@40 | 360 | |
paul@40 | 361 | elif self.cycle == 5: |
paul@40 | 362 | |
paul@40 | 363 | # NOTE: Permit CPU access here. |
paul@40 | 364 | |
paul@40 | 365 | if access_ram: |
paul@40 | 366 | self.ram.column_select(self.ram_address) |
paul@31 | 367 | |
paul@40 | 368 | # Read 4 bits (for ULA access only). |
paul@40 | 369 | # NOTE: Perhaps map alternate bits, not half-bytes. |
paul@40 | 370 | |
paul@40 | 371 | elif self.cycle == 6: |
paul@40 | 372 | |
paul@40 | 373 | # NOTE: Propagate CPU data here. |
paul@40 | 374 | |
paul@40 | 375 | if access_ram: |
paul@40 | 376 | self.data = self.data | self.ram.data |
paul@40 | 377 | |
paul@40 | 378 | # Advance to the next column. |
paul@40 | 379 | |
paul@40 | 380 | self.address += LINES_PER_ROW |
paul@40 | 381 | self.wrap_address() |
paul@40 | 382 | |
paul@40 | 383 | # Reset addresses. |
paul@31 | 384 | |
paul@40 | 385 | elif self.cycle == 7: |
paul@40 | 386 | self.ram.column_deselect() |
paul@40 | 387 | self.ram.row_deselect() |
paul@40 | 388 | |
paul@40 | 389 | # Update the RAM access controller. |
paul@40 | 390 | |
paul@40 | 391 | self.access = (self.access + 1) % self.access_frequency |
paul@40 | 392 | |
paul@40 | 393 | self.cycle = (self.cycle + 1) % 8 |
paul@40 | 394 | |
paul@40 | 395 | |
paul@40 | 396 | |
paul@40 | 397 | # Video signalling. |
paul@40 | 398 | |
paul@40 | 399 | # Detect any sync conditions. |
paul@31 | 400 | |
paul@40 | 401 | if self.x == 0: |
paul@40 | 402 | self.hsync() |
paul@40 | 403 | if self.y == 0: |
paul@40 | 404 | self.vsync() |
paul@40 | 405 | |
paul@40 | 406 | # Detect the end of hsync. |
paul@31 | 407 | |
paul@40 | 408 | elif self.x == MAX_HSYNC: |
paul@40 | 409 | self.hsync(1) |
paul@40 | 410 | |
paul@40 | 411 | # Detect the end of vsync. |
paul@40 | 412 | |
paul@40 | 413 | elif self.y == MAX_CSYNC and self.x == MAX_SCANPOS / 2: |
paul@40 | 414 | self.vsync(1) |
paul@40 | 415 | |
paul@40 | 416 | |
paul@40 | 417 | |
paul@40 | 418 | # Pixel production. |
paul@31 | 419 | |
paul@3 | 420 | # Detect spacing between character rows. |
paul@3 | 421 | |
paul@40 | 422 | if not self.make_pixels() or self.ssub: |
paul@31 | 423 | self.video.colour = BLANK |
paul@3 | 424 | |
paul@31 | 425 | # For pixels within the frame, obtain and output the value. |
paul@31 | 426 | |
paul@31 | 427 | else: |
paul@40 | 428 | # Detect the start of the pixel generation. |
paul@40 | 429 | |
paul@40 | 430 | if self.x == MIN_PIXELPOS: |
paul@40 | 431 | self.xcounter = self.xscale |
paul@40 | 432 | self.buffer_index = 0 |
paul@40 | 433 | self.fill_pixel_buffer() |
paul@1 | 434 | |
paul@31 | 435 | # Scale pixels horizontally, only accessing the next pixel value |
paul@31 | 436 | # after the required number of scan positions. |
paul@22 | 437 | |
paul@40 | 438 | elif self.xcounter == 0: |
paul@40 | 439 | self.xcounter = self.xscale |
paul@31 | 440 | self.buffer_index += 1 |
paul@31 | 441 | |
paul@40 | 442 | # Fill the pixel buffer, assuming that data is available. |
paul@22 | 443 | |
paul@40 | 444 | if self.buffer_index >= self.buffer_limit: |
paul@40 | 445 | self.buffer_index = 0 |
paul@40 | 446 | self.fill_pixel_buffer() |
paul@22 | 447 | |
paul@40 | 448 | self.xcounter -= 1 |
paul@31 | 449 | self.video.colour = self.buffer[self.buffer_index] |
paul@2 | 450 | |
paul@31 | 451 | self.x += 1 |
paul@2 | 452 | |
paul@2 | 453 | def fill_pixel_buffer(self): |
paul@1 | 454 | |
paul@2 | 455 | """ |
paul@2 | 456 | Fill the pixel buffer by translating memory content for the current |
paul@2 | 457 | mode. |
paul@2 | 458 | """ |
paul@1 | 459 | |
paul@40 | 460 | byte_value = self.data # which should have been read automatically |
paul@1 | 461 | |
paul@2 | 462 | i = 0 |
paul@2 | 463 | for colour in decode(byte_value, self.depth): |
paul@12 | 464 | self.buffer[i] = get_physical_colour(ULA.palette[colour]) |
paul@2 | 465 | i += 1 |
paul@2 | 466 | |
paul@2 | 467 | def wrap_address(self): |
paul@2 | 468 | if self.address >= SCREEN_LIMIT: |
paul@2 | 469 | self.address -= self.screen_size |
paul@1 | 470 | |
paul@1 | 471 | def get_physical_colour(value): |
paul@1 | 472 | |
paul@1 | 473 | """ |
paul@1 | 474 | Return the physical colour as an RGB triple for the given 'value'. |
paul@1 | 475 | """ |
paul@1 | 476 | |
paul@1 | 477 | return value & 1, value >> 1 & 1, value >> 2 & 1 |
paul@1 | 478 | |
paul@1 | 479 | def decode(value, depth): |
paul@1 | 480 | |
paul@1 | 481 | """ |
paul@1 | 482 | Decode the given byte 'value' according to the 'depth' in bits per pixel, |
paul@1 | 483 | returning a sequence of pixel values. |
paul@1 | 484 | """ |
paul@1 | 485 | |
paul@1 | 486 | if depth == 1: |
paul@1 | 487 | return (value >> 7, value >> 6 & 1, value >> 5 & 1, value >> 4 & 1, |
paul@1 | 488 | value >> 3 & 1, value >> 2 & 1, value >> 1 & 1, value & 1) |
paul@1 | 489 | elif depth == 2: |
paul@1 | 490 | return (value >> 6 & 2 | value >> 3 & 1, value >> 5 & 2 | value >> 2 & 1, |
paul@1 | 491 | value >> 4 & 2 | value >> 1 & 1, value >> 3 & 2 | value & 1) |
paul@1 | 492 | elif depth == 4: |
paul@1 | 493 | return (value >> 4 & 8 | value >> 3 & 4 | value >> 2 & 2 | value >> 1 & 1, |
paul@1 | 494 | value >> 3 & 8 | value >> 2 & 4 | value >> 1 & 2 | value & 1) |
paul@1 | 495 | else: |
paul@8 | 496 | raise ValueError("Only depths of 1, 2 and 4 are supported, not %d." % depth) |
paul@1 | 497 | |
paul@1 | 498 | # Convenience functions. |
paul@1 | 499 | |
paul@1 | 500 | def encode(values, depth): |
paul@1 | 501 | |
paul@1 | 502 | """ |
paul@1 | 503 | Encode the given 'values' according to the 'depth' in bits per pixel, |
paul@1 | 504 | returning a byte value for the pixels. |
paul@1 | 505 | """ |
paul@1 | 506 | |
paul@1 | 507 | result = 0 |
paul@1 | 508 | |
paul@1 | 509 | if depth == 1: |
paul@1 | 510 | for value in values: |
paul@1 | 511 | result = result << 1 | (value & 1) |
paul@1 | 512 | elif depth == 2: |
paul@1 | 513 | for value in values: |
paul@1 | 514 | result = result << 1 | (value & 2) << 3 | (value & 1) |
paul@1 | 515 | elif depth == 4: |
paul@1 | 516 | for value in values: |
paul@1 | 517 | result = result << 1 | (value & 8) << 3 | (value & 4) << 2 | (value & 2) << 1 | (value & 1) |
paul@1 | 518 | else: |
paul@8 | 519 | raise ValueError("Only depths of 1, 2 and 4 are supported, not %d." % depth) |
paul@1 | 520 | |
paul@1 | 521 | return result |
paul@1 | 522 | |
paul@11 | 523 | def get_ula(): |
paul@11 | 524 | |
paul@31 | 525 | "Return a ULA initialised with a memory array and video." |
paul@31 | 526 | |
paul@40 | 527 | return ULA(get_ram(), get_video()) |
paul@11 | 528 | |
paul@31 | 529 | def get_video(): |
paul@31 | 530 | |
paul@31 | 531 | "Return a video circuit." |
paul@31 | 532 | |
paul@31 | 533 | return Video() |
paul@11 | 534 | |
paul@40 | 535 | def get_ram(): |
paul@10 | 536 | |
paul@40 | 537 | "Return an instance representing the computer's RAM hardware." |
paul@7 | 538 | |
paul@40 | 539 | return RAM() |
paul@1 | 540 | |
paul@7 | 541 | # Test program providing coverage (necessary for compilers like Shedskin). |
paul@7 | 542 | |
paul@7 | 543 | if __name__ == "__main__": |
paul@11 | 544 | ula = get_ula() |
paul@12 | 545 | ula.set_mode(6) |
paul@40 | 546 | ula.reset() |
paul@41 | 547 | ula.ram.fill(0x6000, 0x8000, encode((1, 0, 1, 0, 1, 0, 1, 0), 1)) |
paul@7 | 548 | |
paul@7 | 549 | # Make a simple two-dimensional array of tuples (three-dimensional in pygame |
paul@7 | 550 | # terminology). |
paul@7 | 551 | |
paul@29 | 552 | a = update(ula) |
paul@7 | 553 | |
paul@1 | 554 | # vim: tabstop=4 expandtab shiftwidth=4 |