1.1 --- a/ULA.txt Sun May 26 20:59:38 2013 +0200
1.2 +++ b/ULA.txt Fri Jul 05 01:07:38 2013 +0200
1.3 @@ -45,16 +45,21 @@
1.4 16 MHz cycle: 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 ...
1.5 ~RAS: 0 1 0 1 ...
1.6 ~CAS: 0 1 0 1 0 1 0 1 ...
1.7 - A B B A B B ...
1.8 + A B C A B C ...
1.9 F S F S ...
1.10 - a b b a b b ...
1.11 + a b c a b c ...
1.12
1.13 -Here, "A" indicates the row and column addresses being latched into the RAM
1.14 -(on a negative edge for ~RAS and ~CAS respectively), and "B" indicates the
1.15 -second column address being latched into the RAM. Presumably, the first and
1.16 -second half-bytes can be read at "F" and "S" respectively, and the row and
1.17 -column addresses must be made available at "a" and "b" respectively at the
1.18 -latest.
1.19 +Here, "A" and "B" respectively indicate the row and first column addresses
1.20 +being latched into the RAM (on a negative edge for ~RAS and ~CAS
1.21 +respectively), and "C" indicates the second column address being latched into
1.22 +the RAM. Presumably, the first and second half-bytes can be read at "F" and
1.23 +"S" respectively, and the row and column addresses must be made available at
1.24 +"a" and "b" (and "c") respectively at the latest.
1.25 +
1.26 +The TM4164EC4-15 has a row address access time of 150ns (maximum) and a column
1.27 +address access time of 90ns (maximum), which appears to mean that
1.28 +approximately two 16MHz cycles after the row address is latched, and one and a
1.29 +half cycles after the column address is latched, the data becomes available.
1.30
1.31 Note that the Service Manual refers to the negative edge of RAS and CAS, but
1.32 the datasheet for the similar TM4164EC4 product shows latching on the negative
1.33 @@ -144,7 +149,7 @@
1.34 -----------------------
1.35
1.36 The documentation for the Electron mentions 4164-15 RAM chips for IC4-7, and
1.37 -the Samsung-produced KM4164 series is apparently equivalent to the Texas
1.38 +the Samsung-produced KM41464 series is apparently equivalent to the Texas
1.39 Instruments 4164 chips presumably used in the Electron.
1.40
1.41 The TM4164EC4 series combines 4 64K x 1b units into a single package and
1.42 @@ -172,6 +177,14 @@
1.43 the Samsung KM41464A-15 and NEC µPD41464 employ 18 pins, eliminating 4 pins by
1.44 employing 4 pins for both input and output.
1.45
1.46 + Pins I/O pins Row access Column access
1.47 + ---- -------- ---------- -------------
1.48 +TM4164EC4 22 4 + 4 150ns (15) 90ns (15)
1.49 +KM41464AP 18 4 150ns (15) 75ns (15)
1.50 +NTE21256 16 1 + 1 150ns 75ns
1.51 +HYB 4164-2 16 1 + 1 150ns 100ns
1.52 +µPD41464 18 4 120ns (12) 60ns (12)
1.53 +
1.54 See: TM4164EC4 65,536 by 4-Bit Dynamic RAM Module
1.55 http://www.datasheetarchive.com/dl/Datasheets-112/DSAP0051030.pdf
1.56 See: KM4164B 64K x 1 Bit Dynamic RAM with Page Mode