1.1 --- a/ula.py Sun Jun 19 16:15:39 2016 +0200
1.2 +++ b/ula.py Sun Jun 19 16:18:57 2016 +0200
1.3 @@ -363,7 +363,8 @@
1.4
1.5 # Clock management.
1.6
1.7 - access_ram = not self.nmi and self.access == 0 and self.read_pixels() and not self.ssub
1.8 + would_access_ram = self.access == 0 and self.read_pixels() and not self.ssub
1.9 + access_ram = not self.nmi and would_access_ram
1.10
1.11 # Set row address (for ULA access only).
1.12
1.13 @@ -448,13 +449,14 @@
1.14 if access_ram:
1.15 self.data = self.data | self.ram.data
1.16 self.have_pixels = 1
1.17 + else:
1.18 + self.cpu_transfer_low()
1.19
1.20 - # Advance to the next column.
1.21 + # Advance to the next column even if an NMI is asserted.
1.22
1.23 + if would_access_ram:
1.24 self.address += LINES_PER_ROW
1.25 self.wrap_address()
1.26 - else:
1.27 - self.cpu_transfer_low()
1.28
1.29 # Reset addresses.
1.30