ULA

Shortlog

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3 weeks ago Paul Boddie Added planar graphics display remarks. default tip
3 weeks ago Paul Boddie Added memory pricing details.
10 months ago Paul Boddie Added remarks about text mode screen sizes and memory layouts.
10 months ago Paul Boddie Moved the new section to be adjacent to a related section, adding some notes.
10 months ago Paul Boddie Added a suggested text mode approach.
17 months ago Paul Boddie Fixed CPU clock cycle scheduling, synchronising with memory signalling.
17 months ago Paul Boddie Refined the address timing details slightly.
17 months ago Paul Boddie Added notes about dual page mode transfers in each 2MHz cycle for an 8-bit RAM
17 months ago Paul Boddie Updated datasheet URL.
2022-03-02 Paul Boddie Added more 8-bit wide RAM access notes plus alternative keyboard matrix support.
2021-12-31 Paul Boddie Added more remarks about 8-bit wide RAM access.
2021-12-31 Paul Boddie Added Acorn dealer pricing note.
2021-03-06 Paul Boddie Added more RAM pricing data.
2021-03-06 Paul Boddie Added a note about 4MHz CPU/ULA memory access interleaving.
2020-11-11 Paul Boddie Added character generator support enhancement.
2020-08-23 Paul Boddie Expanded mode property relationship descriptions; introduced tables.
2020-08-23 Paul Boddie Added notes about mode numbering and selection in the ULA, suggesting an
2020-08-22 Paul Boddie Added more component pricing details and discussion.
2020-08-01 Paul Boddie Added notes about memory pricing and other machines using the 4164.
2020-04-28 Paul Boddie Added a note about the CPU performance limitations of suspending ULA RAM access.
2020-04-16 Paul Boddie Added notes on two-bytes-per-cycle ULA accesses and related considerations.
2020-04-16 Paul Boddie Added benchmark observations and a table of standard bandwidth characteristics.
2020-04-15 Paul Boddie Added clarifications about the use of 8MHz cycles with an 8-bit memory channel.
2020-04-13 Paul Boddie Added notes on 4164 RAM costs referencing historical remarks.
2020-04-12 Paul Boddie Added more remarks, particularly regarding direct CPU access to RAM.
2020-04-07 Paul Boddie Added remarks on 8-bit wide RAM access and possible 8MHz ULA frequency.
2020-04-07 Paul Boddie Added some memory bandwidth and architecture notes.
2019-11-26 Paul Boddie Added a note about keyboard access timings.
2019-04-09 Paul Boddie Added some notes about RAM access and the limitations applying to the CPU.
2019-02-24 Paul Boddie Made clarification about 1MHz RAM access, added 2MHz bandwidth figure.
2019-02-22 Paul Boddie Added some notes about video expansions and ULA simplification.
2017-04-12 Paul Boddie Noted that the ULA could re-read the character values and just increment an
2017-04-11 Paul Boddie Added notes about text-only modes, plus character and attribute value retrieval
2017-03-31 Paul Boddie Added CPU clock input and output notes.
2016-11-14 Paul Boddie Added a note about the CPU clock phases.
2016-09-04 Paul Boddie Added explicit reason for 2MHz RAM access not being feasible.
2016-06-23 Paul Boddie Introduced explicit next_frame calls after updating the screen start address.
2016-06-23 Paul Boddie Attempted to introduce hardware description language limitations, restructuring
2016-06-22 Paul Boddie Introduced a separate state-updating method and reordered methods.
2016-06-22 Paul Boddie Moved pixel generation to after the state update in the negative edge handler.
2016-06-22 Paul Boddie Moved video signalling into the negative edge handler in order to consolidate
2016-06-21 Paul Boddie Added notes about RAM access limitations preventing 2MHz RAM access by the CPU.
2016-06-21 Paul Boddie Removed the width instance attribute.
2016-06-21 Paul Boddie Moved address preparation onto negative edges and data acquisition onto positive
2016-06-21 Paul Boddie Shifted the timing states so that cycle 0 is aligned with the positive edge of
2016-06-21 Paul Boddie Refined and expanded the RAM access timings, moving data transfers to the
2016-06-20 Paul Boddie Renamed address to pixel_address.
2016-06-20 Paul Boddie Added initial CPU abstraction support together with read/write selection and
2016-06-20 Paul Boddie Made the next_vertical control-flow more hierarchical.
2016-06-20 Paul Boddie Introduced positive and negative signal transition update methods in order to
2016-06-20 Paul Boddie Tidied, introducing a write_pixels function, removing PIXEL_POSITIONS.
2016-06-20 Paul Boddie Fixed and tidied up pixel production, employing the general state counter for
2016-06-20 Paul Boddie Fixed the timing of pixel data decoding. Made the pixel data a plain integer.
2016-06-20 Paul Boddie Initialise the palette as red/green/blue triples.
2016-06-19 Paul Boddie Replaced the pixel buffer with translated byte data and a function converting
2016-06-19 Paul Boddie Changed the processing of pixel data and added remarks about pixel layout.
2016-06-19 Paul Boddie Replaced row spacing variables with row height and row offset variables.
2016-06-19 Paul Boddie Renamed reset methods and tidied slightly.
2016-06-19 Paul Boddie Separated address updating from the NMI-dependent RAM access condition.
2016-06-19 Paul Boddie Use the horizontal position counter by itself to manage the pixel buffer.
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