1 #ifndef __VGA_H__ 2 #define __VGA_H__ 3 4 #define LINE_LENGTH 160 /* pixels */ 5 #define LINE_COUNT 256 /* distinct display lines */ 6 7 #define HFREQ_LIMIT 643 /* 24MHz cycles */ 8 #define HSYNC_START 460 /* 24MHz cycles */ 9 #define HSYNC_LIMIT 64 /* 24MHz cycles */ 10 #define HSYNC_END (HSYNC_START + HSYNC_LIMIT) 11 12 #define VISIBLE_START 70 /* horizontal lines, back porch end */ 13 #define VFP_START (VISIBLE_START + 2 * LINE_COUNT) 14 #define VSYNC_START 620 /* horizontal lines, front porch end */ 15 #define VSYNC_END 622 /* horizontal lines, back porch start */ 16 17 #define SCREEN_BASE 256 18 #define SCREEN_SIZE (40 * 1024) 19 #define SCREEN_LIMIT (SCREEN_BASE + SCREEN_SIZE) 20 21 #define SCREEN_BASE_KSEG0 (KSEG0_BASE + SCREEN_BASE) 22 #define SCREEN_LIMIT_KSEG0 (KSEG0_BASE + SCREEN_LIMIT) 23 24 #define IRQ_STACK_LIMIT SCREEN_BASE_KSEG0 25 #define IRQ_STACK_TOP (IRQ_STACK_LIMIT - 56) 26 27 #endif /* __VGA_H__ */
