# HG changeset patch # User Paul Boddie # Date 1475095361 -7200 # Node ID c8858c073383e7e87fab0060f79671ef84785d2e # Parent c4a05ef934c8a2fa178b00fff3e7f508cc0e7b86 Reordered sections and added the 74HC08 pinout. diff -r c4a05ef934c8 -r c8858c073383 README.txt --- a/README.txt Tue Sep 27 00:36:33 2016 +0200 +++ b/README.txt Wed Sep 28 22:42:41 2016 +0200 @@ -202,6 +202,20 @@ Pin 31 for the Am29F010 would need to be asserted. Thus pin 30 might also be routed to pin 31, so that the device would remain read-only at all times. +Pins +---- + +A0-A16 17-bit addressing +DQ0-DQ7 8-bit data transfer +CE# chip enable +OE# output enable +WE# write enable +VCC 5V +VSS ground +NC (not connected) + + + Dual ROM Adapter Usage ====================== @@ -280,6 +294,17 @@ pairs of sectors can be manually selected. A mechanism could also be devised to allow selection using logic, but this is not explored here. +74HC08 Pinout +------------- + +1A 1 \/ 14 VCC +1B 2 13 4B +1Y 3 12 4A +2A 4 11 4Y +2B 5 10 3B +2Y 6 9 3A +GND 7 8 3Y + Arduino Interfacing @@ -303,20 +328,6 @@ from the latch-based mechanism. As a result, only 14 pins are needed on the Arduino. -74HC273 Pinout --------------- - -MR# 1 \/ 20 VCC -Q0 2 19 Q7 -D0 3 18 D7 -D1 4 17 D6 -Q1 5 16 Q6 -Q2 6 15 Q5 -D2 7 14 D5 -D3 8 13 D4 -Q3 9 12 Q4 -GND 10 11 CP - Arduino 74HC273 #1 74HC273 #2 Am29F010 ------- ---------- ---------- -------- A5 CE# @@ -353,6 +364,20 @@ 5V VCC VCC VCC GND GND GND VSS +74HC273 Pinout +-------------- + +MR# 1 \/ 20 VCC +Q0 2 19 Q7 +D0 3 18 D7 +D1 4 17 D6 +Q1 5 16 Q6 +Q2 6 15 Q5 +D2 7 14 D5 +D3 8 13 D4 +Q3 9 12 Q4 +GND 10 11 CP + Set Address ----------- @@ -392,18 +417,6 @@ from the shift-register-based mechanism. As a result, only 15 pins are needed on the Arduino. -74HC595 Pinout --------------- - -QB 1 \/ 16 VCC -QC 2 15 QA -QD 3 14 SI -QE 4 13 G# -QF 5 12 RCK -QG 6 11 SCK -QH 7 10 SCLR# -GND 8 9 QH' - Arduino 74HC595#1 74HC595#2 Am29F010 ------- --------- --------- -------- A5 CE# @@ -442,17 +455,17 @@ GND G# G# GND GND GND VSS -Pins -==== +74HC595 Pinout +-------------- -A0-A16 17-bit addressing -DQ0-DQ7 8-bit data transfer -CE# chip enable -OE# output enable -WE# write enable -VCC 5V -VSS ground -NC (not connected) +QB 1 \/ 16 VCC +QC 2 15 QA +QD 3 14 SI +QE 4 13 G# +QF 5 12 RCK +QG 6 11 SCK +QH 7 10 SCLR# +GND 8 9 QH'