1.1 --- a/README.txt Tue Jan 20 22:51:05 2015 +0100
1.2 +++ b/README.txt Tue Jan 20 23:16:57 2015 +0100
1.3 @@ -1,6 +1,48 @@
1.4 The Am29F010-90PC product has been used to test the software and hardware
1.5 design described here.
1.6
1.7 +Device Compatibility
1.8 +====================
1.9 +
1.10 +For use with an Acorn Electron ROM cartridge or other board providing a ROM
1.11 +socket, the compatibility of the Am29F010 needs to be assessed in the context
1.12 +of the ROM sockets likely to be provided.
1.13 +
1.14 +Original ROM Pinout Am29F010 Pinout
1.15 +------------------- ---------------
1.16 +
1.17 + 1 \/ 32 VCC
1.18 + A16 2 31 WE#
1.19 + 1 \/ 28 VCC A15 3 30
1.20 +A12 2 27 A14 A12 4 29 A14
1.21 +A7 3 26 A13 A7 5 28 A13
1.22 +A6 4 25 A8 A6 6 27 A8
1.23 +A5 5 24 A9 A5 7 26 A9
1.24 +A4 6 23 A11 A4 8 25 A11
1.25 +A3 7 22 OE# A3 9 24 OE#
1.26 +A2 8 21 A10 A2 10 23 A10
1.27 +A1 9 20 CS# A1 11 22 CE#
1.28 +A0 10 19 D7 A0 12 21 DQ7
1.29 +D0 11 18 D6 DQ0 13 20 DQ6
1.30 +D1 12 17 D5 DQ1 14 19 DQ5
1.31 +D2 13 16 D4 DQ2 15 18 DQ4
1.32 +GND 14 15 D3 GND/VSS 16 17 DQ3
1.33 +
1.34 +Superimposing the Am29F010 onto a ROM socket would provide compatibility for
1.35 +all pins from A12 to GND/VSS and from A14 to D3/DQ3.
1.36 +
1.37 +Pin 1 in a ROM socket would correspond to A15 but is not necessarily
1.38 +connected, nor, perhaps, is A14 since only 14 bits are required to address 16
1.39 +kilobytes, although there may be 32 kilobyte sockets connecting A14 and using
1.40 +15 bits to address 32K.
1.41 +
1.42 +Pin 28 is a ROM socket would provide power, but the corresponding pin 30 on an
1.43 +Am29F010 is not connected. Thus pin 30 would need routing to pin 32 for the
1.44 +flash device socket.
1.45 +
1.46 +Pin 31 for the Am29F010 would need to be asserted. Thus pin 30 might also be
1.47 +routed to pin 31, so that the device would remain read-only at all times.
1.48 +
1.49 Pins
1.50 ====
1.51
1.52 @@ -115,14 +157,14 @@
1.53 A3 WE#
1.54 2 CP
1.55 3 CP
1.56 -4 D0 (*) D0 (*) DQ0
1.57 -5 D1 (*) D1 (*) DQ1
1.58 -6 D2 (*) D2 (*) DQ2
1.59 -7 D3 (*) D3 (*) DQ3
1.60 -8 D4 (*) D4 (*) DQ4
1.61 -9 D5 (*) D5 (*) DQ5
1.62 -10 D6 (*) D6 (*) DQ6
1.63 -11 D7 (*) D7 (*) DQ7
1.64 +4 D0 D0 DQ0
1.65 +5 D1 D1 DQ1
1.66 +6 D2 D2 DQ2
1.67 +7 D3 D3 DQ3
1.68 +8 D4 D4 DQ4
1.69 +9 D5 D5 DQ5
1.70 +10 D6 D6 DQ6
1.71 +11 D7 D7 DQ7
1.72 Q0 A0
1.73 Q1 A1
1.74 Q2 A2
1.75 @@ -140,16 +182,10 @@
1.76 Q6 A14
1.77 Q7 A15
1.78 GND A16 (not used)
1.79 -5V MR# (**) MR# (**)
1.80 +5V MR# MR#
1.81 5V VCC VCC VCC
1.82 GND GND GND VSS
1.83
1.84 -(*) Apply pull-down resistor to 74HC273 D inputs when driving using switches.
1.85 -(**) Apply pull-up resistor to 74HC273 MR# inputs to preserve state.
1.86 -
1.87 -74HC273 Q outputs may initially be high and should be reset, either driving
1.88 -MR# low or by explicitly latching values onto each device.
1.89 -
1.90 Set Address
1.91 -----------
1.92
