1.1 --- a/README.txt Fri Mar 06 01:02:18 2015 +0100
1.2 +++ b/README.txt Sat Mar 07 23:32:25 2015 +0100
1.3 @@ -61,14 +61,26 @@
1.4 low, an attempt to read from ROM #2 would be occurring, and thus A14 would be
1.5 held high.
1.6
1.7 -ROM #1 CS# ROM #2 CS# Am29F010 A14
1.8 ----------- ---------- ------------
1.9 -0 0 Not defined
1.10 -0 1 0
1.11 -1 0 1
1.12 -1 1 Not defined
1.13 +Meanwhile, the CS# signal for the two ROM sockets would need to be combined to
1.14 +produce a resultant CE# signal for the Am29F010.
1.15 +
1.16 +ROM #1 CS# ROM #2 CS# Am29F010 A14 Am29F010 CE#
1.17 +---------- ---------- ------------ ------------
1.18 +0 0 Not defined Not defined
1.19 +0 1 0 0
1.20 +1 0 1 0
1.21 +1 1 Not defined 1
1.22
1.23 -It might therefore be possible to connect A14 to ROM #1's CS# signal.
1.24 +It might therefore be possible to connect A14 to ROM #1's CS# signal. And the
1.25 +resultant CE# signal could be the product of an AND gate:
1.26 +
1.27 +Am29F010 CE# = ROM #1 CS# AND ROM #2 CS#
1.28 +
1.29 +ROM #1 ROM #2 74HC08 Am29F010
1.30 +------ ------ ------ --------
1.31 +CS# 1A A14
1.32 + CS# 1B
1.33 + 1Y CE#
1.34
1.35 Pins
1.36 ====