1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/blink.S Mon Oct 15 21:59:18 2018 +0200
1.3 @@ -0,0 +1,116 @@
1.4 +/*
1.5 + * Blink LEDs using a PIC32 microcontroller.
1.6 + *
1.7 + * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk>
1.8 + *
1.9 + * This program is free software: you can redistribute it and/or modify
1.10 + * it under the terms of the GNU General Public License as published by
1.11 + * the Free Software Foundation, either version 3 of the License, or
1.12 + * (at your option) any later version.
1.13 + *
1.14 + * This program is distributed in the hope that it will be useful,
1.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.17 + * GNU General Public License for more details.
1.18 + *
1.19 + * You should have received a copy of the GNU General Public License
1.20 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
1.21 + */
1.22 +
1.23 +#include "mips.h"
1.24 +#include "pic32.h"
1.25 +
1.26 +/* Disable JTAG functionality on pins. */
1.27 +
1.28 +.section .devcfg0, "a"
1.29 +.word 0xfffffffb /* DEVCFG0<2> = JTAGEN = 0 */
1.30 +
1.31 +/*
1.32 +Set the oscillator to be the FRC oscillator with PLL, with peripheral clock
1.33 +divided by 2, and FRCDIV+PLL selected.
1.34 +
1.35 +The watchdog timer (FWDTEN) is also disabled.
1.36 +
1.37 +The secondary oscillator pin (FSOSCEN) is disabled to avoid pin conflicts with
1.38 +RPB4.
1.39 +*/
1.40 +
1.41 +.section .devcfg1, "a"
1.42 +.word 0xff7fdfd9 /* DEVCFG1<23> = FWDTEN = 0; DEVCFG1<13:12> = FPBDIV<1:0> = 1;
1.43 + DEVCFG1<5> = FSOSCEN = 0; DEVCFG1<2:0> = FNOSC<2:0> = 001 */
1.44 +
1.45 +/*
1.46 +Set the FRC oscillator PLL function with an input division of 4, an output
1.47 +division of 2, a multiplication of 24, yielding a multiplication of 3.
1.48 +
1.49 +The FRC is apparently at 16MHz and this produces a system clock of 48MHz.
1.50 +*/
1.51 +
1.52 +.section .devcfg2, "a"
1.53 +.word 0xfff9fffb /* DEVCFG2<18:16> = FPLLODIV<2:0> = 001;
1.54 + DEVCFG2<6:4> = FPLLMUL<2:0> = 111;
1.55 + DEVCFG2<2:0> = FPLLIDIV<2:0> = 011 */
1.56 +
1.57 +.text
1.58 +.globl _start
1.59 +
1.60 +_start:
1.61 + /* Set pins for output. */
1.62 +
1.63 + jal init_pins
1.64 + nop
1.65 +
1.66 + /* Clear output (LED). */
1.67 +
1.68 + la $t0, PORTA
1.69 + li $t1, (1 << 3) /* PORTA<3> = RA3 */
1.70 + sw $t1, CLR($t0)
1.71 +
1.72 + /* Main program. */
1.73 +main:
1.74 + li $a1, (3 << 24) /* counter ~= 50000000 */
1.75 +
1.76 + /* Monitoring loop. */
1.77 +loop:
1.78 + addiu $a1, $a1, -1 /* counter -= 1 */
1.79 + bnez $a1, loop
1.80 + nop
1.81 +
1.82 + /* Invert output (LED). */
1.83 +
1.84 + la $t0, PORTA
1.85 + li $t1, (1 << 3) /* PORTA<3> = RA3 */
1.86 + sw $t1, INV($t0)
1.87 +
1.88 + j main
1.89 + nop
1.90 +
1.91 +
1.92 +
1.93 +init_pins:
1.94 + /* DEVCFG0<2> needs setting to 0 before the program is run. */
1.95 +
1.96 + la $v0, CFGCON
1.97 + li $v1, (1 << 3) /* CFGCON<3> = JTAGEN = 0 */
1.98 + sw $v1, CLR($v0)
1.99 +
1.100 +init_outputs:
1.101 + /* Remove analogue features from pins. */
1.102 +
1.103 + la $v0, ANSELA
1.104 + sw $zero, 0($v0) /* ANSELA = 0 */
1.105 + la $v0, ANSELB
1.106 + sw $zero, 0($v0) /* ANSELB = 0 */
1.107 +
1.108 + la $v0, TRISA
1.109 + sw $zero, 0($v0)
1.110 + la $v0, TRISB
1.111 + sw $zero, 0($v0)
1.112 +
1.113 + la $v0, PORTA
1.114 + sw $zero, 0($v0)
1.115 + la $v0, PORTB
1.116 + sw $zero, 0($v0)
1.117 +
1.118 + jr $ra
1.119 + nop