BlinkPIC32

Changeset

1:7ca24825ce7e
23 months ago Paul Boddie raw files shortlog changelog graph Added various comments.
blink.S (file)
     1.1 --- a/blink.S	Mon Oct 15 21:59:18 2018 +0200
     1.2 +++ b/blink.S	Wed Oct 17 22:50:15 2018 +0200
     1.3 @@ -44,6 +44,9 @@
     1.4  division of 2, a multiplication of 24, yielding a multiplication of 3.
     1.5  
     1.6  The FRC is apparently at 16MHz and this produces a system clock of 48MHz.
     1.7 +
     1.8 +The peripheral clock frequency (FPB) will be 24MHz given the above DEVCFG1
     1.9 +settings.
    1.10  */
    1.11  
    1.12  .section .devcfg2, "a"
    1.13 @@ -102,11 +105,15 @@
    1.14  	la $v0, ANSELB
    1.15  	sw $zero, 0($v0)	/* ANSELB = 0 */
    1.16  
    1.17 +	/* Set pins as outputs. */
    1.18 +
    1.19  	la $v0, TRISA
    1.20  	sw $zero, 0($v0)
    1.21  	la $v0, TRISB
    1.22  	sw $zero, 0($v0)
    1.23  
    1.24 +	/* Clear outputs. */
    1.25 +
    1.26  	la $v0, PORTA
    1.27  	sw $zero, 0($v0)
    1.28  	la $v0, PORTB