paul@0 | 1 | #include "pic32_c.h" |
paul@0 | 2 | #include "init.h" |
paul@0 | 3 | |
paul@0 | 4 | static void uart_write(char c) |
paul@0 | 5 | { |
paul@0 | 6 | while (REG(U1STA) & (1 << 9)); /* UTXBF (buffer full) */ |
paul@0 | 7 | |
paul@0 | 8 | REG(U1TXREG) = c; |
paul@0 | 9 | } |
paul@0 | 10 | |
paul@0 | 11 | static void bits(uint32_t reg) |
paul@0 | 12 | { |
paul@0 | 13 | uint32_t mask; |
paul@0 | 14 | |
paul@0 | 15 | for (mask = (1 << 31); mask; mask >>= 1) |
paul@0 | 16 | if (REG(reg) & mask) |
paul@0 | 17 | uart_write('1'); |
paul@0 | 18 | else |
paul@0 | 19 | uart_write('0'); |
paul@0 | 20 | |
paul@0 | 21 | uart_write('\r'); |
paul@0 | 22 | uart_write('\n'); |
paul@0 | 23 | } |
paul@0 | 24 | |
paul@0 | 25 | static void blink(uint32_t delay, uint32_t port, uint32_t pins) |
paul@0 | 26 | { |
paul@0 | 27 | uint32_t counter; |
paul@0 | 28 | |
paul@0 | 29 | /* Clear outputs (LED). */ |
paul@0 | 30 | |
paul@0 | 31 | CLR_REG(port, pins); |
paul@0 | 32 | |
paul@0 | 33 | while (1) |
paul@0 | 34 | { |
paul@0 | 35 | counter = delay; |
paul@0 | 36 | |
paul@0 | 37 | while (counter--) __asm__(""); /* retain loop */ |
paul@0 | 38 | |
paul@0 | 39 | /* Invert outputs (LED). */ |
paul@0 | 40 | |
paul@0 | 41 | INV_REG(port, pins); |
paul@0 | 42 | bits(IFS1); |
paul@0 | 43 | } |
paul@0 | 44 | } |
paul@0 | 45 | |
paul@0 | 46 | void main(void) |
paul@0 | 47 | { |
paul@0 | 48 | init_memory(); |
paul@0 | 49 | init_pins(); |
paul@0 | 50 | init_outputs(); |
paul@0 | 51 | |
paul@0 | 52 | unlock_config(); |
paul@0 | 53 | config_uart(); |
paul@0 | 54 | lock_config(); |
paul@0 | 55 | |
paul@0 | 56 | init_uart(7, 3); |
paul@0 | 57 | |
paul@0 | 58 | interrupts_on(); |
paul@0 | 59 | |
paul@0 | 60 | blink(3 << 24, PORTA, 1 << 3); |
paul@0 | 61 | } |
paul@0 | 62 | |
paul@0 | 63 | void exception_handler(void) |
paul@0 | 64 | { |
paul@0 | 65 | blink(3 << 12, PORTA, 1 << 3); |
paul@0 | 66 | } |
paul@0 | 67 | |
paul@0 | 68 | void interrupt_handler(void) |
paul@0 | 69 | { |
paul@0 | 70 | /* Check for a UART receive interrupt condition (U1RIF). */ |
paul@0 | 71 | |
paul@0 | 72 | if (!(REG(IFS1) & (1 << 8))) |
paul@0 | 73 | return; |
paul@0 | 74 | |
paul@0 | 75 | /* Write the received data back. */ |
paul@0 | 76 | |
paul@0 | 77 | INV_REG(PORTA, 1 << 2); |
paul@0 | 78 | |
paul@0 | 79 | while (REG(U1STA) & 1) |
paul@0 | 80 | uart_write((char) REG(U1RXREG)); |
paul@0 | 81 | |
paul@0 | 82 | /* Clear the UART interrupt condition. */ |
paul@0 | 83 | |
paul@0 | 84 | CLR_REG(IFS1, 1 << 8); |
paul@0 | 85 | } |