paul@150 | 1 | = Low-Level CPU Routines = |
paul@150 | 2 | |
paul@150 | 3 | The `lib/cpu.S` file contains low-level routines for handling specific |
paul@150 | 4 | conditions related to the operation of the CPU: |
paul@150 | 5 | |
paul@150 | 6 | `init_interrupts` :: Configures the location of exception and interrupt |
paul@150 | 7 | vectors. |
paul@150 | 8 | |
paul@150 | 9 | `enable_interrupts` :: Enables the delivery of interrupts to the configured |
paul@150 | 10 | non-bootloader vectors. |
paul@150 | 11 | |
paul@150 | 12 | `handle_error_level`:: Handles the initial state of the CPU, making exception |
paul@150 | 13 | and interrupt conditions possible. |
paul@150 | 14 | |
paul@150 | 15 | These routines are called in an appropriate order in the general [[../init| |
paul@150 | 16 | initialisation]] code. |
paul@150 | 17 | |
paul@150 | 18 | To support exceptions and interrupts, the following routines are defined in |
paul@152 | 19 | the `.vectors` section of the payload: |
paul@150 | 20 | |
paul@150 | 21 | `ebase` :: Handles TLB exceptions, jumping to the general exception |
paul@150 | 22 | handler. The PIC32 products tested with this software do not |
paul@150 | 23 | provide hardware that should raise such exceptions, however. |
paul@150 | 24 | |
paul@150 | 25 | `exc_handler` :: Handles exception conditions, switching to a dedicated stack |
paul@150 | 26 | and jumping to the `exception_handler` routine defined by an |
paul@150 | 27 | application. |
paul@150 | 28 | |
paul@150 | 29 | `int_handler` :: Handles interrupt conditions, switching to a dedicated |
paul@150 | 30 | stack, saving register values, jumping to the |
paul@150 | 31 | `interrupt_handler` routine defined by an application, then |
paul@150 | 32 | restoring register values, switching back to the application |
paul@150 | 33 | stack and returning to the interrupted code. |