paul@24 | 1 | /* |
paul@24 | 2 | * Generate a VGA signal using a PIC32 microcontroller. |
paul@24 | 3 | * |
paul@24 | 4 | * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk> |
paul@24 | 5 | * |
paul@24 | 6 | * This program is free software: you can redistribute it and/or modify |
paul@24 | 7 | * it under the terms of the GNU General Public License as published by |
paul@24 | 8 | * the Free Software Foundation, either version 3 of the License, or |
paul@24 | 9 | * (at your option) any later version. |
paul@24 | 10 | * |
paul@24 | 11 | * This program is distributed in the hope that it will be useful, |
paul@24 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@24 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@24 | 14 | * GNU General Public License for more details. |
paul@24 | 15 | * |
paul@24 | 16 | * You should have received a copy of the GNU General Public License |
paul@24 | 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
paul@24 | 18 | */ |
paul@24 | 19 | |
paul@24 | 20 | |
paul@24 | 21 | #include "pic32_c.h" |
paul@24 | 22 | #include "init.h" |
paul@24 | 23 | #include "debug.h" |
paul@41 | 24 | |
paul@41 | 25 | /* Specific functionality. */ |
paul@41 | 26 | |
paul@24 | 27 | #include "main.h" |
paul@47 | 28 | #include "devconfig.h" |
paul@24 | 29 | #include "vga.h" |
paul@41 | 30 | #include "display.h" |
paul@49 | 31 | #include "display_config.h" |
paul@50 | 32 | #include "vga_display.h" |
paul@24 | 33 | |
paul@24 | 34 | |
paul@41 | 35 | |
paul@24 | 36 | /* Pixel data. */ |
paul@24 | 37 | |
paul@24 | 38 | static const uint8_t zerodata[ZERO_LENGTH] = {0}; |
paul@24 | 39 | |
paul@24 | 40 | |
paul@24 | 41 | |
paul@24 | 42 | /* Blink an attached LED with delays implemented using a loop. */ |
paul@24 | 43 | |
paul@24 | 44 | static void blink(uint32_t delay, uint32_t port, uint32_t pins) |
paul@24 | 45 | { |
paul@24 | 46 | uint32_t counter; |
paul@24 | 47 | |
paul@24 | 48 | /* Clear outputs (LED). */ |
paul@24 | 49 | |
paul@24 | 50 | CLR_REG(port, pins); |
paul@24 | 51 | |
paul@24 | 52 | while (1) |
paul@24 | 53 | { |
paul@24 | 54 | counter = delay; |
paul@24 | 55 | |
paul@24 | 56 | while (counter--) __asm__(""); /* retain loop */ |
paul@24 | 57 | |
paul@24 | 58 | /* Invert outputs (LED). */ |
paul@24 | 59 | |
paul@24 | 60 | INV_REG(port, pins); |
paul@24 | 61 | } |
paul@24 | 62 | } |
paul@24 | 63 | |
paul@24 | 64 | |
paul@24 | 65 | |
paul@24 | 66 | /* Main program. */ |
paul@24 | 67 | |
paul@24 | 68 | void main(void) |
paul@24 | 69 | { |
paul@50 | 70 | init_vga(&display_config, start_visible, update_visible, stop_visible, |
paul@50 | 71 | vsync_high, vsync_low); |
paul@41 | 72 | |
paul@49 | 73 | test_linedata(&display_config); |
paul@24 | 74 | |
paul@24 | 75 | init_memory(); |
paul@24 | 76 | init_pins(); |
paul@24 | 77 | init_outputs(); |
paul@24 | 78 | |
paul@24 | 79 | unlock_config(); |
paul@24 | 80 | config_oc(); |
paul@24 | 81 | config_uart(); |
paul@24 | 82 | lock_config(); |
paul@24 | 83 | |
paul@24 | 84 | init_dma(); |
paul@24 | 85 | |
paul@24 | 86 | /* Initiate DMA on the Timer2 interrupt transferring line data to the first |
paul@24 | 87 | byte of PORTB. Do not enable the channel for initiation until the visible |
paul@24 | 88 | region is about to start. */ |
paul@24 | 89 | |
paul@24 | 90 | dma_init(0, 3); |
paul@24 | 91 | dma_set_auto_enable(0, 1); |
paul@24 | 92 | dma_set_interrupt(0, T2, 1); |
paul@49 | 93 | dma_set_transfer(0, PHYSICAL((uint32_t) display_config.screen_start), |
paul@49 | 94 | display_config.line_length, |
paul@24 | 95 | HW_PHYSICAL(PORTB), 1, |
paul@45 | 96 | TRANSFER_CELL_SIZE); |
paul@24 | 97 | |
paul@42 | 98 | /* Enable DMA on the preceding channel's completion, with the timer event |
paul@42 | 99 | initiating the transfer. */ |
paul@24 | 100 | |
paul@24 | 101 | dma_init(1, 3); |
paul@24 | 102 | dma_set_chaining(1, dma_chain_previous); |
paul@42 | 103 | dma_set_interrupt(1, T2, 1); |
paul@24 | 104 | dma_set_transfer(1, PHYSICAL((uint32_t) zerodata), ZERO_LENGTH, |
paul@24 | 105 | HW_PHYSICAL(PORTB), 1, |
paul@24 | 106 | ZERO_LENGTH); |
paul@24 | 107 | dma_set_receive_events(1, 1); |
paul@24 | 108 | |
paul@53 | 109 | /* Configure a timer and output compare units for horizontal and vertical |
paul@53 | 110 | sync. */ |
paul@24 | 111 | |
paul@53 | 112 | vga_configure_sync(1, 2, 2); |
paul@24 | 113 | |
paul@47 | 114 | uart_init(1, FPB, 115200); |
paul@24 | 115 | uart_on(1); |
paul@24 | 116 | |
paul@24 | 117 | interrupts_on(); |
paul@24 | 118 | |
paul@24 | 119 | blink(3 << 24, PORTA, 1 << 3); |
paul@24 | 120 | } |
paul@24 | 121 | |
paul@24 | 122 | |
paul@24 | 123 | |
paul@24 | 124 | /* Exception and interrupt handlers. */ |
paul@24 | 125 | |
paul@24 | 126 | void exception_handler(void) |
paul@24 | 127 | { |
paul@24 | 128 | blink(3 << 12, PORTA, 1 << 3); |
paul@24 | 129 | } |
paul@24 | 130 | |
paul@24 | 131 | void interrupt_handler(void) |
paul@24 | 132 | { |
paul@24 | 133 | uint32_t ifs; |
paul@24 | 134 | |
paul@24 | 135 | /* Check for a OC1 interrupt condition. */ |
paul@24 | 136 | |
paul@24 | 137 | ifs = REG(OCIFS) & OC_INT_FLAGS(1, OCxIF); |
paul@24 | 138 | |
paul@24 | 139 | if (ifs) |
paul@24 | 140 | { |
paul@50 | 141 | vga_interrupt_handler(); |
paul@24 | 142 | CLR_REG(OCIFS, ifs); |
paul@24 | 143 | } |
paul@24 | 144 | } |
paul@24 | 145 | |
paul@24 | 146 | |
paul@24 | 147 | |
paul@50 | 148 | /* Enable the channel for the next line. */ |
paul@24 | 149 | |
paul@50 | 150 | void start_visible(vga_display_t *vga_display) |
paul@50 | 151 | { |
paul@50 | 152 | dma_set_source(0, PHYSICAL((uint32_t) vga_display->linedata), |
paul@50 | 153 | display_config.line_length); |
paul@24 | 154 | dma_on(0); |
paul@24 | 155 | } |
paul@24 | 156 | |
paul@50 | 157 | /* Update the channel for the next line. */ |
paul@24 | 158 | |
paul@50 | 159 | void update_visible(vga_display_t *vga_display) |
paul@50 | 160 | { |
paul@50 | 161 | dma_set_source(0, PHYSICAL((uint32_t) vga_display->linedata), |
paul@50 | 162 | display_config.line_length); |
paul@50 | 163 | } |
paul@41 | 164 | |
paul@50 | 165 | /* Disable the channel for the next line. */ |
paul@24 | 166 | |
paul@50 | 167 | void stop_visible(vga_display_t *vga_display) |
paul@50 | 168 | { |
paul@24 | 169 | dma_off(0); |
paul@24 | 170 | } |
paul@24 | 171 | |
paul@50 | 172 | /* Bring vsync low (single compare, output driven low) when the next line |
paul@50 | 173 | starts. */ |
paul@24 | 174 | |
paul@50 | 175 | void vsync_low(void) |
paul@50 | 176 | { |
paul@24 | 177 | oc_init(2, 0b010, 2); |
paul@24 | 178 | oc_on(2); |
paul@24 | 179 | } |
paul@24 | 180 | |
paul@50 | 181 | /* Bring vsync high (single compare, output driven high) when the next line |
paul@50 | 182 | starts. */ |
paul@24 | 183 | |
paul@50 | 184 | void vsync_high(void) |
paul@50 | 185 | { |
paul@24 | 186 | oc_init(2, 0b001, 2); |
paul@24 | 187 | oc_on(2); |
paul@24 | 188 | } |
paul@24 | 189 | |
paul@24 | 190 | |
paul@24 | 191 | |
paul@24 | 192 | /* Peripheral pin configuration. */ |
paul@24 | 193 | |
paul@24 | 194 | void config_oc(void) |
paul@24 | 195 | { |
paul@24 | 196 | /* Map OC1 to RPA0. */ |
paul@24 | 197 | |
paul@24 | 198 | REG(RPA0R) = 0b0101; /* RPA0R<3:0> = 0101 (OC1) */ |
paul@24 | 199 | |
paul@24 | 200 | /* Map OC2 to RPA1. */ |
paul@24 | 201 | |
paul@24 | 202 | REG(RPA1R) = 0b0101; /* RPA1R<3:0> = 0101 (OC2) */ |
paul@24 | 203 | } |
paul@24 | 204 | |
paul@24 | 205 | void config_uart(void) |
paul@24 | 206 | { |
paul@24 | 207 | /* Map U1RX to RPB13. */ |
paul@24 | 208 | |
paul@24 | 209 | REG(U1RXR) = 0b0011; /* U1RXR<3:0> = 0011 (RPB13) */ |
paul@24 | 210 | |
paul@24 | 211 | /* Map U1TX to RPB15. */ |
paul@24 | 212 | |
paul@24 | 213 | REG(RPB15R) = 0b0001; /* RPB15R<3:0> = 0001 (U1TX) */ |
paul@24 | 214 | |
paul@24 | 215 | /* Set RPB13 to input. */ |
paul@24 | 216 | |
paul@24 | 217 | SET_REG(TRISB, 1 << 13); |
paul@24 | 218 | } |