/*

 * Generate a VGA signal using a PIC32 microcontroller.

 *

 * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk>

 *

 * This program is free software: you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation, either version 3 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#include "pic32_c.h"

#include "init.h"

#include "debug.h"

/* Specific functionality. */

#include "main.h"

#include "devconfig.h"

#include "vga.h"

#include "display.h"

#include "display_config.h"

#include "vga_display.h"

/* Pixel data. */

static const uint8_t zerodata[ZERO_LENGTH] = {0};

/* Blink an attached LED with delays implemented using a loop. */

static void blink(uint32_t delay, uint32_t port, uint32_t pins)

{

    uint32_t counter;

    /* Clear outputs (LED). */

    CLR_REG(port, pins);

    while (1)

    {

        counter = delay;

        while (counter--) __asm__("");	/* retain loop */

        /* Invert outputs (LED). */

        INV_REG(port, pins);

    }

}

/* Main program. */

void main(void)

{

    init_vga(&display_config, start_visible, update_visible, stop_visible,

                              vsync_high, vsync_low);

    test_linedata(&display_config);

    init_memory();

    init_pins();

    init_outputs();

    unlock_config();

    config_oc();

    config_uart();

    lock_config();

    init_dma();

    init_pm();

    /* Configure parallel master mode. */

    pm_init(0, 0b10);

    pm_set_output(0, 1, 0);

    pm_on(0);

    /* Initiate DMA on the Timer2 interrupt transferring line data to the first

       byte of PORTB. Do not enable the channel for initiation until the visible

       region is about to start. */

    dma_init(0, 3);

    dma_set_auto_enable(0, 1);

    dma_set_interrupt(0, T2, 1);

    dma_set_transfer(0, PHYSICAL((uint32_t) display_config.screen_start),

                        display_config.line_length,

                        HW_PHYSICAL(PM_REG(0, PMxDIN)), 1,

                        TRANSFER_CELL_SIZE);

    /* Enable DMA on the preceding channel's completion, with the timer event

       initiating the transfer. This "reset" or "zero" transfer is employed to

       set the pixel level to black in a connected flip-flop. Without the

       flip-flop it is superfluous. */

    dma_init(1, 3);

    dma_set_chaining(1, dma_chain_previous);

    dma_set_interrupt(1, T2, 1);

    dma_set_transfer(1, PHYSICAL((uint32_t) zerodata), ZERO_LENGTH,

                        HW_PHYSICAL(PM_REG(0, PMxDIN)), 1,

                        ZERO_LENGTH);

    dma_set_receive_events(1, 1);

    /* Configure a timer for the horizontal sync. The timer has no prescaling

       (0). */

    timer_init(2, 0, HFREQ_LIMIT);

    timer_on(2);

    /* Horizontal sync. */

    /* Configure output compare in dual compare (continuous output) mode using

       Timer2 as time base. The interrupt condition drives the first DMA channel

       and is handled to drive the display state machine. */

    oc_init(1, 0b101, 2);

    oc_set_pulse(1, HSYNC_END);

    oc_set_pulse_end(1, HSYNC_START);

    oc_init_interrupt(1, 7, 3);

    oc_on(1);

    /* Vertical sync. */

    /* Configure output compare in single compare (output driven low) mode using

       Timer2 as time base. The unit is enabled later. It is only really used to

       achieve precisely-timed level transitions in hardware. */

    oc_init(2, 0b010, 2);

    oc_set_pulse(2, 0);

    uart_init(1, FPB, 115200);

    uart_on(1);

    interrupts_on();

    blink(3 << 24, PORTA, 1 << 2);

}

/* Exception and interrupt handlers. */

void exception_handler(void)

{

    blink(3 << 12, PORTA, 1 << 2);

}

void interrupt_handler(void)

{

    uint32_t ifs;

    /* Check for a OC1 interrupt condition. */

    ifs = REG(OCIFS) & OC_INT_FLAGS(1, OCxIF);

    if (ifs)

    {

        vga_interrupt_handler();

        CLR_REG(OCIFS, ifs);

    }

}

/* Enable the channel for the next line. */

void start_visible(vga_display_t *vga_display)

{

    dma_set_source(0, PHYSICAL((uint32_t) vga_display->linedata),

                               display_config.line_length);

    dma_on(0);

}

/* Update the channel for the next line. */

void update_visible(vga_display_t *vga_display)

{

    dma_set_source(0, PHYSICAL((uint32_t) vga_display->linedata),

                               display_config.line_length);

}

/* Disable the channel for the next line. */

void stop_visible(vga_display_t *vga_display)

{

    dma_off(0);

}

/* Bring vsync low (single compare, output driven low) when the next line

   starts. */

void vsync_low(void)

{

    oc_init(2, 0b010, 2);

    oc_on(2);

}

/* Bring vsync high (single compare, output driven high) when the next line

   starts. */

void vsync_high(void)

{

    oc_init(2, 0b001, 2);

    oc_on(2);

}

/* Peripheral pin configuration. */

void config_oc(void)

{

    /* Map OC1 to RPB4. */

    REG(RPB4R) = 0b0101;        /* RPB4R<3:0> = 0101 (OC1) */

    /* Map OC2 to RPB5. */

    REG(RPB5R) = 0b0101;        /* RPB5R<3:0> = 0101 (OC2) */

}

void config_uart(void)

{

    /* Map U1RX to RPB13. */

    REG(U1RXR) = 0b0011;        /* U1RXR<3:0> = 0011 (RPB13) */

    /* Map U1TX to RPB15. */

    REG(RPB15R) = 0b0001;       /* RPB15R<3:0> = 0001 (U1TX) */

    /* Set RPB13 to input. */

    SET_REG(TRISB, 1 << 13);

}