paul@50 | 1 | /* |
paul@50 | 2 | * Generate a VGA signal using a PIC32 microcontroller. |
paul@50 | 3 | * |
paul@50 | 4 | * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk> |
paul@50 | 5 | * |
paul@50 | 6 | * This program is free software: you can redistribute it and/or modify |
paul@50 | 7 | * it under the terms of the GNU General Public License as published by |
paul@50 | 8 | * the Free Software Foundation, either version 3 of the License, or |
paul@50 | 9 | * (at your option) any later version. |
paul@50 | 10 | * |
paul@50 | 11 | * This program is distributed in the hope that it will be useful, |
paul@50 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@50 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@50 | 14 | * GNU General Public License for more details. |
paul@50 | 15 | * |
paul@50 | 16 | * You should have received a copy of the GNU General Public License |
paul@50 | 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
paul@50 | 18 | */ |
paul@50 | 19 | |
paul@50 | 20 | #include "pic32_c.h" |
paul@53 | 21 | #include "init.h" |
paul@50 | 22 | #include "vga_display.h" |
paul@50 | 23 | |
paul@50 | 24 | |
paul@50 | 25 | |
paul@50 | 26 | /* Display state. */ |
paul@50 | 27 | |
paul@50 | 28 | vga_display_t vga_display; |
paul@50 | 29 | |
paul@56 | 30 | /* Pixel data. */ |
paul@56 | 31 | |
paul@56 | 32 | static const int ZERO_LENGTH = 1; |
paul@56 | 33 | static const uint8_t zerodata[1] = {0}; |
paul@56 | 34 | |
paul@50 | 35 | |
paul@50 | 36 | |
paul@50 | 37 | /* Initialise the state machine. */ |
paul@50 | 38 | |
paul@56 | 39 | void init_vga(display_config_t *display_config, int line_channels, |
paul@59 | 40 | int line_timer, int transfer_int_num) |
paul@50 | 41 | { |
paul@50 | 42 | /* Display parameters. */ |
paul@50 | 43 | |
paul@50 | 44 | vga_display.display_config = display_config; |
paul@56 | 45 | vga_display.line_channels = line_channels; |
paul@50 | 46 | |
paul@50 | 47 | /* Initial state. */ |
paul@50 | 48 | |
paul@50 | 49 | vga_display.state_handler = vbp_active; |
paul@50 | 50 | vga_display.line = 0; |
paul@59 | 51 | |
paul@59 | 52 | /* Configure a general display timer to start line data transfer and for the |
paul@59 | 53 | horizontal sync. */ |
paul@59 | 54 | |
paul@59 | 55 | vga_display.line_timer = line_timer; |
paul@59 | 56 | |
paul@59 | 57 | /* Configure a separate transfer interrupt condition, if indicated. |
paul@59 | 58 | Otherwise, transfers are initiated by the line timer. */ |
paul@59 | 59 | |
paul@59 | 60 | vga_display.transfer_int_num = transfer_int_num; |
paul@59 | 61 | } |
paul@59 | 62 | |
paul@59 | 63 | /* Initialise a separate transfer timer if different from the general display |
paul@59 | 64 | timer. */ |
paul@59 | 65 | |
paul@59 | 66 | void init_vga_with_timers(display_config_t *display_config, int line_channels, |
paul@59 | 67 | int line_timer, int transfer_timer) |
paul@59 | 68 | { |
paul@59 | 69 | /* Initialise the basic properties of the display. */ |
paul@59 | 70 | |
paul@59 | 71 | init_vga(display_config, line_channels, line_timer, |
paul@59 | 72 | transfer_timer ? timer_interrupt_number(transfer_timer) : -1); |
paul@59 | 73 | |
paul@59 | 74 | /* Configure a line timer for horizontal sync and line data transfers. */ |
paul@59 | 75 | |
paul@59 | 76 | /* The timers have no prescaling (0). */ |
paul@59 | 77 | |
paul@59 | 78 | timer_init(line_timer, 0, display_config->hfreq_limit); |
paul@88 | 79 | |
paul@88 | 80 | /* Enable interrupt requests when the CPU needs to perform the transfer, as |
paul@88 | 81 | opposed to the DMA channels doing so. */ |
paul@88 | 82 | |
paul@88 | 83 | if (!line_channels) |
paul@88 | 84 | timer_init_interrupt(line_timer, 7, 3); |
paul@88 | 85 | |
paul@59 | 86 | timer_on(line_timer); |
paul@59 | 87 | |
paul@59 | 88 | /* Configure a separate transfer timer, if indicated. */ |
paul@59 | 89 | |
paul@88 | 90 | if (!line_channels || !transfer_timer || (transfer_timer == line_timer)) |
paul@59 | 91 | return; |
paul@59 | 92 | |
paul@59 | 93 | /* The timer wraps around immediately. */ |
paul@59 | 94 | |
paul@59 | 95 | timer_init(transfer_timer, 0, 1); |
paul@59 | 96 | timer_on(transfer_timer); |
paul@50 | 97 | } |
paul@50 | 98 | |
paul@56 | 99 | |
paul@56 | 100 | |
paul@88 | 101 | /* Configure the transfer of pixel data. */ |
paul@88 | 102 | |
paul@88 | 103 | void vga_configure_transfer(uint32_t output) |
paul@88 | 104 | { |
paul@88 | 105 | vga_display.output = output; |
paul@88 | 106 | |
paul@88 | 107 | if (vga_display.line_channels) |
paul@88 | 108 | vga_configure_dma_transfer(output); |
paul@88 | 109 | } |
paul@88 | 110 | |
paul@56 | 111 | /* Configure DMA channels for the transfer of pixel data. */ |
paul@56 | 112 | |
paul@88 | 113 | void vga_configure_dma_transfer(uint32_t output) |
paul@56 | 114 | { |
paul@56 | 115 | int dual_channel = vga_display.line_channels == 2; |
paul@56 | 116 | int channel = 0; |
paul@56 | 117 | |
paul@59 | 118 | /* Determine whether an initiating channel is used. */ |
paul@59 | 119 | |
paul@59 | 120 | int initiating_channel = vga_display.transfer_int_num >= 0; |
paul@59 | 121 | |
paul@59 | 122 | /* Determine the different interrupt conditions, with pixel data employing |
paul@59 | 123 | any specified transfer condition or the line condition otherwise. */ |
paul@59 | 124 | |
paul@59 | 125 | int line_int_num = timer_interrupt_number(vga_display.line_timer); |
paul@59 | 126 | int transfer_int_num = initiating_channel ? |
paul@59 | 127 | vga_display.transfer_int_num : line_int_num; |
paul@59 | 128 | |
paul@56 | 129 | /* Where dual line channels are involved, put the first before any |
paul@56 | 130 | initiating channel, chaining it to such a channel. */ |
paul@56 | 131 | |
paul@56 | 132 | if (dual_channel) |
paul@56 | 133 | { |
paul@56 | 134 | vga_configure_line_channel(channel++, transfer_int_num, |
paul@56 | 135 | initiating_channel ? dma_chain_next : dma_chain_none, |
paul@56 | 136 | output); |
paul@56 | 137 | } |
paul@56 | 138 | |
paul@59 | 139 | /* Introduce a special initiating channel if a separate transfer interrupt |
paul@59 | 140 | has been indicated. */ |
paul@56 | 141 | |
paul@56 | 142 | if (initiating_channel) |
paul@56 | 143 | { |
paul@59 | 144 | vga_configure_zero_channel(channel++, line_int_num, 1, output); |
paul@56 | 145 | } |
paul@56 | 146 | |
paul@56 | 147 | /* A line channel is always configured, chaining it to any initiating |
paul@56 | 148 | channel. */ |
paul@56 | 149 | |
paul@56 | 150 | vga_configure_line_channel(channel++, transfer_int_num, |
paul@56 | 151 | initiating_channel ? dma_chain_previous : dma_chain_none, |
paul@56 | 152 | output); |
paul@56 | 153 | |
paul@56 | 154 | /* A zero channel is always configured, chaining it to the preceding line |
paul@56 | 155 | channel, with the same transfer interrupt initiating the transfer. */ |
paul@56 | 156 | |
paul@56 | 157 | vga_configure_zero_channel(channel, transfer_int_num, 0, output); |
paul@56 | 158 | } |
paul@56 | 159 | |
paul@56 | 160 | void vga_configure_line_channel(int channel, int int_num, enum dma_chain chain, |
paul@56 | 161 | uint32_t output) |
paul@56 | 162 | { |
paul@56 | 163 | dma_init(channel, 2); |
paul@56 | 164 | |
paul@56 | 165 | /* If initiating, configure to always be enabled. */ |
paul@56 | 166 | |
paul@56 | 167 | if (chain == dma_chain_none) |
paul@56 | 168 | dma_set_auto_enable(channel, 1); |
paul@56 | 169 | |
paul@56 | 170 | /* Chain to either the previous or next channel where a special initiating |
paul@56 | 171 | channel is used. */ |
paul@56 | 172 | |
paul@56 | 173 | else |
paul@56 | 174 | dma_set_chaining(channel, chain); |
paul@56 | 175 | |
paul@56 | 176 | /* Initiate DMA on the transfer interrupt, transferring line data to the |
paul@56 | 177 | first byte of the output word. */ |
paul@56 | 178 | |
paul@56 | 179 | dma_set_interrupt(channel, int_num, 1); |
paul@56 | 180 | |
paul@56 | 181 | dma_set_destination(channel, HW_PHYSICAL(output), 1); |
paul@56 | 182 | dma_set_cell(channel, vga_display.display_config->transfer_cell_size); |
paul@56 | 183 | } |
paul@56 | 184 | |
paul@56 | 185 | void vga_configure_zero_channel(int channel, int int_num, int initiating, |
paul@56 | 186 | uint32_t output) |
paul@56 | 187 | { |
paul@56 | 188 | dma_init(channel, 3); |
paul@56 | 189 | |
paul@56 | 190 | /* If initiating, configure to always be enabled. */ |
paul@56 | 191 | |
paul@56 | 192 | if (initiating) |
paul@56 | 193 | dma_set_auto_enable(channel, 1); |
paul@56 | 194 | |
paul@56 | 195 | /* Otherwise, chain to the preceding channel and register prior transfer |
paul@56 | 196 | events before the channel is activated. */ |
paul@56 | 197 | |
paul@56 | 198 | else |
paul@56 | 199 | { |
paul@56 | 200 | dma_set_chaining(channel, dma_chain_previous); |
paul@56 | 201 | dma_set_receive_events(channel, 1); |
paul@56 | 202 | } |
paul@56 | 203 | |
paul@56 | 204 | /* Transfer upon the indicated interrupt condition. */ |
paul@56 | 205 | |
paul@56 | 206 | dma_set_interrupt(channel, int_num, 1); |
paul@56 | 207 | dma_set_transfer(channel, PHYSICAL((uint32_t) zerodata), |
paul@56 | 208 | ZERO_LENGTH, |
paul@56 | 209 | HW_PHYSICAL(output), 1, |
paul@56 | 210 | ZERO_LENGTH); |
paul@56 | 211 | } |
paul@56 | 212 | |
paul@59 | 213 | /* Configure output compare units for horizontal and vertical sync. */ |
paul@53 | 214 | |
paul@59 | 215 | void vga_configure_sync(int hsync_unit, int vsync_unit) |
paul@53 | 216 | { |
paul@54 | 217 | /* Record the peripherals in use. */ |
paul@54 | 218 | |
paul@54 | 219 | vga_display.hsync_unit = hsync_unit; |
paul@54 | 220 | vga_display.vsync_unit = vsync_unit; |
paul@54 | 221 | |
paul@53 | 222 | /* Horizontal sync. */ |
paul@65 | 223 | |
paul@53 | 224 | /* Configure output compare in dual compare (continuous output) mode using |
paul@53 | 225 | the timer as time base. The interrupt condition drives the first DMA |
paul@53 | 226 | channel and is handled to drive the display state machine. */ |
paul@53 | 227 | |
paul@59 | 228 | oc_init(hsync_unit, 0b101, vga_display.line_timer); |
paul@53 | 229 | oc_set_pulse(hsync_unit, vga_display.display_config->hsync_end); |
paul@53 | 230 | oc_set_pulse_end(hsync_unit, vga_display.display_config->hsync_start); |
paul@53 | 231 | oc_init_interrupt(hsync_unit, 7, 3); |
paul@53 | 232 | oc_on(hsync_unit); |
paul@53 | 233 | |
paul@53 | 234 | /* Vertical sync. */ |
paul@53 | 235 | |
paul@53 | 236 | /* Configure output compare in single compare (output driven low) mode using |
paul@53 | 237 | the timer as time base. The unit is enabled later. It is only really used |
paul@53 | 238 | to achieve precisely-timed level transitions in hardware. */ |
paul@65 | 239 | |
paul@59 | 240 | oc_init(vsync_unit, 0b010, vga_display.line_timer); |
paul@53 | 241 | oc_set_pulse(vsync_unit, 0); |
paul@53 | 242 | } |
paul@53 | 243 | |
paul@50 | 244 | |
paul@50 | 245 | |
paul@88 | 246 | /* Display state machine interrupt handler. */ |
paul@50 | 247 | |
paul@50 | 248 | void vga_interrupt_handler(void) |
paul@50 | 249 | { |
paul@88 | 250 | uint32_t ifs; |
paul@88 | 251 | |
paul@88 | 252 | if (!vga_display.line_channels) |
paul@88 | 253 | { |
paul@88 | 254 | /* Check for a timer interrupt condition. */ |
paul@88 | 255 | |
paul@88 | 256 | ifs = REG(TIMERIFS) & TIMER_INT_FLAGS(vga_display.line_timer, TxIF); |
paul@88 | 257 | |
paul@88 | 258 | if (ifs) |
paul@88 | 259 | { |
paul@88 | 260 | vga_transfer_interrupt_handler(); |
paul@88 | 261 | CLR_REG(TIMERIFS, ifs); |
paul@88 | 262 | } |
paul@88 | 263 | } |
paul@88 | 264 | |
paul@88 | 265 | /* Check for a OC1 interrupt condition. */ |
paul@88 | 266 | |
paul@88 | 267 | ifs = REG(OCIFS) & OC_INT_FLAGS(1, OCxIF); |
paul@88 | 268 | |
paul@88 | 269 | if (ifs) |
paul@88 | 270 | { |
paul@88 | 271 | vga_hsync_interrupt_handler(); |
paul@88 | 272 | CLR_REG(OCIFS, ifs); |
paul@88 | 273 | } |
paul@88 | 274 | |
paul@88 | 275 | } |
paul@88 | 276 | |
paul@88 | 277 | /* Display state machine interrupt handler. */ |
paul@88 | 278 | |
paul@88 | 279 | void vga_hsync_interrupt_handler(void) |
paul@88 | 280 | { |
paul@50 | 281 | vga_display.line += 1; |
paul@50 | 282 | vga_display.state_handler(); |
paul@50 | 283 | } |
paul@50 | 284 | |
paul@88 | 285 | /* Visible region pixel output handler, used when the CPU is responsible for |
paul@88 | 286 | producing pixel output rather than the DMA channels. */ |
paul@88 | 287 | |
paul@88 | 288 | void vga_transfer_interrupt_handler(void) |
paul@88 | 289 | { |
paul@88 | 290 | display_config_t *cfg = vga_display.display_config; |
paul@88 | 291 | uint8_t *current, *end, *output; |
paul@88 | 292 | |
paul@88 | 293 | if (vga_display.state_handler != visible_active) |
paul@88 | 294 | return; |
paul@88 | 295 | |
paul@88 | 296 | /* Generate the pixel signal. */ |
paul@88 | 297 | |
paul@88 | 298 | output = (uint8_t *) vga_display.output; |
paul@88 | 299 | end = vga_display.linedata + cfg->line_length; |
paul@88 | 300 | |
paul@88 | 301 | /* This is potentially not as efficient as loading words and shifting bytes |
paul@88 | 302 | but it appears difficult to implement that approach without experiencing |
paul@88 | 303 | data load exceptions. */ |
paul@88 | 304 | |
paul@88 | 305 | for (current = vga_display.linedata; current < end; current++) |
paul@88 | 306 | REG(output) = *current; |
paul@88 | 307 | |
paul@88 | 308 | /* Reset the signal level. */ |
paul@88 | 309 | |
paul@88 | 310 | REG(output) = 0; |
paul@88 | 311 | } |
paul@88 | 312 | |
paul@50 | 313 | |
paul@50 | 314 | |
paul@50 | 315 | /* Vertical back porch region. */ |
paul@50 | 316 | |
paul@50 | 317 | void vbp_active(void) |
paul@50 | 318 | { |
paul@50 | 319 | if (vga_display.line < vga_display.display_config->visible_start) |
paul@50 | 320 | return; |
paul@50 | 321 | |
paul@50 | 322 | /* Enter the visible region. */ |
paul@50 | 323 | |
paul@50 | 324 | vga_display.state_handler = visible_active; |
paul@50 | 325 | |
paul@50 | 326 | /* Set the line address. */ |
paul@50 | 327 | |
paul@50 | 328 | vga_display.linedata = vga_display.display_config->screen_start; |
paul@88 | 329 | |
paul@88 | 330 | if (vga_display.line_channels) |
paul@88 | 331 | start_visible(); |
paul@50 | 332 | } |
paul@50 | 333 | |
paul@50 | 334 | /* Visible region. */ |
paul@50 | 335 | |
paul@50 | 336 | void visible_active(void) |
paul@50 | 337 | { |
paul@81 | 338 | display_config_t *cfg = vga_display.display_config; |
paul@81 | 339 | |
paul@81 | 340 | if (vga_display.line < cfg->vfp_start) |
paul@50 | 341 | { |
paul@50 | 342 | /* Update the line address and handle wraparound. */ |
paul@50 | 343 | |
paul@81 | 344 | if (!(vga_display.line % cfg->line_multiplier)) |
paul@50 | 345 | { |
paul@81 | 346 | vga_display.linedata += cfg->line_length; |
paul@50 | 347 | |
paul@81 | 348 | if (vga_display.linedata >= cfg->screen_limit) |
paul@81 | 349 | vga_display.linedata -= cfg->screen_size; |
paul@50 | 350 | } |
paul@50 | 351 | |
paul@88 | 352 | if (vga_display.line_channels) |
paul@88 | 353 | update_visible(); |
paul@50 | 354 | return; |
paul@50 | 355 | } |
paul@50 | 356 | |
paul@50 | 357 | /* End the visible region. */ |
paul@50 | 358 | |
paul@50 | 359 | vga_display.state_handler = vfp_active; |
paul@50 | 360 | |
paul@50 | 361 | /* Disable the channel for the next line. */ |
paul@50 | 362 | |
paul@88 | 363 | if (vga_display.line_channels) |
paul@88 | 364 | stop_visible(); |
paul@50 | 365 | } |
paul@50 | 366 | |
paul@50 | 367 | /* Vertical front porch region. */ |
paul@50 | 368 | |
paul@50 | 369 | void vfp_active(void) |
paul@50 | 370 | { |
paul@50 | 371 | if (vga_display.line < vga_display.display_config->vsync_start) |
paul@50 | 372 | return; |
paul@50 | 373 | |
paul@50 | 374 | /* Enter the vertical sync region. */ |
paul@50 | 375 | |
paul@50 | 376 | vga_display.state_handler = vsync_active; |
paul@50 | 377 | |
paul@50 | 378 | /* Bring vsync low when the next line starts. */ |
paul@50 | 379 | |
paul@54 | 380 | vsync_low(); |
paul@50 | 381 | } |
paul@50 | 382 | |
paul@50 | 383 | /* Vertical sync region. */ |
paul@50 | 384 | |
paul@50 | 385 | void vsync_active(void) |
paul@50 | 386 | { |
paul@50 | 387 | if (vga_display.line < vga_display.display_config->vsync_end) |
paul@50 | 388 | return; |
paul@50 | 389 | |
paul@50 | 390 | /* Start again at the top of the display. */ |
paul@50 | 391 | |
paul@50 | 392 | vga_display.line = 0; |
paul@50 | 393 | vga_display.state_handler = vbp_active; |
paul@50 | 394 | |
paul@50 | 395 | /* Bring vsync high when the next line starts. */ |
paul@50 | 396 | |
paul@54 | 397 | vsync_high(); |
paul@50 | 398 | } |
paul@54 | 399 | |
paul@54 | 400 | |
paul@54 | 401 | |
paul@56 | 402 | /* Enable the channels for the next line. */ |
paul@56 | 403 | |
paul@56 | 404 | void start_visible(void) |
paul@56 | 405 | { |
paul@56 | 406 | update_visible(); |
paul@56 | 407 | update_transfers(1); |
paul@56 | 408 | } |
paul@56 | 409 | |
paul@56 | 410 | /* Update the channels for the next line. */ |
paul@56 | 411 | |
paul@56 | 412 | void update_visible(void) |
paul@56 | 413 | { |
paul@56 | 414 | uint32_t transfer_start = (uint32_t) vga_display.linedata; |
paul@56 | 415 | uint32_t transfer_length = vga_display.display_config->line_length / |
paul@56 | 416 | vga_display.line_channels; |
paul@56 | 417 | |
paul@56 | 418 | /* Determine whether an initiating channel is used. */ |
paul@56 | 419 | |
paul@59 | 420 | int initiating_channel = vga_display.transfer_int_num >= 0; |
paul@56 | 421 | int channel = 0; |
paul@56 | 422 | |
paul@56 | 423 | /* Update the source of a secondary line channel. */ |
paul@56 | 424 | |
paul@56 | 425 | if (vga_display.line_channels == 2) |
paul@56 | 426 | { |
paul@56 | 427 | dma_set_source(channel, PHYSICAL(transfer_start), transfer_length); |
paul@56 | 428 | transfer_start += transfer_length; |
paul@56 | 429 | channel++; |
paul@56 | 430 | } |
paul@56 | 431 | |
paul@56 | 432 | /* Skip any initiating channel. */ |
paul@56 | 433 | |
paul@56 | 434 | if (initiating_channel) |
paul@56 | 435 | channel++; |
paul@56 | 436 | |
paul@56 | 437 | /* Update the source of a line channel, with potentially updated start |
paul@56 | 438 | address. */ |
paul@56 | 439 | |
paul@56 | 440 | dma_set_source(channel, PHYSICAL(transfer_start), transfer_length); |
paul@56 | 441 | } |
paul@56 | 442 | |
paul@56 | 443 | /* Disable the channels for the next line. */ |
paul@56 | 444 | |
paul@56 | 445 | void stop_visible(void) |
paul@56 | 446 | { |
paul@56 | 447 | update_transfers(0); |
paul@56 | 448 | } |
paul@56 | 449 | |
paul@56 | 450 | /* Enable or disable transfers. */ |
paul@56 | 451 | |
paul@56 | 452 | void update_transfers(int enable) |
paul@56 | 453 | { |
paul@59 | 454 | void (*fn)() = enable ? dma_on : dma_off; |
paul@59 | 455 | |
paul@59 | 456 | /* Determine whether an initiating channel is used. */ |
paul@59 | 457 | |
paul@59 | 458 | int initiating_channel = vga_display.transfer_int_num >= 0; |
paul@56 | 459 | int channel = 0; |
paul@56 | 460 | |
paul@56 | 461 | /* Update line channels if no initiating channel is used. */ |
paul@56 | 462 | |
paul@56 | 463 | if (vga_display.line_channels == 2) |
paul@56 | 464 | { |
paul@56 | 465 | if (!initiating_channel) |
paul@56 | 466 | fn(channel); |
paul@56 | 467 | channel++; |
paul@56 | 468 | } |
paul@56 | 469 | |
paul@56 | 470 | /* Update any initiating channel. */ |
paul@56 | 471 | |
paul@56 | 472 | if (initiating_channel) |
paul@56 | 473 | { |
paul@56 | 474 | fn(channel); |
paul@56 | 475 | channel++; |
paul@56 | 476 | } |
paul@56 | 477 | |
paul@56 | 478 | /* Update line channels if no initiating channel is used. */ |
paul@56 | 479 | |
paul@56 | 480 | if (!initiating_channel) |
paul@56 | 481 | fn(channel); |
paul@56 | 482 | } |
paul@56 | 483 | |
paul@56 | 484 | |
paul@56 | 485 | |
paul@54 | 486 | /* Bring vsync low (single compare, output driven low) when the next line |
paul@54 | 487 | starts. */ |
paul@54 | 488 | |
paul@54 | 489 | void vsync_low(void) |
paul@54 | 490 | { |
paul@59 | 491 | oc_init(vga_display.vsync_unit, 0b010, vga_display.line_timer); |
paul@54 | 492 | oc_on(vga_display.vsync_unit); |
paul@54 | 493 | } |
paul@54 | 494 | |
paul@54 | 495 | /* Bring vsync high (single compare, output driven high) when the next line |
paul@54 | 496 | starts. */ |
paul@54 | 497 | |
paul@54 | 498 | void vsync_high(void) |
paul@54 | 499 | { |
paul@59 | 500 | oc_init(vga_display.vsync_unit, 0b001, vga_display.line_timer); |
paul@54 | 501 | oc_on(vga_display.vsync_unit); |
paul@54 | 502 | } |