/*

 * A demonstration of various PIC32 peripherals.

 *

 * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk>

 *

 * This program is free software: you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation, either version 3 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#include "pic32_c.h"

#include "init.h"

#include "debug.h"

#include "main.h"

static const char message1[] = "Hello!\r\n";

#define CELLSIZE4

#ifdef CELLSIZE1

static const char message2[] = "Adoc gi,hlo\r";

static const char message3[] = "n neaan el!\n";

#define CELLSIZE 1

#endif

#ifdef CELLSIZE4

static const char message2[] = "And  agahell";

static const char message3[] = "oncein, o!\r\n";

#define CELLSIZE 4

#endif

static int uart_echo;

/* Blink an attached LED with delays implemented using a loop. */

static void blink(uint32_t delay, uint32_t port, uint32_t pins)

{

    uint32_t counter;

    /* Clear outputs (LED). */

    CLR_REG(port, pins);

    while (1)

    {

        counter = delay;

        while (counter--) __asm__("");	/* retain loop */

        /* Invert outputs (LED). */

        INV_REG(port, pins);

    }

}

/* Main program. */

void main(void)

{

    uart_echo = 0;

    init_memory();

    init_pins();

    init_outputs();

    unlock_config();

    config_uart();

    lock_config();

    init_dma();

    /* Peripheral relationships:

       Timer3 -> OC1 -> DMA0: message2 -> U1TXREG

                     ___/

                    /

       Timer2 -> DMA1: message1 -> U1TXREG

                    \___

                        \

       Timer3 -> OC1 -> DMA2: message3 -> U1TXREG

    */

    /* Enable DMA on the next channel's completion, with OC1 initiating

       transfers, raising a transfer completion interrupt to be handled. */

    dma_init(0, 2);

    dma_set_chaining(0, dma_chain_next);

    dma_set_interrupt(0, OC1, 1);

    dma_set_transfer(0, PHYSICAL((uint32_t) message2), sizeof(message2) - 1,

                        HW_PHYSICAL(UART_REG(1, UxTXREG)), 1,

                        CELLSIZE);

    /* Initiate DMA on the Timer2 interrupt. Since the channel is not

       auto-enabled, it must be explicitly enabled elsewhere (when a UART

       interrupt is handled). */

    dma_init(1, 3);

    dma_set_interrupt(1, T2, 1);

    dma_set_transfer(1, PHYSICAL((uint32_t) message1), sizeof(message1) - 1,

                        HW_PHYSICAL(UART_REG(1, UxTXREG)), 1,

                        1);

    /* Enable DMA on the preceding channel's completion, with OC1 initiating

       transfers, raising a transfer completion interrupt to be handled. */

    dma_init(2, 2);

    dma_set_chaining(2, dma_chain_previous);

    dma_set_interrupt(2, OC1, 1);

    dma_set_transfer(2, PHYSICAL((uint32_t) message3), sizeof(message3) - 1,

                        HW_PHYSICAL(UART_REG(1, UxTXREG)), 1,

                        CELLSIZE);

    dma_init_interrupt(2, 0b00001000, 7, 3);

    /* Configure a timer for the first DMA channel whose interrupt condition

       drives the transfer. The interrupt itself does not need to be enabled. */

    timer_init(2, 0b111, 60000);

    timer_on(2);

    /* Configure a timer for the output compare unit below. */

    timer_init(3, 0b111, 20000);

    timer_on(3);

    /* Configure output compare in dual compare (continuous output) mode using

       Timer3 as time base. The interrupt condition drives the second DMA

       channel but does not need to be enabled. */

    oc_init(1, 0b101, 3);

    oc_set_pulse(1, 10000);

    oc_set_pulse_end(1, 20000);

    oc_on(1);

    /* Set UART interrupt priority above CPU priority to process events and to

       enable the first DMA channel. */

    uart_init(1, 115200);

    uart_init_interrupt(1, UxRIF, 7, 3);

    uart_on(1);

    interrupts_on();

    blink(3 << 24, PORTA, 1 << 3);

}

/* Exception and interrupt handlers. */

void exception_handler(void)

{

    blink(3 << 12, PORTA, 1 << 3);

}

void interrupt_handler(void)

{

    uint32_t ifs;

    char val;

    /* Check for a UART receive interrupt condition (UxRIF). */

    ifs = REG(UARTIFS) & UART_INT_FLAGS(1, UxRIF);

    if (ifs)

    {

        /* Clear the UART interrupt condition. */

        CLR_REG(UARTIFS, ifs);

        /* Write the received data back. */

        while (uart_can_read(1))

        {

            val = uart_read_char(1);

            if (uart_echo)

                uart_write_char(1, val);

            /* Initiate transfer upon receiving a particular character. */

            if (val == '0')

                dma_on(1);

        }

    }

    /* Check for a DMA interrupt condition (CHBCIF). */

    ifs = REG(DMAIFS) & DMA_INT_FLAGS(2, DCHxIF);

    if (ifs)

    {

        uart_write_string("CHBCIF\r\n");

        INV_REG(PORTA, 1 << 2);

        CLR_REG(DMA_REG(2, DCHxINT), 0b11111111);

        CLR_REG(DMAIFS, ifs);

    }

}

/* Peripheral pin configuration. */

void config_uart(void)

{

    /* Map U1RX to RPB13. */

    REG(U1RXR) = 0b0011;        /* U1RXR<3:0> = 0011 (RPB13) */

    /* Map U1TX to RPB15. */

    REG(RPB15R) = 0b0001;       /* RPB15R<3:0> = 0001 (U1TX) */

    /* Set RPB13 to input. */

    SET_REG(TRISB, 1 << 13);

}