paul@0 | 1 | OUTPUT_ARCH(mips) |
paul@0 | 2 | ENTRY(_start) |
paul@0 | 3 | |
paul@22 | 4 | IRQ_STACK_SIZE = 256; |
paul@22 | 5 | |
paul@0 | 6 | /* See... |
paul@0 | 7 | * FIGURE 4-5: MEMORY MAP ON RESET FOR PIC32MX170/270 DEVICES (64 KB RAM, 256 KB FLASH) |
paul@0 | 8 | * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet |
paul@0 | 9 | */ |
paul@0 | 10 | |
paul@0 | 11 | MEMORY |
paul@0 | 12 | { |
paul@0 | 13 | kseg0_boot_mem (rx) : ORIGIN = 0x9FC00000, LENGTH = 0xBF0 |
paul@0 | 14 | kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x40000 |
paul@22 | 15 | kseg0_data_mem (w!x) : ORIGIN = 0x80000000, LENGTH = 0x10000 |
paul@0 | 16 | physical_boot_mem (rx) : ORIGIN = 0x1FC00000, LENGTH = 0xBF0 |
paul@0 | 17 | physical_program_mem (rx) : ORIGIN = 0x1D000000, LENGTH = 0x40000 |
paul@22 | 18 | physical_data_mem (w!x) : ORIGIN = 0x00000000, LENGTH = 0x10000 |
paul@0 | 19 | sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000 |
paul@0 | 20 | configsfrs : ORIGIN = 0xBFC00BF0, LENGTH = 0x10 |
paul@0 | 21 | config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4 |
paul@0 | 22 | config2 : ORIGIN = 0xBFC00BF4, LENGTH = 0x4 |
paul@0 | 23 | config1 : ORIGIN = 0xBFC00BF8, LENGTH = 0x4 |
paul@0 | 24 | config0 : ORIGIN = 0xBFC00BFC, LENGTH = 0x4 |
paul@0 | 25 | physical_config3 : ORIGIN = 0x3FC00BF0, LENGTH = 0x4 |
paul@0 | 26 | physical_config2 : ORIGIN = 0x3FC00BF4, LENGTH = 0x4 |
paul@0 | 27 | physical_config1 : ORIGIN = 0x3FC00BF8, LENGTH = 0x4 |
paul@0 | 28 | physical_config0 : ORIGIN = 0x3FC00BFC, LENGTH = 0x4 |
paul@0 | 29 | } |
paul@0 | 30 | |
paul@0 | 31 | SECTIONS |
paul@0 | 32 | { |
paul@22 | 33 | /* Boot program. */ |
paul@22 | 34 | |
paul@0 | 35 | .boot : { *(.boot*) } > kseg0_boot_mem AT > physical_boot_mem |
paul@22 | 36 | |
paul@22 | 37 | /* Exception/interrupt vectors and general program code. */ |
paul@22 | 38 | |
paul@0 | 39 | .vectors : { *(.vectors*) } > kseg0_program_mem AT > physical_program_mem |
paul@0 | 40 | .text : { *(.text*) } > kseg0_program_mem AT > physical_program_mem |
paul@22 | 41 | |
paul@22 | 42 | /* Reserve space at the bottom of RAM for the IRQ stack. */ |
paul@22 | 43 | |
paul@22 | 44 | .irqstack : { |
paul@22 | 45 | . += IRQ_STACK_SIZE; |
paul@22 | 46 | } > kseg0_data_mem AT > physical_data_mem |
paul@22 | 47 | |
paul@22 | 48 | /* Add other data after the IRQ stack. */ |
paul@22 | 49 | |
paul@22 | 50 | .bss : { *(.bss*) } > kseg0_data_mem AT > physical_data_mem |
paul@22 | 51 | |
paul@22 | 52 | /* Store constant data in program memory. */ |
paul@22 | 53 | |
paul@40 | 54 | .data : { *(.data*) } > kseg0_program_mem AT > physical_program_mem |
paul@1 | 55 | .rodata : { *(.rodata*) } > kseg0_program_mem AT > physical_program_mem |
paul@0 | 56 | .got : { |
paul@0 | 57 | _gp = ALIGN(16); |
paul@0 | 58 | *(.got*) |
paul@0 | 59 | } > kseg0_program_mem AT > physical_program_mem |
paul@22 | 60 | |
paul@22 | 61 | /* Device configuration registers to be flashed. */ |
paul@22 | 62 | |
paul@0 | 63 | .devcfg0 : { *(.devcfg0) } > config0 AT > physical_config0 |
paul@0 | 64 | .devcfg1 : { *(.devcfg1) } > config1 AT > physical_config1 |
paul@0 | 65 | .devcfg2 : { *(.devcfg2) } > config2 AT > physical_config2 |
paul@22 | 66 | |
paul@22 | 67 | /* Discard things that might overwrite useful data. */ |
paul@22 | 68 | |
paul@22 | 69 | /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.pdr) *(.gnu.attributes) *(.comment) } |
paul@0 | 70 | } |