1 #ifndef __ASSEMBLER__ 2 3 #ifndef __PIC32_C_H__ 4 #define __PIC32_C_H__ 5 6 #include <stdint.h> 7 #include "mips.h" 8 #include "pic32.h" 9 10 /* Access. */ 11 12 #define REG(mem) *((volatile uint32_t *) (mem)) 13 14 /* Bit clearing, setting and inverting. */ 15 16 static inline void CLR_REG(uint32_t mem, uint32_t val) 17 { 18 REG(mem + CLR) = val; 19 } 20 21 static inline void SET_REG(uint32_t mem, uint32_t val) 22 { 23 REG(mem + SET) = val; 24 } 25 26 static inline void INV_REG(uint32_t mem, uint32_t val) 27 { 28 REG(mem + INV) = val; 29 } 30 31 /* Address translation. */ 32 33 static inline uint32_t PHYSICAL(uint32_t addr) 34 { 35 return ((uint32_t) addr) - KSEG0_BASE; 36 } 37 38 static inline uint32_t HW_PHYSICAL(uint32_t addr) 39 { 40 return ((uint32_t) addr) - KSEG1_BASE; 41 } 42 43 /* Register collection access. */ 44 45 static inline uint32_t DMA_REG(int channel, uint32_t reg) 46 { 47 return DCHBASE + reg + (channel - DCHMIN) * DCHSTEP; 48 } 49 50 static inline uint32_t OC_REG(int unit, uint32_t reg) 51 { 52 return OCBASE + reg + (unit - OCMIN) * OCSTEP; 53 } 54 55 static inline uint32_t TIMER_REG(int timer, uint32_t reg) 56 { 57 return TIMERBASE + reg + (timer - TIMERMIN) * TIMERSTEP; 58 } 59 60 static inline uint32_t UART_REG(int uart, uint32_t reg) 61 { 62 return UARTBASE + reg + (uart - UARTMIN) * UARTSTEP; 63 } 64 65 /* Convenience types. */ 66 67 enum dma_chain 68 { 69 dma_chain_none, 70 dma_chain_next, 71 dma_chain_previous, 72 }; 73 74 #endif /* __PIC32_C_H__ */ 75 76 #endif /* __ASSEMBLER__ */