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Removed stray whitespace. |
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Fixed the relocation function, enabling the vga example again. |
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Use a simpler byte-based copy for the data relocation. |
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Merged parallel changes, updating the relocate_data invocation similarly. |
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Use the global offset table when obtaining the address of main. |
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Attempted to initialise writable data by relocating the .data section. |
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Made VGA initialisation more convenient, permitting the indication of timers to |
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Added a function to produce interrupt numbers from timer numbers. |
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Added VGA output initialisation descriptions. |
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Moved DMA channel configuration and operations into common library code. |
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Fixed transfer destination comment. |
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Moved horizontal/vertical sync configuration and functions into library code. |
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Moved horizontal/vertical sync configuration into a common library module. |
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Adjusted the pixel channel priority to hopefully avoid ordering problems. |
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Fixed zero channel initiation remark. |
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Extracted the display state machine, moving it into a separate library module. |
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Introduced a display configuration structure to be included in an application, |
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Introduced framebuffer usage and replaced the DMA interrupt with a Timer2 event, |
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Introduced a parameter for FPB in uart_init, eliminating this dependency on the |
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Introduced dual pixel transfer channels to the timer-based VGA example, also |
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Introduced various definitions for transfer and display-related properties. |
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Experiment with interleaved DMA channels. |
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Replaced usage of the DMA interrupt with the Timer3 event for the zero channel. |
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Replaced usage of the DMA interrupt with the Timer2 event for the zero channel. |
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Added support for a framebuffer, also providing a common library function to |
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Moved .data into flash. Otherwise, it appears that certain pointer arithmetic |
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Added a function to update the source of a DMA channel. |
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Organised header and common payload files into include and lib directories. |
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Added a VGA example variant employing timer-scheduled single-pixel transfers. |
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Updated the documentation to be more specific to this example. |
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Added a parallel mode variant of the VGA example. |
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Introduced device configuration files for individual programs together with |
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Fixed parallel mode write strobe configuration. |
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Added support for parallel mode. |
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Added the documentation from the VGAPIC32 project. |
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Removed superfluous variable declaration. |
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Added support for external interrupt configuration. |
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Corrected the description of the frequency generation mechanism, changing the |
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Fixed the description of the interrupt configuration of OC1. |
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The timer and OC interrupts do not need to be enabled to initiate DMA transfers. |
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Removed debugging output showing line data. |
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Introduced separate example directories containing the demonstration program and |
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Added more DMA channel configuration functions. |
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Introduced proper allocation of the IRQ stack. |
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Reformatted using spaces. |
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Fixed comments, indicating that it is the UART interrupt being handled that |
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Introduced some UART convenience functions. |
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Handle the channel completion interrupt correctly, allowing it to occur again. |
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It appears unnecessary to re-enable the first DMA channel. Thus, handling a DMA |
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Moved application-specific pin configuration into the main program. |
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Added copyright and licensing information. |
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Added output compare support, demonstrating its use with DMA cell transfers. |
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Demonstrated DMA channel chaining with cell transfers initiated using timer |
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Added a debugging function for writing strings. |
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Restored the DMA transfer upon UART receive interrupt condition functionality. |
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Introduced separate configuration functions for DMA auto-enable and chaining. |
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Fixed the DCHxDSIZ offset and added some more definitions. |
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Test with higher-priority interrupt, disabling DMA, due to instability. |
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Added timer initialisation functions. |
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Extended the use and scope of the UART interrupt flags function. |
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