# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1539791588 -7200
# Node ID c1b168829e0b84e71754552fdcc23ddd2fd48359
# Parent  7d7e20ec16f5a2c51d03bf0c59becda2822ee288
Added a note about the peripheral clock frequency.

diff -r 7d7e20ec16f5 -r c1b168829e0b intcond.S
--- a/intcond.S	Wed Oct 17 17:40:05 2018 +0200
+++ b/intcond.S	Wed Oct 17 17:53:08 2018 +0200
@@ -44,6 +44,9 @@
 division of 2, a multiplication of 24, yielding a multiplication of 3.
 
 The FRC is apparently at 16MHz and this produces a system clock of 48MHz.
+
+The peripheral clock frequency (FPB) will be 24MHz given the above DEVCFG1
+settings.
 */
 
 .section .devcfg2, "a"