paul@218 | 1 | /* |
paul@218 | 2 | * Access various peripherals on a board using the JZ4780. |
paul@218 | 3 | * |
paul@258 | 4 | * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> |
paul@218 | 5 | * |
paul@218 | 6 | * This program is free software; you can redistribute it and/or |
paul@218 | 7 | * modify it under the terms of the GNU General Public License as |
paul@218 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@218 | 9 | * the License, or (at your option) any later version. |
paul@218 | 10 | * |
paul@218 | 11 | * This program is distributed in the hope that it will be useful, |
paul@218 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@218 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@218 | 14 | * GNU General Public License for more details. |
paul@218 | 15 | * |
paul@218 | 16 | * You should have received a copy of the GNU General Public License |
paul@218 | 17 | * along with this program; if not, write to the Free Software |
paul@218 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@218 | 19 | * Boston, MA 02110-1301, USA |
paul@218 | 20 | */ |
paul@218 | 21 | |
paul@221 | 22 | /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S |
paul@221 | 23 | audio over HDMI or via its internal codec to the headphone socket. */ |
paul@221 | 24 | |
paul@221 | 25 | #include <l4/devices/aic-x1600.h> |
paul@221 | 26 | |
paul@218 | 27 | #include <l4/devices/cpm-jz4780.h> |
paul@218 | 28 | #include <l4/devices/dma-jz4780.h> |
paul@218 | 29 | #include <l4/devices/gpio-jz4780.h> |
paul@218 | 30 | #include <l4/devices/i2c-jz4780.h> |
paul@258 | 31 | #include <l4/devices/msc-jz4780.h> |
paul@298 | 32 | #include <l4/devices/rtc-jz4780.h> |
paul@237 | 33 | |
paul@222 | 34 | /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary |
paul@222 | 35 | header provides pins like GPC. */ |
paul@221 | 36 | |
paul@218 | 37 | #include <l4/devices/spi-gpio.h> |
paul@222 | 38 | #include <l4/devices/spi-hybrid.h> |
paul@221 | 39 | #include <l4/devices/spi-jz4780.h> |
paul@253 | 40 | #include <l4/devices/tcu-jz4780.h> |
paul@218 | 41 | #include "common.h" |
paul@218 | 42 | |
paul@218 | 43 | |
paul@218 | 44 | |
paul@218 | 45 | /* AIC adapter functions. */ |
paul@218 | 46 | |
paul@218 | 47 | void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) |
paul@218 | 48 | { |
paul@218 | 49 | return x1600_aic_init(aic_start, start, end, cpm); |
paul@218 | 50 | } |
paul@218 | 51 | |
paul@218 | 52 | void *aic_get_channel(void *aic, int num, void *channel) |
paul@218 | 53 | { |
paul@218 | 54 | return x1600_aic_get_channel(aic, num, channel); |
paul@218 | 55 | } |
paul@218 | 56 | |
paul@221 | 57 | unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, |
paul@221 | 58 | uint32_t count, uint32_t sample_rate, |
paul@221 | 59 | uint8_t sample_size) |
paul@218 | 60 | { |
paul@221 | 61 | return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); |
paul@218 | 62 | } |
paul@218 | 63 | |
paul@218 | 64 | |
paul@218 | 65 | |
paul@218 | 66 | /* CPM adapter functions. */ |
paul@218 | 67 | |
paul@218 | 68 | void *cpm_init(l4_addr_t cpm_base) |
paul@218 | 69 | { |
paul@218 | 70 | return jz4780_cpm_init(cpm_base); |
paul@218 | 71 | } |
paul@218 | 72 | |
paul@218 | 73 | const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) |
paul@218 | 74 | { |
paul@218 | 75 | return jz4780_cpm_clock_type(cpm, clock); |
paul@218 | 76 | } |
paul@218 | 77 | |
paul@218 | 78 | int cpm_have_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 79 | { |
paul@218 | 80 | return jz4780_cpm_have_clock(cpm, clock); |
paul@218 | 81 | } |
paul@218 | 82 | |
paul@218 | 83 | void cpm_start_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 84 | { |
paul@218 | 85 | jz4780_cpm_start_clock(cpm, clock); |
paul@218 | 86 | } |
paul@218 | 87 | |
paul@218 | 88 | void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 89 | { |
paul@218 | 90 | jz4780_cpm_stop_clock(cpm, clock); |
paul@218 | 91 | } |
paul@218 | 92 | |
paul@218 | 93 | int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, |
paul@218 | 94 | uint32_t parameters[]) |
paul@218 | 95 | { |
paul@218 | 96 | return jz4780_cpm_get_parameters(cpm, clock, parameters); |
paul@218 | 97 | } |
paul@218 | 98 | |
paul@218 | 99 | int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, |
paul@218 | 100 | int num_parameters, uint32_t parameters[]) |
paul@218 | 101 | { |
paul@218 | 102 | return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters); |
paul@218 | 103 | } |
paul@218 | 104 | |
paul@218 | 105 | uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) |
paul@218 | 106 | { |
paul@218 | 107 | return jz4780_cpm_get_source(cpm, clock); |
paul@218 | 108 | } |
paul@218 | 109 | |
paul@218 | 110 | void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) |
paul@218 | 111 | { |
paul@218 | 112 | jz4780_cpm_set_source(cpm, clock, source); |
paul@218 | 113 | } |
paul@218 | 114 | |
paul@218 | 115 | enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 116 | { |
paul@218 | 117 | return jz4780_cpm_get_source_clock(cpm, clock); |
paul@218 | 118 | } |
paul@218 | 119 | |
paul@218 | 120 | void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) |
paul@218 | 121 | { |
paul@218 | 122 | jz4780_cpm_set_source_clock(cpm, clock, source); |
paul@218 | 123 | } |
paul@218 | 124 | |
paul@218 | 125 | uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) |
paul@218 | 126 | { |
paul@218 | 127 | return jz4780_cpm_get_source_frequency(cpm, clock); |
paul@218 | 128 | } |
paul@218 | 129 | |
paul@218 | 130 | uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) |
paul@218 | 131 | { |
paul@218 | 132 | return jz4780_cpm_get_frequency(cpm, clock); |
paul@218 | 133 | } |
paul@218 | 134 | |
paul@218 | 135 | int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) |
paul@218 | 136 | { |
paul@218 | 137 | return jz4780_cpm_set_frequency(cpm, clock, frequency); |
paul@218 | 138 | } |
paul@218 | 139 | |
paul@218 | 140 | |
paul@218 | 141 | |
paul@218 | 142 | /* DMA adapter functions. */ |
paul@218 | 143 | |
paul@218 | 144 | void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) |
paul@218 | 145 | { |
paul@218 | 146 | return jz4780_dma_init(start, end, cpm); |
paul@218 | 147 | } |
paul@218 | 148 | |
paul@218 | 149 | void dma_disable(void *dma_chip) |
paul@218 | 150 | { |
paul@218 | 151 | jz4780_dma_disable(dma_chip); |
paul@218 | 152 | } |
paul@218 | 153 | |
paul@218 | 154 | void dma_enable(void *dma_chip) |
paul@218 | 155 | { |
paul@218 | 156 | jz4780_dma_enable(dma_chip); |
paul@218 | 157 | } |
paul@218 | 158 | |
paul@218 | 159 | void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) |
paul@218 | 160 | { |
paul@218 | 161 | return jz4780_dma_get_channel(dma, channel, irq); |
paul@218 | 162 | } |
paul@218 | 163 | |
paul@218 | 164 | unsigned int dma_transfer(void *dma_channel, |
paul@218 | 165 | uint32_t source, uint32_t destination, |
paul@218 | 166 | unsigned int count, |
paul@218 | 167 | int source_increment, int destination_increment, |
paul@218 | 168 | uint8_t source_width, uint8_t destination_width, |
paul@218 | 169 | uint8_t transfer_unit_size, |
paul@218 | 170 | int type) |
paul@218 | 171 | { |
paul@218 | 172 | return jz4780_dma_transfer(dma_channel, source, destination, count, |
paul@218 | 173 | source_increment, destination_increment, |
paul@218 | 174 | source_width, destination_width, |
paul@218 | 175 | transfer_unit_size, type); |
paul@218 | 176 | } |
paul@218 | 177 | |
paul@218 | 178 | unsigned int dma_wait(void *dma_channel) |
paul@218 | 179 | { |
paul@218 | 180 | return jz4780_dma_wait(dma_channel); |
paul@218 | 181 | } |
paul@218 | 182 | |
paul@218 | 183 | |
paul@218 | 184 | |
paul@218 | 185 | /* GPIO adapter functions. */ |
paul@218 | 186 | |
paul@285 | 187 | void *gpio_init(l4_addr_t start, uint8_t port_number) |
paul@218 | 188 | { |
paul@285 | 189 | return jz4780_gpio_init(start, port_number); |
paul@218 | 190 | } |
paul@218 | 191 | |
paul@285 | 192 | void *gpio_init_shadow(l4_addr_t start, uint8_t port_number) |
paul@270 | 193 | { |
paul@285 | 194 | return jz4780_gpio_init(start, port_number); |
paul@270 | 195 | } |
paul@270 | 196 | |
paul@218 | 197 | void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) |
paul@218 | 198 | { |
paul@218 | 199 | jz4780_gpio_setup(gpio, pin, mode, value); |
paul@218 | 200 | } |
paul@218 | 201 | |
paul@218 | 202 | void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) |
paul@218 | 203 | { |
paul@218 | 204 | jz4780_gpio_config_pull(gpio, pin, mode); |
paul@218 | 205 | } |
paul@218 | 206 | |
paul@218 | 207 | void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) |
paul@218 | 208 | { |
paul@218 | 209 | jz4780_gpio_config_pad(gpio, pin, func, value); |
paul@218 | 210 | } |
paul@218 | 211 | |
paul@218 | 212 | void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) |
paul@218 | 213 | { |
paul@218 | 214 | jz4780_gpio_config_get(gpio, pin, reg, value); |
paul@218 | 215 | } |
paul@218 | 216 | |
paul@218 | 217 | void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) |
paul@218 | 218 | { |
paul@218 | 219 | jz4780_gpio_config_pad_get(gpio, pin, func, value); |
paul@218 | 220 | } |
paul@218 | 221 | |
paul@218 | 222 | void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) |
paul@218 | 223 | { |
paul@218 | 224 | jz4780_gpio_multi_setup(gpio, mask, mode, outvalues); |
paul@218 | 225 | } |
paul@218 | 226 | |
paul@218 | 227 | void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) |
paul@218 | 228 | { |
paul@218 | 229 | jz4780_gpio_multi_config_pad(gpio, mask, func, value); |
paul@218 | 230 | } |
paul@218 | 231 | |
paul@218 | 232 | void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) |
paul@218 | 233 | { |
paul@218 | 234 | jz4780_gpio_multi_set(gpio, mask, data); |
paul@218 | 235 | } |
paul@218 | 236 | |
paul@218 | 237 | unsigned gpio_multi_get(void *gpio, unsigned offset) |
paul@218 | 238 | { |
paul@218 | 239 | return jz4780_gpio_multi_get(gpio, offset); |
paul@218 | 240 | } |
paul@218 | 241 | |
paul@218 | 242 | int gpio_get(void *gpio, unsigned pin) |
paul@218 | 243 | { |
paul@218 | 244 | return jz4780_gpio_get(gpio, pin); |
paul@218 | 245 | } |
paul@218 | 246 | |
paul@218 | 247 | void gpio_set(void *gpio, unsigned pin, int value) |
paul@218 | 248 | { |
paul@218 | 249 | jz4780_gpio_set(gpio, pin, value); |
paul@218 | 250 | } |
paul@218 | 251 | |
paul@218 | 252 | void *gpio_get_irq(void *gpio, unsigned pin) |
paul@218 | 253 | { |
paul@218 | 254 | return jz4780_gpio_get_irq(gpio, pin); |
paul@218 | 255 | } |
paul@218 | 256 | |
paul@218 | 257 | bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) |
paul@218 | 258 | { |
paul@218 | 259 | return jz4780_gpio_irq_set_mode(gpio_irq, mode); |
paul@218 | 260 | } |
paul@218 | 261 | |
paul@218 | 262 | |
paul@218 | 263 | |
paul@218 | 264 | /* I2C adapter functions. */ |
paul@218 | 265 | |
paul@218 | 266 | void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, |
paul@218 | 267 | uint32_t frequency) |
paul@218 | 268 | { |
paul@218 | 269 | return jz4780_i2c_init(start, end, cpm, frequency); |
paul@218 | 270 | } |
paul@218 | 271 | |
paul@218 | 272 | void *i2c_get_channel(void *i2c, uint8_t channel) |
paul@218 | 273 | { |
paul@218 | 274 | return jz4780_i2c_get_channel(i2c, channel); |
paul@218 | 275 | } |
paul@218 | 276 | |
paul@218 | 277 | uint32_t i2c_get_frequency(void *i2c_channel) |
paul@218 | 278 | { |
paul@218 | 279 | return jz4780_i2c_get_frequency(i2c_channel); |
paul@218 | 280 | } |
paul@218 | 281 | |
paul@218 | 282 | void i2c_set_target(void *i2c_channel, uint8_t addr) |
paul@218 | 283 | { |
paul@218 | 284 | return jz4780_i2c_set_target(i2c_channel, addr); |
paul@218 | 285 | } |
paul@218 | 286 | |
paul@218 | 287 | void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, |
paul@218 | 288 | int stop) |
paul@218 | 289 | { |
paul@218 | 290 | jz4780_i2c_start_read(i2c_channel, buf, total, stop); |
paul@218 | 291 | } |
paul@218 | 292 | |
paul@218 | 293 | void i2c_read(void *i2c_channel) |
paul@218 | 294 | { |
paul@218 | 295 | jz4780_i2c_read(i2c_channel); |
paul@218 | 296 | } |
paul@218 | 297 | |
paul@218 | 298 | void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, |
paul@218 | 299 | int stop) |
paul@218 | 300 | { |
paul@218 | 301 | jz4780_i2c_start_write(i2c_channel, buf, total, stop); |
paul@218 | 302 | } |
paul@218 | 303 | |
paul@218 | 304 | void i2c_write(void *i2c_channel) |
paul@218 | 305 | { |
paul@218 | 306 | jz4780_i2c_write(i2c_channel); |
paul@218 | 307 | } |
paul@218 | 308 | |
paul@218 | 309 | int i2c_read_done(void *i2c_channel) |
paul@218 | 310 | { |
paul@218 | 311 | return jz4780_i2c_read_done(i2c_channel); |
paul@218 | 312 | } |
paul@218 | 313 | |
paul@218 | 314 | int i2c_write_done(void *i2c_channel) |
paul@218 | 315 | { |
paul@218 | 316 | return jz4780_i2c_write_done(i2c_channel); |
paul@218 | 317 | } |
paul@218 | 318 | |
paul@218 | 319 | unsigned int i2c_have_read(void *i2c_channel) |
paul@218 | 320 | { |
paul@218 | 321 | return jz4780_i2c_have_read(i2c_channel); |
paul@218 | 322 | } |
paul@218 | 323 | |
paul@218 | 324 | unsigned int i2c_have_written(void *i2c_channel) |
paul@218 | 325 | { |
paul@218 | 326 | return jz4780_i2c_have_written(i2c_channel); |
paul@218 | 327 | } |
paul@218 | 328 | |
paul@218 | 329 | int i2c_failed(void *i2c_channel) |
paul@218 | 330 | { |
paul@218 | 331 | return jz4780_i2c_failed(i2c_channel); |
paul@218 | 332 | } |
paul@218 | 333 | |
paul@218 | 334 | void i2c_stop(void *i2c_channel) |
paul@218 | 335 | { |
paul@218 | 336 | jz4780_i2c_stop(i2c_channel); |
paul@218 | 337 | } |
paul@218 | 338 | |
paul@218 | 339 | |
paul@218 | 340 | |
paul@258 | 341 | /* MSC adapter functions. */ |
paul@258 | 342 | |
paul@264 | 343 | void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end, void *cpm) |
paul@258 | 344 | { |
paul@264 | 345 | return jz4780_msc_init(msc_start, start, end, cpm); |
paul@258 | 346 | } |
paul@258 | 347 | |
paul@258 | 348 | void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) |
paul@258 | 349 | { |
paul@258 | 350 | return jz4780_msc_get_channel(msc, channel, irq, dma); |
paul@258 | 351 | } |
paul@258 | 352 | |
paul@263 | 353 | struct msc_card *msc_get_cards(void *msc_channel) |
paul@258 | 354 | { |
paul@263 | 355 | return jz4780_msc_get_cards(msc_channel); |
paul@263 | 356 | } |
paul@263 | 357 | |
paul@263 | 358 | uint8_t msc_num_cards(void *msc_channel) |
paul@263 | 359 | { |
paul@263 | 360 | return jz4780_msc_num_cards(msc_channel); |
paul@258 | 361 | } |
paul@258 | 362 | |
paul@258 | 363 | void msc_enable(void *msc_channel) |
paul@258 | 364 | { |
paul@258 | 365 | jz4780_msc_enable(msc_channel); |
paul@258 | 366 | } |
paul@258 | 367 | |
paul@261 | 368 | uint32_t msc_read_blocks(void *msc_channel, uint8_t card, |
paul@264 | 369 | struct dma_region *region, |
paul@261 | 370 | uint32_t block_address, uint32_t block_count) |
paul@258 | 371 | { |
paul@264 | 372 | return jz4780_msc_read_blocks(msc_channel, card, region, block_address, |
paul@261 | 373 | block_count); |
paul@258 | 374 | } |
paul@258 | 375 | |
paul@258 | 376 | |
paul@258 | 377 | |
paul@237 | 378 | /* RTC adapter functions. */ |
paul@237 | 379 | |
paul@240 | 380 | void *rtc_init(l4_addr_t start, void *cpm) |
paul@237 | 381 | { |
paul@298 | 382 | return jz4780_rtc_init(start, cpm); |
paul@298 | 383 | } |
paul@240 | 384 | |
paul@298 | 385 | enum Clock_identifiers rtc_get_clock(void *rtc) |
paul@298 | 386 | { |
paul@298 | 387 | return jz4780_rtc_get_clock(rtc); |
paul@237 | 388 | } |
paul@237 | 389 | |
paul@237 | 390 | void rtc_disable(void *rtc) |
paul@237 | 391 | { |
paul@298 | 392 | jz4780_rtc_disable(rtc); |
paul@237 | 393 | } |
paul@237 | 394 | |
paul@237 | 395 | void rtc_enable(void *rtc) |
paul@237 | 396 | { |
paul@298 | 397 | jz4780_rtc_enable(rtc); |
paul@237 | 398 | } |
paul@237 | 399 | |
paul@239 | 400 | void rtc_alarm_disable(void *rtc) |
paul@239 | 401 | { |
paul@298 | 402 | jz4780_rtc_alarm_disable(rtc); |
paul@239 | 403 | } |
paul@239 | 404 | |
paul@239 | 405 | void rtc_alarm_enable(void *rtc) |
paul@239 | 406 | { |
paul@298 | 407 | jz4780_rtc_alarm_enable(rtc); |
paul@239 | 408 | } |
paul@239 | 409 | |
paul@237 | 410 | uint32_t rtc_get_seconds(void *rtc) |
paul@237 | 411 | { |
paul@298 | 412 | return jz4780_rtc_get_seconds(rtc); |
paul@237 | 413 | } |
paul@237 | 414 | |
paul@237 | 415 | void rtc_set_seconds(void *rtc, uint32_t seconds) |
paul@237 | 416 | { |
paul@298 | 417 | jz4780_rtc_set_seconds(rtc, seconds); |
paul@237 | 418 | } |
paul@237 | 419 | |
paul@237 | 420 | uint32_t rtc_get_alarm_seconds(void *rtc) |
paul@237 | 421 | { |
paul@298 | 422 | return jz4780_rtc_get_alarm_seconds(rtc); |
paul@237 | 423 | } |
paul@237 | 424 | |
paul@237 | 425 | void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) |
paul@237 | 426 | { |
paul@298 | 427 | jz4780_rtc_set_alarm_seconds(rtc, seconds); |
paul@237 | 428 | } |
paul@237 | 429 | |
paul@238 | 430 | void rtc_hibernate(void *rtc) |
paul@238 | 431 | { |
paul@298 | 432 | jz4780_rtc_hibernate(rtc); |
paul@238 | 433 | } |
paul@238 | 434 | |
paul@237 | 435 | void rtc_power_down(void *rtc) |
paul@237 | 436 | { |
paul@298 | 437 | jz4780_rtc_power_down(rtc); |
paul@237 | 438 | } |
paul@237 | 439 | |
paul@237 | 440 | void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) |
paul@237 | 441 | { |
paul@298 | 442 | jz4780_rtc_set_regulator(rtc, base, adjustment); |
paul@237 | 443 | } |
paul@237 | 444 | |
paul@237 | 445 | |
paul@237 | 446 | |
paul@218 | 447 | /* SPI adapter functions. */ |
paul@218 | 448 | |
paul@221 | 449 | void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) |
paul@218 | 450 | { |
paul@221 | 451 | return jz4780_spi_init(spi_start, start, end, cpm); |
paul@221 | 452 | } |
paul@221 | 453 | |
paul@222 | 454 | void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, |
paul@222 | 455 | void *control_chip, int control_pin, int control_alt_func) |
paul@221 | 456 | { |
paul@222 | 457 | void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); |
paul@222 | 458 | |
paul@222 | 459 | return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); |
paul@218 | 460 | } |
paul@218 | 461 | |
paul@222 | 462 | void *spi_get_channel_gpio(uint64_t frequency, |
paul@222 | 463 | void *clock_chip, int clock_pin, |
paul@221 | 464 | void *data_chip, int data_pin, |
paul@221 | 465 | void *enable_chip, int enable_pin, |
paul@222 | 466 | void *control_chip, int control_pin) |
paul@221 | 467 | { |
paul@235 | 468 | void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, |
paul@235 | 469 | data_pin, enable_chip, enable_pin, control_chip, |
paul@235 | 470 | control_pin); |
paul@235 | 471 | |
paul@235 | 472 | return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); |
paul@222 | 473 | } |
paul@222 | 474 | |
paul@222 | 475 | void spi_acquire_control(void *channel, int level) |
paul@222 | 476 | { |
paul@222 | 477 | spi_hybrid_acquire_control(channel, level); |
paul@221 | 478 | } |
paul@221 | 479 | |
paul@222 | 480 | void spi_release_control(void *channel) |
paul@221 | 481 | { |
paul@222 | 482 | spi_hybrid_release_control(channel); |
paul@221 | 483 | } |
paul@221 | 484 | |
paul@235 | 485 | void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) |
paul@218 | 486 | { |
paul@235 | 487 | spi_hybrid_send(channel, bytes, data); |
paul@218 | 488 | } |
paul@218 | 489 | |
paul@222 | 490 | void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], |
paul@236 | 491 | uint8_t unit_size, uint8_t char_size, int big_endian) |
paul@222 | 492 | { |
paul@236 | 493 | spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); |
paul@222 | 494 | } |
paul@222 | 495 | |
paul@236 | 496 | uint32_t spi_transfer(void *channel, l4_addr_t vaddr, |
paul@236 | 497 | l4re_dma_space_dma_addr_t paddr, uint32_t count, |
paul@236 | 498 | uint8_t unit_size, uint8_t char_size, |
paul@223 | 499 | l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) |
paul@221 | 500 | { |
paul@236 | 501 | return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, |
paul@236 | 502 | char_size, desc_vaddr, desc_paddr); |
paul@221 | 503 | } |
paul@221 | 504 | |
paul@218 | 505 | |
paul@218 | 506 | |
paul@253 | 507 | /* TCU adapter functions. */ |
paul@253 | 508 | |
paul@253 | 509 | void *tcu_init(l4_addr_t start, l4_addr_t end) |
paul@253 | 510 | { |
paul@253 | 511 | return jz4780_tcu_init(start, end); |
paul@253 | 512 | } |
paul@253 | 513 | |
paul@253 | 514 | void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) |
paul@253 | 515 | { |
paul@253 | 516 | return jz4780_tcu_get_channel(tcu, channel, irq); |
paul@253 | 517 | } |
paul@253 | 518 | |
paul@253 | 519 | void tcu_disable(void *tcu_channel) |
paul@253 | 520 | { |
paul@253 | 521 | jz4780_tcu_disable(tcu_channel); |
paul@253 | 522 | } |
paul@253 | 523 | |
paul@253 | 524 | void tcu_enable(void *tcu_channel) |
paul@253 | 525 | { |
paul@253 | 526 | jz4780_tcu_enable(tcu_channel); |
paul@253 | 527 | } |
paul@253 | 528 | |
paul@253 | 529 | int tcu_is_enabled(void *tcu_channel) |
paul@253 | 530 | { |
paul@253 | 531 | return jz4780_tcu_is_enabled(tcu_channel); |
paul@253 | 532 | } |
paul@253 | 533 | |
paul@253 | 534 | uint8_t tcu_get_clock(void *tcu_channel) |
paul@253 | 535 | { |
paul@253 | 536 | return jz4780_tcu_get_clock(tcu_channel); |
paul@253 | 537 | } |
paul@253 | 538 | |
paul@253 | 539 | void tcu_set_clock(void *tcu_channel, uint8_t clock) |
paul@253 | 540 | { |
paul@253 | 541 | jz4780_tcu_set_clock(tcu_channel, clock); |
paul@253 | 542 | } |
paul@253 | 543 | |
paul@253 | 544 | uint32_t tcu_get_prescale(void *tcu_channel) |
paul@253 | 545 | { |
paul@253 | 546 | return jz4780_tcu_get_prescale(tcu_channel); |
paul@253 | 547 | } |
paul@253 | 548 | |
paul@253 | 549 | void tcu_set_prescale(void *tcu_channel, uint32_t prescale) |
paul@253 | 550 | { |
paul@253 | 551 | jz4780_tcu_set_prescale(tcu_channel, prescale); |
paul@253 | 552 | } |
paul@253 | 553 | |
paul@253 | 554 | uint32_t tcu_get_counter(void *tcu_channel) |
paul@253 | 555 | { |
paul@253 | 556 | return jz4780_tcu_get_counter(tcu_channel); |
paul@253 | 557 | } |
paul@253 | 558 | |
paul@253 | 559 | void tcu_set_counter(void *tcu_channel, uint32_t value) |
paul@253 | 560 | { |
paul@253 | 561 | jz4780_tcu_set_counter(tcu_channel, value); |
paul@253 | 562 | } |
paul@253 | 563 | |
paul@253 | 564 | uint8_t tcu_get_count_mode(void *tcu_channel) |
paul@253 | 565 | { |
paul@253 | 566 | return jz4780_tcu_get_count_mode(tcu_channel); |
paul@253 | 567 | } |
paul@253 | 568 | |
paul@253 | 569 | void tcu_set_count_mode(void *tcu_channel, uint8_t mode) |
paul@253 | 570 | { |
paul@253 | 571 | jz4780_tcu_set_count_mode(tcu_channel, mode); |
paul@253 | 572 | } |
paul@253 | 573 | |
paul@253 | 574 | uint32_t tcu_get_full_data_value(void *tcu_channel) |
paul@253 | 575 | { |
paul@253 | 576 | return jz4780_tcu_get_full_data_value(tcu_channel); |
paul@253 | 577 | } |
paul@253 | 578 | |
paul@253 | 579 | void tcu_set_full_data_value(void *tcu_channel, uint32_t value) |
paul@253 | 580 | { |
paul@253 | 581 | jz4780_tcu_set_full_data_value(tcu_channel, value); |
paul@253 | 582 | } |
paul@253 | 583 | |
paul@253 | 584 | uint32_t tcu_get_half_data_value(void *tcu_channel) |
paul@253 | 585 | { |
paul@253 | 586 | return jz4780_tcu_get_half_data_value(tcu_channel); |
paul@253 | 587 | } |
paul@253 | 588 | |
paul@253 | 589 | void tcu_set_half_data_value(void *tcu_channel, uint32_t value) |
paul@253 | 590 | { |
paul@253 | 591 | jz4780_tcu_set_half_data_value(tcu_channel, value); |
paul@253 | 592 | } |
paul@253 | 593 | |
paul@253 | 594 | int tcu_get_full_data_mask(void *tcu_channel) |
paul@253 | 595 | { |
paul@253 | 596 | return jz4780_tcu_get_full_data_mask(tcu_channel); |
paul@253 | 597 | } |
paul@253 | 598 | |
paul@253 | 599 | void tcu_set_full_data_mask(void *tcu_channel, int masked) |
paul@253 | 600 | { |
paul@253 | 601 | jz4780_tcu_set_full_data_mask(tcu_channel, masked); |
paul@253 | 602 | } |
paul@253 | 603 | |
paul@253 | 604 | int tcu_get_half_data_mask(void *tcu_channel) |
paul@253 | 605 | { |
paul@253 | 606 | return jz4780_tcu_get_half_data_mask(tcu_channel); |
paul@253 | 607 | } |
paul@253 | 608 | |
paul@253 | 609 | void tcu_set_half_data_mask(void *tcu_channel, int masked) |
paul@253 | 610 | { |
paul@253 | 611 | jz4780_tcu_set_half_data_mask(tcu_channel, masked); |
paul@253 | 612 | } |
paul@253 | 613 | |
paul@253 | 614 | int tcu_have_interrupt(void *tcu_channel) |
paul@253 | 615 | { |
paul@253 | 616 | return jz4780_tcu_have_interrupt(tcu_channel); |
paul@253 | 617 | } |
paul@253 | 618 | |
paul@253 | 619 | int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) |
paul@253 | 620 | { |
paul@253 | 621 | return jz4780_tcu_wait_for_irq(tcu_channel, timeout); |
paul@253 | 622 | } |
paul@253 | 623 | |
paul@253 | 624 | |
paul@253 | 625 | |
paul@218 | 626 | /* Memory regions. */ |
paul@218 | 627 | |
paul@236 | 628 | const char *io_memory_regions[] = { |
paul@218 | 629 | [AIC] = "jz4780-aic", |
paul@218 | 630 | [CPM] = "jz4780-cpm", |
paul@218 | 631 | [DMA] = "jz4780-dma", |
paul@218 | 632 | [GPIO] = "jz4780-gpio", |
paul@218 | 633 | [I2C] = "jz4780-i2c", |
paul@258 | 634 | [MSC] = "jz4780-msc", |
paul@237 | 635 | [RTC] = "jz4780-rtc", |
paul@221 | 636 | [SSI] = "jz4780-ssi", |
paul@253 | 637 | [TCU] = "jz4780-tcu", |
paul@218 | 638 | }; |
paul@218 | 639 | |
paul@218 | 640 | |
paul@218 | 641 | |
paul@218 | 642 | /* AIC definitions. */ |
paul@218 | 643 | |
paul@218 | 644 | void *aic_channels[] = {NULL, NULL}; |
paul@218 | 645 | |
paul@218 | 646 | const unsigned int num_aic_channels = 2; |
paul@218 | 647 | |
paul@218 | 648 | l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; |
paul@218 | 649 | |
paul@218 | 650 | |
paul@218 | 651 | |
paul@218 | 652 | /* CPM definitions. */ |
paul@218 | 653 | |
paul@218 | 654 | struct clock_info clocks[] = { |
paul@239 | 655 | {"ext", Clock_external, "EXCLK"}, |
paul@284 | 656 | {"ext_512", Clock_external_div, "EXCLK/512"}, |
paul@239 | 657 | {"rtc_ext", Clock_rtc_external, "RTCLK"}, |
paul@239 | 658 | {"plla", Clock_pll_A, "PLL A"}, |
paul@239 | 659 | {"plle", Clock_pll_E, "PLL E"}, |
paul@239 | 660 | {"pllm", Clock_pll_M, "PLL M"}, |
paul@239 | 661 | {"pllv", Clock_pll_V, "PLL V"}, |
paul@239 | 662 | {"main", Clock_main, "Main (SCLK_A)"}, |
paul@239 | 663 | {"cpu", Clock_cpu, "CPU"}, |
paul@240 | 664 | {"l2c", Clock_l2cache, "L2 cache"}, |
paul@239 | 665 | {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, |
paul@239 | 666 | {"ahb0", Clock_hclock0, "AHB0"}, |
paul@239 | 667 | {"ahb2", Clock_hclock2, "AHB2"}, |
paul@239 | 668 | {"apb", Clock_pclock, "APB"}, |
paul@239 | 669 | {"dma", Clock_dma, "DMA"}, |
paul@239 | 670 | {"hdmi", Clock_lcd, "HDMI"}, |
paul@239 | 671 | {"lcd", Clock_lcd, "LCD"}, |
paul@239 | 672 | {"lcd0", Clock_lcd_pixel0, "LCD0 pixel"}, |
paul@239 | 673 | {"lcd1", Clock_lcd_pixel1, "LCD1 pixel"}, |
paul@239 | 674 | {"msc", Clock_msc, "MSC"}, |
paul@239 | 675 | {"msc0", Clock_msc0, "MSC0"}, |
paul@239 | 676 | {"msc1", Clock_msc1, "MSC1"}, |
paul@239 | 677 | {"msc2", Clock_msc1, "MSC2"}, |
paul@239 | 678 | {"otg0", Clock_otg0, "USB OTG0"}, |
paul@239 | 679 | {"otg1", Clock_otg1, "USB OTG1"}, |
paul@239 | 680 | {"i2c0", Clock_i2c0, "I2C0"}, |
paul@239 | 681 | {"i2c1", Clock_i2c1, "I2C1"}, |
paul@239 | 682 | {"i2c2", Clock_i2c2, "I2C2"}, |
paul@239 | 683 | {"i2c3", Clock_i2c3, "I2C3"}, |
paul@239 | 684 | {"i2c4", Clock_i2c4, "I2C4"}, |
paul@239 | 685 | {"i2s0", Clock_i2s0, "I2S0"}, |
paul@239 | 686 | {"i2s1", Clock_i2s1, "I2S1"}, |
paul@239 | 687 | {"pcm", Clock_pcm, "PCM"}, |
paul@239 | 688 | {"rtc", Clock_rtc, "RTC"}, |
paul@239 | 689 | {"ssi", Clock_ssi, "SSI"}, |
paul@239 | 690 | {"ssi0", Clock_ssi0, "SSI0"}, |
paul@239 | 691 | {"ssi1", Clock_ssi1, "SSI1"}, |
paul@239 | 692 | {"uart0", Clock_uart0, "UART0"}, |
paul@239 | 693 | {"uart1", Clock_uart1, "UART1"}, |
paul@239 | 694 | {"uart2", Clock_uart2, "UART2"}, |
paul@239 | 695 | {"uart3", Clock_uart3, "UART3"}, |
paul@239 | 696 | {"uart4", Clock_uart4, "UART4"}, |
paul@243 | 697 | {"usbphy", Clock_usb_phy, "USB PHY"}, |
paul@243 | 698 | {NULL, Clock_none, NULL}, |
paul@218 | 699 | }; |
paul@218 | 700 | |
paul@218 | 701 | |
paul@218 | 702 | |
paul@218 | 703 | /* DMA definitions. */ |
paul@218 | 704 | |
paul@218 | 705 | void *dma_channels[32] = {NULL}; |
paul@218 | 706 | |
paul@218 | 707 | const unsigned int num_dma_channels = 32; |
paul@218 | 708 | |
paul@221 | 709 | struct dma_region dma_regions[8]; |
paul@218 | 710 | |
paul@221 | 711 | const unsigned int num_dma_regions = 8; |
paul@218 | 712 | |
paul@218 | 713 | l4_cap_idx_t dma_irq = L4_INVALID_CAP; |
paul@218 | 714 | |
paul@218 | 715 | |
paul@218 | 716 | |
paul@218 | 717 | /* GPIO definitions. */ |
paul@218 | 718 | |
paul@218 | 719 | const unsigned int num_gpio_ports = 6; |
paul@218 | 720 | |
paul@218 | 721 | const char gpio_port_labels[] = "ABCDEF"; |
paul@218 | 722 | |
paul@218 | 723 | |
paul@218 | 724 | |
paul@218 | 725 | /* I2C definitions. */ |
paul@218 | 726 | |
paul@218 | 727 | void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL}; |
paul@218 | 728 | |
paul@218 | 729 | const unsigned int num_i2c_channels = 5; |
paul@218 | 730 | |
paul@295 | 731 | l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; |
paul@218 | 732 | |
paul@218 | 733 | |
paul@218 | 734 | |
paul@258 | 735 | /* MSC definitions. */ |
paul@258 | 736 | |
paul@258 | 737 | void *msc_channels[] = {NULL, NULL, NULL}; |
paul@258 | 738 | |
paul@258 | 739 | const unsigned int num_msc_channels = 3; |
paul@258 | 740 | |
paul@258 | 741 | l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; |
paul@258 | 742 | |
paul@258 | 743 | |
paul@258 | 744 | |
paul@218 | 745 | /* SPI definitions. */ |
paul@218 | 746 | |
paul@218 | 747 | void *spi_channels[] = {NULL, NULL}; |
paul@218 | 748 | |
paul@218 | 749 | const unsigned int num_spi_channels = 2; |
paul@253 | 750 | |
paul@253 | 751 | |
paul@253 | 752 | |
paul@253 | 753 | /* TCU definitions. */ |
paul@253 | 754 | |
paul@253 | 755 | void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; |
paul@253 | 756 | |
paul@253 | 757 | const unsigned int num_tcu_channels = 8; |
paul@280 | 758 | const unsigned int tcu_irq_num = 1; |
paul@253 | 759 | |
paul@253 | 760 | l4_cap_idx_t tcu_irq = L4_INVALID_CAP; |