paul@173 | 1 | /* |
paul@173 | 2 | * Common clock functionality. |
paul@173 | 3 | * |
paul@173 | 4 | * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk> |
paul@173 | 5 | * |
paul@173 | 6 | * This program is free software; you can redistribute it and/or |
paul@173 | 7 | * modify it under the terms of the GNU General Public License as |
paul@173 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@173 | 9 | * the License, or (at your option) any later version. |
paul@173 | 10 | * |
paul@173 | 11 | * This program is distributed in the hope that it will be useful, |
paul@173 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@173 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@173 | 14 | * GNU General Public License for more details. |
paul@173 | 15 | * |
paul@173 | 16 | * You should have received a copy of the GNU General Public License |
paul@173 | 17 | * along with this program; if not, write to the Free Software |
paul@173 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@173 | 19 | * Boston, MA 02110-1301, USA |
paul@173 | 20 | */ |
paul@173 | 21 | |
paul@173 | 22 | #pragma once |
paul@173 | 23 | |
paul@173 | 24 | #ifdef __cplusplus |
paul@173 | 25 | |
paul@173 | 26 | #include <l4/devices/hw_register_block.h> |
paul@173 | 27 | #include <l4/devices/cpm.h> |
paul@173 | 28 | #include <l4/sys/types.h> |
paul@173 | 29 | #include <stdint.h> |
paul@173 | 30 | |
paul@173 | 31 | /* Forward declaration. */ |
paul@173 | 32 | |
paul@173 | 33 | class Clock_base; |
paul@173 | 34 | |
paul@173 | 35 | |
paul@173 | 36 | |
paul@173 | 37 | /* Register access type. */ |
paul@173 | 38 | |
paul@173 | 39 | class Cpm_regs |
paul@173 | 40 | { |
paul@173 | 41 | Hw::Register_block<32> _regs; |
paul@173 | 42 | |
paul@173 | 43 | protected: |
paul@173 | 44 | Clock_base **_clocks; |
paul@173 | 45 | |
paul@173 | 46 | public: |
paul@173 | 47 | uint32_t exclk_freq; |
paul@173 | 48 | |
paul@173 | 49 | explicit Cpm_regs(l4_addr_t addr, Clock_base *clocks[], |
paul@173 | 50 | uint32_t exclk_freq); |
paul@173 | 51 | |
paul@173 | 52 | // Utility methods. |
paul@173 | 53 | |
paul@173 | 54 | uint32_t get_field(uint32_t reg, uint32_t mask, uint8_t shift); |
paul@173 | 55 | void set_field(uint32_t reg, uint32_t mask, uint8_t shift, uint32_t value); |
paul@173 | 56 | |
paul@173 | 57 | Clock_base *get_clock(int num); |
paul@173 | 58 | }; |
paul@173 | 59 | |
paul@173 | 60 | |
paul@173 | 61 | |
paul@173 | 62 | // Register field abstraction. |
paul@173 | 63 | |
paul@173 | 64 | class Field |
paul@173 | 65 | { |
paul@173 | 66 | uint32_t reg; |
paul@173 | 67 | uint32_t mask; |
paul@173 | 68 | uint8_t bit; |
paul@173 | 69 | bool defined; |
paul@173 | 70 | |
paul@173 | 71 | public: |
paul@173 | 72 | explicit Field() |
paul@173 | 73 | : defined(false) |
paul@173 | 74 | { |
paul@173 | 75 | } |
paul@173 | 76 | |
paul@173 | 77 | explicit Field(uint32_t reg, uint32_t mask, uint32_t bit) |
paul@173 | 78 | : reg(reg), mask(mask), bit(bit), defined(true) |
paul@173 | 79 | { |
paul@173 | 80 | } |
paul@173 | 81 | |
paul@173 | 82 | uint32_t get_field(Cpm_regs ®s); |
paul@173 | 83 | void set_field(Cpm_regs ®s, uint32_t value); |
paul@173 | 84 | bool is_defined() { return defined; } |
paul@173 | 85 | |
paul@173 | 86 | // Undefined field object. |
paul@173 | 87 | |
paul@173 | 88 | static Field undefined; |
paul@173 | 89 | }; |
paul@173 | 90 | |
paul@173 | 91 | |
paul@173 | 92 | |
paul@173 | 93 | // Clock sources. |
paul@173 | 94 | |
paul@173 | 95 | class Mux |
paul@173 | 96 | { |
paul@173 | 97 | int _num_inputs; |
paul@173 | 98 | enum Clock_identifiers *_inputs, _input; |
paul@173 | 99 | |
paul@173 | 100 | public: |
paul@173 | 101 | explicit Mux(int num_inputs, enum Clock_identifiers inputs[]) |
paul@173 | 102 | : _num_inputs(num_inputs), _inputs(inputs) |
paul@173 | 103 | { |
paul@173 | 104 | } |
paul@173 | 105 | |
paul@173 | 106 | explicit Mux(enum Clock_identifiers input) |
paul@173 | 107 | : _num_inputs(1), _inputs(&_input) |
paul@173 | 108 | { |
paul@173 | 109 | _input = input; |
paul@173 | 110 | } |
paul@173 | 111 | |
paul@173 | 112 | explicit Mux() |
paul@173 | 113 | : _num_inputs(0), _inputs(NULL) |
paul@173 | 114 | { |
paul@173 | 115 | } |
paul@173 | 116 | |
paul@173 | 117 | int get_number() { return _num_inputs; } |
paul@173 | 118 | enum Clock_identifiers get_input(int num); |
paul@173 | 119 | }; |
paul@173 | 120 | |
paul@174 | 121 | |
paul@174 | 122 | |
paul@173 | 123 | class Source |
paul@173 | 124 | { |
paul@173 | 125 | Mux _inputs; |
paul@173 | 126 | Field _source; |
paul@173 | 127 | |
paul@173 | 128 | public: |
paul@173 | 129 | explicit Source(Mux inputs, Field source) |
paul@173 | 130 | : _inputs(inputs), _source(source) |
paul@173 | 131 | { |
paul@173 | 132 | } |
paul@173 | 133 | |
paul@173 | 134 | explicit Source(Mux inputs) |
paul@173 | 135 | : _inputs(inputs) |
paul@173 | 136 | { |
paul@173 | 137 | } |
paul@173 | 138 | |
paul@173 | 139 | explicit Source() |
paul@173 | 140 | { |
paul@173 | 141 | } |
paul@173 | 142 | |
paul@173 | 143 | int get_number() { return _inputs.get_number(); } |
paul@173 | 144 | enum Clock_identifiers get_input(int num) { return _inputs.get_input(num); } |
paul@173 | 145 | |
paul@173 | 146 | // Clock source. |
paul@173 | 147 | |
paul@173 | 148 | uint8_t get_source(Cpm_regs ®s); |
paul@173 | 149 | void set_source(Cpm_regs ®s, uint8_t source); |
paul@173 | 150 | |
paul@173 | 151 | // Clock source frequency. |
paul@173 | 152 | |
paul@173 | 153 | uint32_t get_frequency(Cpm_regs ®s); |
paul@173 | 154 | |
paul@173 | 155 | // Undefined source object. |
paul@173 | 156 | |
paul@173 | 157 | static Source undefined; |
paul@173 | 158 | }; |
paul@173 | 159 | |
paul@173 | 160 | |
paul@173 | 161 | |
paul@174 | 162 | // Frequency transformation. |
paul@174 | 163 | |
paul@174 | 164 | class Transform |
paul@174 | 165 | { |
paul@174 | 166 | public: |
paul@174 | 167 | |
paul@174 | 168 | // Output frequency. |
paul@174 | 169 | |
paul@174 | 170 | virtual uint32_t get_frequency(Cpm_regs ®s, uint32_t source_frequency) = 0; |
paul@174 | 171 | }; |
paul@174 | 172 | |
paul@174 | 173 | |
paul@174 | 174 | |
paul@174 | 175 | class Divider : public Transform |
paul@174 | 176 | { |
paul@174 | 177 | Field _divider; |
paul@174 | 178 | |
paul@174 | 179 | public: |
paul@174 | 180 | explicit Divider(Field divider) |
paul@174 | 181 | : _divider(divider) |
paul@174 | 182 | { |
paul@174 | 183 | } |
paul@174 | 184 | |
paul@174 | 185 | explicit Divider() |
paul@174 | 186 | : _divider(Field::undefined) |
paul@174 | 187 | { |
paul@174 | 188 | } |
paul@174 | 189 | |
paul@174 | 190 | // Clock divider. |
paul@174 | 191 | |
paul@174 | 192 | uint32_t get_divider(Cpm_regs ®s); |
paul@174 | 193 | void set_divider(Cpm_regs ®s, uint32_t division); |
paul@174 | 194 | |
paul@174 | 195 | // Output frequency. |
paul@174 | 196 | |
paul@174 | 197 | uint32_t get_frequency(Cpm_regs ®s, uint32_t source_frequency); |
paul@174 | 198 | |
paul@174 | 199 | // Undefined divider. |
paul@174 | 200 | |
paul@174 | 201 | static Divider undefined; |
paul@174 | 202 | }; |
paul@174 | 203 | |
paul@174 | 204 | |
paul@174 | 205 | |
paul@174 | 206 | class Divider_pll : public Transform |
paul@174 | 207 | { |
paul@174 | 208 | Field _multiplier, _input_division, _output_division0, _output_division1; |
paul@174 | 209 | |
paul@174 | 210 | public: |
paul@174 | 211 | explicit Divider_pll(Field multiplier, Field input_division, |
paul@174 | 212 | Field output_division0, Field output_division1) |
paul@174 | 213 | : _multiplier(multiplier), _input_division(input_division), |
paul@174 | 214 | _output_division0(output_division0), _output_division1(output_division1) |
paul@174 | 215 | { |
paul@174 | 216 | } |
paul@174 | 217 | |
paul@174 | 218 | // General frequency modifiers. |
paul@174 | 219 | |
paul@174 | 220 | uint16_t get_multiplier(Cpm_regs ®s); |
paul@174 | 221 | void set_multiplier(Cpm_regs ®s, uint16_t multiplier); |
paul@174 | 222 | uint8_t get_input_division(Cpm_regs ®s); |
paul@174 | 223 | void set_input_division(Cpm_regs ®s, uint8_t divider); |
paul@174 | 224 | uint8_t get_output_division(Cpm_regs ®s); |
paul@174 | 225 | void set_output_division(Cpm_regs ®s, uint8_t divider); |
paul@174 | 226 | |
paul@174 | 227 | // Output frequency. |
paul@174 | 228 | |
paul@174 | 229 | uint32_t get_frequency(Cpm_regs ®s, uint32_t source_frequency); |
paul@174 | 230 | |
paul@174 | 231 | // Other operations. |
paul@174 | 232 | |
paul@174 | 233 | void set_pll_parameters(Cpm_regs ®s, uint16_t multiplier, |
paul@174 | 234 | uint8_t in_divider, uint8_t out_divider); |
paul@174 | 235 | }; |
paul@174 | 236 | |
paul@174 | 237 | |
paul@174 | 238 | |
paul@173 | 239 | // Common clock abstraction. |
paul@173 | 240 | |
paul@173 | 241 | class Clock_base |
paul@173 | 242 | { |
paul@173 | 243 | Source _source; |
paul@173 | 244 | |
paul@173 | 245 | public: |
paul@173 | 246 | explicit Clock_base(Source source) |
paul@173 | 247 | : _source(source) |
paul@173 | 248 | { |
paul@173 | 249 | } |
paul@173 | 250 | |
paul@173 | 251 | // Clock control. |
paul@173 | 252 | |
paul@173 | 253 | virtual int have_clock(Cpm_regs ®s); |
paul@173 | 254 | virtual void start_clock(Cpm_regs ®s); |
paul@173 | 255 | virtual void stop_clock(Cpm_regs ®s); |
paul@173 | 256 | |
paul@173 | 257 | // Clock divider. |
paul@173 | 258 | |
paul@173 | 259 | virtual uint32_t get_divider(Cpm_regs ®s); |
paul@173 | 260 | virtual void set_divider(Cpm_regs ®s, uint32_t division); |
paul@173 | 261 | |
paul@173 | 262 | // Clock source. |
paul@173 | 263 | |
paul@173 | 264 | virtual uint8_t get_source(Cpm_regs ®s); |
paul@173 | 265 | virtual void set_source(Cpm_regs ®s, uint8_t source); |
paul@173 | 266 | |
paul@173 | 267 | // Clock source frequency. |
paul@173 | 268 | |
paul@173 | 269 | virtual uint32_t get_source_frequency(Cpm_regs ®s); |
paul@173 | 270 | |
paul@173 | 271 | // Output frequency. |
paul@173 | 272 | |
paul@173 | 273 | virtual uint32_t get_frequency(Cpm_regs ®s); |
paul@173 | 274 | }; |
paul@173 | 275 | |
paul@173 | 276 | |
paul@173 | 277 | |
paul@173 | 278 | // PLL descriptions. |
paul@173 | 279 | |
paul@173 | 280 | class Pll : public Clock_base |
paul@173 | 281 | { |
paul@173 | 282 | Field _enable, _stable, _bypass; |
paul@174 | 283 | Divider_pll _divider; |
paul@173 | 284 | |
paul@173 | 285 | public: |
paul@173 | 286 | explicit Pll(Source source, |
paul@173 | 287 | Field enable, Field stable, Field bypass, |
paul@174 | 288 | Divider_pll divider) |
paul@173 | 289 | : Clock_base(source), |
paul@173 | 290 | _enable(enable), _stable(stable), _bypass(bypass), |
paul@174 | 291 | _divider(divider) |
paul@173 | 292 | { |
paul@173 | 293 | } |
paul@173 | 294 | |
paul@173 | 295 | // PLL_specific control. |
paul@173 | 296 | |
paul@173 | 297 | int have_pll(Cpm_regs ®s); |
paul@173 | 298 | int pll_enabled(Cpm_regs ®s); |
paul@173 | 299 | int pll_bypassed(Cpm_regs ®s); |
paul@173 | 300 | |
paul@173 | 301 | // Clock control. |
paul@173 | 302 | |
paul@173 | 303 | int have_clock(Cpm_regs ®s); |
paul@173 | 304 | void start_clock(Cpm_regs ®s); |
paul@173 | 305 | void stop_clock(Cpm_regs ®s); |
paul@173 | 306 | |
paul@173 | 307 | // General frequency modifiers. |
paul@173 | 308 | |
paul@173 | 309 | uint16_t get_multiplier(Cpm_regs ®s); |
paul@173 | 310 | void set_multiplier(Cpm_regs ®s, uint16_t multiplier); |
paul@173 | 311 | uint8_t get_input_division(Cpm_regs ®s); |
paul@173 | 312 | void set_input_division(Cpm_regs ®s, uint8_t divider); |
paul@173 | 313 | uint8_t get_output_division(Cpm_regs ®s); |
paul@173 | 314 | void set_output_division(Cpm_regs ®s, uint8_t divider); |
paul@173 | 315 | |
paul@173 | 316 | // PLL output frequency. |
paul@173 | 317 | |
paul@173 | 318 | uint32_t get_frequency(Cpm_regs ®s); |
paul@173 | 319 | |
paul@173 | 320 | // Other operations. |
paul@173 | 321 | |
paul@173 | 322 | void set_pll_parameters(Cpm_regs ®s, uint16_t multiplier, |
paul@173 | 323 | uint8_t in_divider, uint8_t out_divider); |
paul@173 | 324 | }; |
paul@173 | 325 | |
paul@173 | 326 | |
paul@173 | 327 | |
paul@173 | 328 | // Clock descriptions. |
paul@173 | 329 | |
paul@173 | 330 | class Clock : public Clock_base |
paul@173 | 331 | { |
paul@174 | 332 | Field _gate, _change_enable, _busy; |
paul@174 | 333 | Divider _divider; |
paul@173 | 334 | |
paul@173 | 335 | // Clock control. |
paul@173 | 336 | |
paul@173 | 337 | void change_disable(Cpm_regs ®s); |
paul@173 | 338 | void change_enable(Cpm_regs ®s); |
paul@173 | 339 | void wait_busy(Cpm_regs ®s); |
paul@173 | 340 | |
paul@173 | 341 | public: |
paul@173 | 342 | explicit Clock(Source source = Source::undefined, |
paul@173 | 343 | Field gate = Field::undefined, |
paul@173 | 344 | Field change_enable = Field::undefined, |
paul@173 | 345 | Field busy = Field::undefined, |
paul@174 | 346 | Divider divider = Divider::undefined) |
paul@173 | 347 | : Clock_base(source), |
paul@173 | 348 | _gate(gate), _change_enable(change_enable), _busy(busy), _divider(divider) |
paul@173 | 349 | { |
paul@173 | 350 | } |
paul@173 | 351 | |
paul@173 | 352 | // Clock control. |
paul@173 | 353 | |
paul@173 | 354 | int have_clock(Cpm_regs ®s); |
paul@173 | 355 | void start_clock(Cpm_regs ®s); |
paul@173 | 356 | void stop_clock(Cpm_regs ®s); |
paul@173 | 357 | |
paul@173 | 358 | // Clock divider. |
paul@173 | 359 | |
paul@173 | 360 | uint32_t get_divider(Cpm_regs ®s); |
paul@173 | 361 | void set_divider(Cpm_regs ®s, uint32_t division); |
paul@173 | 362 | |
paul@173 | 363 | // Clock source. |
paul@173 | 364 | |
paul@173 | 365 | void set_source(Cpm_regs ®s, uint8_t source); |
paul@174 | 366 | |
paul@174 | 367 | // Output frequency. |
paul@174 | 368 | |
paul@174 | 369 | uint32_t get_frequency(Cpm_regs ®s); |
paul@173 | 370 | }; |
paul@173 | 371 | |
paul@173 | 372 | #endif /* __cplusplus */ |