paul@0 | 1 | /* |
paul@0 | 2 | * (c) 2008-2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de> |
paul@0 | 3 | * economic rights: Technische Universit??t Dresden (Germany) |
paul@211 | 4 | * Copyright (C) 2017, 2018, 2019, 2020, 2023 Paul Boddie <paul@boddie.org.uk> |
paul@0 | 5 | * |
paul@0 | 6 | * This file is part of TUD:OS and distributed under the terms of the |
paul@0 | 7 | * GNU General Public License 2. |
paul@0 | 8 | * Please see the COPYING-GPL-2 file for details. |
paul@0 | 9 | */ |
paul@0 | 10 | /* |
paul@0 | 11 | * Access the I2C peripherals on the MIPS Creator CI20 board. |
paul@0 | 12 | */ |
paul@0 | 13 | |
paul@0 | 14 | #include <l4/devices/cpm-jz4780.h> |
paul@0 | 15 | #include <l4/devices/gpio-jz4780.h> |
paul@0 | 16 | #include <l4/devices/i2c-jz4780.h> |
paul@54 | 17 | #include <l4/devices/memory.h> |
paul@0 | 18 | #include <l4/io/io.h> |
paul@0 | 19 | #include <l4/re/env.h> |
paul@0 | 20 | #include <l4/re/c/util/cap_alloc.h> |
paul@0 | 21 | #include <l4/sys/factory.h> |
paul@0 | 22 | #include <l4/sys/icu.h> |
paul@0 | 23 | #include <l4/sys/ipc.h> |
paul@0 | 24 | #include <l4/sys/irq.h> |
paul@54 | 25 | #include <l4/sys/rcv_endpoint.h> |
paul@0 | 26 | #include <l4/vbus/vbus.h> |
paul@0 | 27 | #include <stdio.h> |
paul@0 | 28 | #include <unistd.h> |
paul@0 | 29 | #include <stdint.h> |
paul@56 | 30 | #include <string.h> |
paul@0 | 31 | |
paul@62 | 32 | #define REG(x) *((volatile uint32_t *) (x)) |
paul@62 | 33 | |
paul@62 | 34 | #define RTC_RTCCR 0x00 |
paul@62 | 35 | #define RTC_HCR 0x20 |
paul@62 | 36 | #define RTC_HSPR 0x34 |
paul@62 | 37 | #define RTC_WENR 0x3c |
paul@62 | 38 | #define RTC_PWRONCR 0x3c |
paul@62 | 39 | |
paul@0 | 40 | |
paul@0 | 41 | |
paul@0 | 42 | enum { |
paul@54 | 43 | PMSDA = 30, /* via PORTD */ |
paul@54 | 44 | PMSCL = 31, /* via PORTD */ |
paul@54 | 45 | PWM3 = 3, /* via PORTE */ |
paul@54 | 46 | PWM4 = 4, /* via PORTE */ |
paul@54 | 47 | RTCSDA = 12, /* via PORTE */ |
paul@54 | 48 | RTCSCL = 13, /* via PORTE */ |
paul@0 | 49 | DDCSCL = 24, /* via PORTF */ |
paul@0 | 50 | DDCSDA = 25, /* via PORTF */ |
paul@0 | 51 | }; |
paul@0 | 52 | |
paul@0 | 53 | |
paul@0 | 54 | |
paul@0 | 55 | /* Device and resource discovery. */ |
paul@0 | 56 | |
paul@0 | 57 | static long item_in_range(long start, long end, long index) |
paul@0 | 58 | { |
paul@0 | 59 | if (start < end) |
paul@0 | 60 | return start + index; |
paul@0 | 61 | else |
paul@0 | 62 | return start - index; |
paul@0 | 63 | } |
paul@0 | 64 | |
paul@56 | 65 | static long i2c_read(void *i2c_channel, uint8_t *buf, unsigned length, |
paul@214 | 66 | int stop, l4_cap_idx_t irqcap) |
paul@54 | 67 | { |
paul@54 | 68 | l4_msgtag_t tag; |
paul@54 | 69 | |
paul@214 | 70 | jz4780_i2c_start_read(i2c_channel, buf, length, stop); |
paul@54 | 71 | |
paul@54 | 72 | while (!jz4780_i2c_read_done(i2c_channel)) |
paul@54 | 73 | { |
paul@214 | 74 | tag = l4_irq_receive(irqcap, l4_timeout(L4_IPC_TIMEOUT_NEVER, l4_timeout_from_us(1000))); |
paul@54 | 75 | |
paul@214 | 76 | if (l4_ipc_error(tag, l4_utcb())) |
paul@214 | 77 | return 0; |
paul@56 | 78 | |
paul@56 | 79 | if (jz4780_i2c_failed(i2c_channel)) |
paul@56 | 80 | return 0; |
paul@54 | 81 | |
paul@54 | 82 | jz4780_i2c_read(i2c_channel); |
paul@54 | 83 | } |
paul@54 | 84 | |
paul@54 | 85 | return jz4780_i2c_have_read(i2c_channel); |
paul@54 | 86 | } |
paul@54 | 87 | |
paul@56 | 88 | static long i2c_write(void *i2c_channel, uint8_t *buf, unsigned length, |
paul@214 | 89 | int stop, l4_cap_idx_t irqcap) |
paul@56 | 90 | { |
paul@56 | 91 | l4_msgtag_t tag; |
paul@56 | 92 | long err; |
paul@56 | 93 | |
paul@214 | 94 | jz4780_i2c_start_write(i2c_channel, buf, length, stop); |
paul@56 | 95 | |
paul@56 | 96 | while (!jz4780_i2c_write_done(i2c_channel)) |
paul@56 | 97 | { |
paul@214 | 98 | tag = l4_irq_receive(irqcap, l4_timeout(L4_IPC_TIMEOUT_NEVER, l4_timeout_from_us(1000))); |
paul@56 | 99 | |
paul@56 | 100 | if ((err = l4_ipc_error(tag, l4_utcb()))) |
paul@214 | 101 | return 0; |
paul@56 | 102 | |
paul@56 | 103 | if (jz4780_i2c_failed(i2c_channel)) |
paul@56 | 104 | return 0; |
paul@56 | 105 | |
paul@56 | 106 | jz4780_i2c_write(i2c_channel); |
paul@56 | 107 | } |
paul@56 | 108 | |
paul@56 | 109 | return jz4780_i2c_have_written(i2c_channel); |
paul@56 | 110 | } |
paul@56 | 111 | |
paul@61 | 112 | static long i2c_get(void *i2c_channel, uint8_t *buffer, long length, l4_cap_idx_t irqcap) |
paul@58 | 113 | { |
paul@58 | 114 | long pos; |
paul@58 | 115 | |
paul@61 | 116 | memset(buffer, 0, length); |
paul@214 | 117 | pos = i2c_read(i2c_channel, buffer, length, 1, irqcap); |
paul@61 | 118 | |
paul@61 | 119 | return pos; |
paul@61 | 120 | } |
paul@61 | 121 | |
paul@61 | 122 | static long i2c_get_reg(void *i2c_channel, uint8_t reg, uint8_t *buffer, long length, l4_cap_idx_t irqcap) |
paul@61 | 123 | { |
paul@58 | 124 | buffer[0] = reg; |
paul@214 | 125 | i2c_write(i2c_channel, buffer, 1, 0, irqcap); |
paul@58 | 126 | |
paul@61 | 127 | return i2c_get(i2c_channel, buffer, length, irqcap); |
paul@61 | 128 | } |
paul@61 | 129 | |
paul@61 | 130 | static long i2c_set_reg(void *i2c_channel, uint8_t reg, uint8_t *buffer, long length, l4_cap_idx_t irqcap) |
paul@61 | 131 | { |
paul@61 | 132 | uint8_t buf[length + 1]; |
paul@61 | 133 | long pos; |
paul@61 | 134 | |
paul@61 | 135 | buf[0] = reg; |
paul@61 | 136 | memcpy(buf + 1, buffer, length); |
paul@214 | 137 | pos = i2c_write(i2c_channel, buf, length + 1, 1, irqcap); |
paul@58 | 138 | |
paul@58 | 139 | return pos; |
paul@58 | 140 | } |
paul@58 | 141 | |
paul@58 | 142 | static void i2c_report(void *i2c_channel, uint8_t *buffer, long length) |
paul@58 | 143 | { |
paul@58 | 144 | if (!jz4780_i2c_failed(i2c_channel)) |
paul@58 | 145 | { |
paul@58 | 146 | printf("Read: "); |
paul@58 | 147 | while (length--) |
paul@58 | 148 | printf("%02x", *(buffer++)); |
paul@58 | 149 | printf("\n"); |
paul@58 | 150 | } |
paul@58 | 151 | else |
paul@58 | 152 | printf("Read failed.\n"); |
paul@58 | 153 | } |
paul@58 | 154 | |
paul@54 | 155 | static void i2c_scan(void *i2c_channel, l4_cap_idx_t irqcap) |
paul@54 | 156 | { |
paul@54 | 157 | uint8_t buf[1]; |
paul@54 | 158 | unsigned int address; |
paul@54 | 159 | |
paul@54 | 160 | for (address = 0; address < 0x20; address++) |
paul@54 | 161 | printf("%02x ", address); |
paul@54 | 162 | printf("\n"); |
paul@54 | 163 | |
paul@54 | 164 | for (address = 0; address < 0x20; address++) |
paul@54 | 165 | printf("-- "); |
paul@54 | 166 | |
paul@54 | 167 | for (address = 0; address < 0x80; address++) |
paul@54 | 168 | { |
paul@54 | 169 | if ((address % 32) == 0) |
paul@54 | 170 | printf("\n"); |
paul@54 | 171 | |
paul@54 | 172 | jz4780_i2c_set_target(i2c_channel, address); |
paul@61 | 173 | i2c_get(i2c_channel, buf, 1, irqcap); |
paul@54 | 174 | |
paul@56 | 175 | if (!jz4780_i2c_failed(i2c_channel)) |
paul@54 | 176 | printf("%02x ", address); |
paul@54 | 177 | else |
paul@54 | 178 | printf("?? "); |
paul@54 | 179 | } |
paul@54 | 180 | |
paul@54 | 181 | printf("\n"); |
paul@54 | 182 | for (address = 0; address < 0x20; address++) |
paul@54 | 183 | printf("-- "); |
paul@54 | 184 | printf("\n\n"); |
paul@54 | 185 | } |
paul@54 | 186 | |
paul@61 | 187 | static void pmic_dump(void *i2c_channel, l4_cap_idx_t irqcap) |
paul@54 | 188 | { |
paul@61 | 189 | uint8_t regs[] = {0x00, 0x01, 0x10, 0x12, 0x20, 0x22, 0x30, 0x32, |
paul@61 | 190 | 0x40, 0x41, 0x50, 0x51, 0x60, 0x61, 0x70, 0x71, |
paul@61 | 191 | 0x80, 0x81, 0x91}; |
paul@61 | 192 | uint8_t buf[1]; |
paul@56 | 193 | long pos; |
paul@61 | 194 | unsigned i; |
paul@54 | 195 | |
paul@61 | 196 | for (i = 0; i < sizeof(regs); i++) |
paul@56 | 197 | { |
paul@61 | 198 | printf("PMIC %02x:\n", regs[i]); |
paul@61 | 199 | jz4780_i2c_set_target(i2c_channel, 0x5a); |
paul@61 | 200 | pos = i2c_get_reg(i2c_channel, regs[i], buf, 1, irqcap); |
paul@61 | 201 | i2c_report(i2c_channel, buf, pos); |
paul@56 | 202 | } |
paul@54 | 203 | } |
paul@54 | 204 | |
paul@61 | 205 | static void rtc_dump(void *i2c_channel, l4_cap_idx_t irqcap, uint8_t *rtcregs) |
paul@54 | 206 | { |
paul@58 | 207 | /* Attempt to read from address 0x51 for RTC. */ |
paul@58 | 208 | |
paul@58 | 209 | jz4780_i2c_set_target(i2c_channel, 0x51); |
paul@61 | 210 | i2c_get_reg(i2c_channel, 0x00, rtcregs, 16, irqcap); |
paul@61 | 211 | i2c_report(i2c_channel, rtcregs, 16); |
paul@61 | 212 | } |
paul@61 | 213 | |
paul@61 | 214 | static void rtc_datetime(uint8_t *rtcregs) |
paul@61 | 215 | { |
paul@61 | 216 | char *weekdays[] = {"Sunday", "Monday", "Tuesday", "Wednesday", "Thursday", "Friday", "Saturday"}; |
paul@61 | 217 | printf("%s %d%d-%d%d-%d%d %d%d:%d%d:%d%d\n", |
paul@61 | 218 | weekdays[rtcregs[0x06] & 0x07], |
paul@61 | 219 | (rtcregs[0x08] & 0xf0) >> 4, |
paul@61 | 220 | rtcregs[0x08] & 0x0f, |
paul@61 | 221 | (rtcregs[0x07] & 0x10) >> 4, |
paul@61 | 222 | rtcregs[0x07] & 0x0f, |
paul@61 | 223 | (rtcregs[0x05] & 0x30) >> 4, |
paul@61 | 224 | rtcregs[0x05] & 0x0f, |
paul@61 | 225 | (rtcregs[0x04] & 0x30) >> 4, |
paul@61 | 226 | rtcregs[0x04] & 0x0f, |
paul@61 | 227 | (rtcregs[0x03] & 0x70) >> 4, |
paul@61 | 228 | rtcregs[0x03] & 0x0f, |
paul@61 | 229 | (rtcregs[0x02] & 0x70) >> 4, |
paul@61 | 230 | rtcregs[0x02] & 0x0f); |
paul@61 | 231 | } |
paul@61 | 232 | |
paul@61 | 233 | static int rtc_update(void *i2c_channel, l4_cap_idx_t irqcap, uint8_t *rtcregs) |
paul@61 | 234 | { |
paul@61 | 235 | jz4780_i2c_set_target(i2c_channel, 0x51); |
paul@61 | 236 | return i2c_set_reg(i2c_channel, 0x02, rtcregs + 2, 7, irqcap); |
paul@54 | 237 | } |
paul@54 | 238 | |
paul@62 | 239 | static void rtc_write_ready(l4_addr_t rtc_base) |
paul@62 | 240 | { |
paul@62 | 241 | while (!(REG(rtc_base + RTC_RTCCR) & 0x80)); |
paul@62 | 242 | } |
paul@62 | 243 | |
paul@62 | 244 | static void rtc_write_enable(l4_addr_t rtc_base) |
paul@62 | 245 | { |
paul@62 | 246 | rtc_write_ready(rtc_base); |
paul@62 | 247 | REG(rtc_base + RTC_WENR) = 0xa55a; |
paul@62 | 248 | while (!(REG(rtc_base + RTC_WENR) & 0x80000000)); |
paul@62 | 249 | } |
paul@62 | 250 | |
paul@0 | 251 | int main(void) |
paul@0 | 252 | { |
paul@54 | 253 | long err; |
paul@54 | 254 | |
paul@54 | 255 | /* Peripheral memory. */ |
paul@54 | 256 | |
paul@0 | 257 | l4_addr_t gpio_base = 0, gpio_base_end = 0; |
paul@54 | 258 | l4_addr_t i2c_base = 0, i2c_base_end = 0; |
paul@54 | 259 | l4_addr_t cpm_base = 0, cpm_base_end = 0; |
paul@62 | 260 | l4_addr_t rtc_base = 0, rtc_base_end = 0; |
paul@54 | 261 | l4_addr_t port_d, port_d_end; |
paul@54 | 262 | l4_addr_t port_e, port_e_end; |
paul@54 | 263 | |
paul@54 | 264 | /* Peripheral abstractions. */ |
paul@54 | 265 | |
paul@61 | 266 | void *gpio_port_d, *gpio_port_e; |
paul@54 | 267 | void *i2c, *cpm; |
paul@54 | 268 | void *i2c0, *i2c4; |
paul@54 | 269 | |
paul@54 | 270 | /* IRQ resources. */ |
paul@54 | 271 | |
paul@54 | 272 | l4_uint32_t i2c_irq_start = 0, i2c_irq_end = 0; |
paul@54 | 273 | l4_cap_idx_t icucap, irq0cap, irq4cap; |
paul@0 | 274 | |
paul@61 | 275 | /* RTC registers. */ |
paul@61 | 276 | |
paul@61 | 277 | uint8_t rtcregs[16]; |
paul@61 | 278 | int i; |
paul@61 | 279 | |
paul@0 | 280 | /* Obtain capabilities for the interrupt controller and an interrupt. */ |
paul@0 | 281 | |
paul@54 | 282 | irq0cap = l4re_util_cap_alloc(); |
paul@54 | 283 | irq4cap = l4re_util_cap_alloc(); |
paul@0 | 284 | icucap = l4re_env_get_cap("icu"); |
paul@0 | 285 | |
paul@0 | 286 | if (l4_is_invalid_cap(icucap)) |
paul@0 | 287 | { |
paul@0 | 288 | printf("No 'icu' capability available in the virtual bus.\n"); |
paul@0 | 289 | return 1; |
paul@0 | 290 | } |
paul@0 | 291 | |
paul@54 | 292 | if (l4_is_invalid_cap(irq0cap) || l4_is_invalid_cap(irq4cap)) |
paul@0 | 293 | { |
paul@54 | 294 | printf("Capabilities not available for interrupts.\n"); |
paul@0 | 295 | return 1; |
paul@0 | 296 | } |
paul@0 | 297 | |
paul@0 | 298 | /* Obtain resource details describing the interrupt for I2C channel 4. */ |
paul@0 | 299 | |
paul@0 | 300 | printf("Access IRQ...\n"); |
paul@0 | 301 | |
paul@54 | 302 | if (get_irq("jz4780-i2c", &i2c_irq_start, &i2c_irq_end) < 0) |
paul@0 | 303 | return 1; |
paul@0 | 304 | |
paul@0 | 305 | printf("IRQ range at %d...%d.\n", i2c_irq_start, i2c_irq_end); |
paul@0 | 306 | |
paul@0 | 307 | /* Obtain resource details describing I/O memory. */ |
paul@0 | 308 | |
paul@0 | 309 | printf("Access GPIO...\n"); |
paul@0 | 310 | |
paul@54 | 311 | if (get_memory("jz4780-gpio", &gpio_base, &gpio_base_end) < 0) |
paul@0 | 312 | return 1; |
paul@0 | 313 | |
paul@0 | 314 | printf("GPIO at 0x%lx...0x%lx.\n", gpio_base, gpio_base_end); |
paul@0 | 315 | |
paul@0 | 316 | printf("Access CPM...\n"); |
paul@0 | 317 | |
paul@54 | 318 | if (get_memory("jz4780-cpm", &cpm_base, &cpm_base_end) < 0) |
paul@0 | 319 | return 1; |
paul@0 | 320 | |
paul@0 | 321 | printf("CPM at 0x%lx...0x%lx.\n", cpm_base, cpm_base_end); |
paul@0 | 322 | |
paul@0 | 323 | printf("Access I2C...\n"); |
paul@0 | 324 | |
paul@54 | 325 | if (get_memory("jz4780-i2c", &i2c_base, &i2c_base_end) < 0) |
paul@0 | 326 | return 1; |
paul@0 | 327 | |
paul@0 | 328 | printf("I2C at 0x%lx...0x%lx.\n", i2c_base, i2c_base_end); |
paul@0 | 329 | |
paul@62 | 330 | printf("Access RTC...\n"); |
paul@62 | 331 | |
paul@62 | 332 | if (get_memory("jz4780-rtc", &rtc_base, &rtc_base_end) < 0) |
paul@62 | 333 | return 1; |
paul@62 | 334 | |
paul@62 | 335 | printf("RTC at 0x%lx...0x%lx.\n", rtc_base, rtc_base_end); |
paul@62 | 336 | |
paul@54 | 337 | /* Create interrupt objects. */ |
paul@0 | 338 | |
paul@54 | 339 | err = l4_error(l4_factory_create_irq(l4re_global_env->factory, irq0cap)) || |
paul@54 | 340 | l4_error(l4_factory_create_irq(l4re_global_env->factory, irq4cap)); |
paul@54 | 341 | |
paul@54 | 342 | if (err) |
paul@0 | 343 | { |
paul@0 | 344 | printf("Could not create IRQ object: %lx\n", err); |
paul@0 | 345 | return 1; |
paul@0 | 346 | } |
paul@0 | 347 | |
paul@54 | 348 | /* Bind interrupt objects to IRQ numbers. */ |
paul@0 | 349 | |
paul@54 | 350 | err = l4_error(l4_icu_bind(icucap, |
paul@54 | 351 | item_in_range(i2c_irq_start, i2c_irq_end, 0), |
paul@54 | 352 | irq0cap)) || |
paul@54 | 353 | l4_error(l4_icu_bind(icucap, |
paul@54 | 354 | item_in_range(i2c_irq_start, i2c_irq_end, 4), |
paul@54 | 355 | irq4cap)); |
paul@54 | 356 | |
paul@54 | 357 | if (err) |
paul@0 | 358 | { |
paul@54 | 359 | printf("Could not bind IRQ to the ICU: %ld\n", err); |
paul@0 | 360 | return 1; |
paul@0 | 361 | } |
paul@0 | 362 | |
paul@0 | 363 | /* Attach ourselves to the interrupt handler. */ |
paul@0 | 364 | |
paul@54 | 365 | err = l4_error(l4_rcv_ep_bind_thread(irq0cap, l4re_env()->main_thread, 0)) || |
paul@54 | 366 | l4_error(l4_rcv_ep_bind_thread(irq4cap, l4re_env()->main_thread, 4)); |
paul@0 | 367 | |
paul@54 | 368 | if (err) |
paul@0 | 369 | { |
paul@54 | 370 | printf("Could not attach to IRQs: %ld\n", err); |
paul@0 | 371 | return 1; |
paul@0 | 372 | } |
paul@0 | 373 | |
paul@0 | 374 | /* Configure pins. */ |
paul@0 | 375 | |
paul@54 | 376 | port_d = gpio_base + 0x300; |
paul@54 | 377 | port_d_end = port_d + 0x100; |
paul@54 | 378 | port_e = gpio_base + 0x400; |
paul@54 | 379 | port_e_end = port_e + 0x100; |
paul@0 | 380 | |
paul@54 | 381 | printf("PORTD at 0x%lx...0x%lx.\n", port_d, port_d_end); |
paul@54 | 382 | printf("PORTE at 0x%lx...0x%lx.\n", port_e, port_e_end); |
paul@0 | 383 | |
paul@54 | 384 | gpio_port_d = jz4780_gpio_init(port_d, port_d_end, 32, 0xffff4fff, 0x0000b000); |
paul@54 | 385 | gpio_port_e = jz4780_gpio_init(port_e, port_e_end, 32, 0xfffff37c, 0x00000483); |
paul@0 | 386 | |
paul@0 | 387 | printf("Set up GPIO pins...\n"); |
paul@0 | 388 | |
paul@54 | 389 | jz4780_gpio_config_pad(gpio_port_d, PMSCL, Function_alt, 0); |
paul@54 | 390 | jz4780_gpio_config_pad(gpio_port_d, PMSDA, Function_alt, 0); |
paul@54 | 391 | |
paul@61 | 392 | jz4780_gpio_config_pad(gpio_port_e, RTCSCL, Function_alt, 1); |
paul@61 | 393 | jz4780_gpio_config_pad(gpio_port_e, RTCSDA, Function_alt, 1); |
paul@0 | 394 | |
paul@0 | 395 | /* Obtain CPM and I2C objects. */ |
paul@0 | 396 | |
paul@0 | 397 | cpm = jz4780_cpm_init(cpm_base); |
paul@0 | 398 | |
paul@0 | 399 | /* Attempt to set the PCLK source to SCLK_A. */ |
paul@0 | 400 | |
paul@211 | 401 | jz4780_cpm_set_source_clock(cpm, Clock_pclock, Clock_main); |
paul@213 | 402 | printf("Peripheral clock: %lld\n", jz4780_cpm_get_frequency(cpm, Clock_pclock)); |
paul@0 | 403 | |
paul@0 | 404 | /* Obtain I2C reference. */ |
paul@0 | 405 | |
paul@0 | 406 | i2c = jz4780_i2c_init(i2c_base, i2c_base_end, cpm, 100000); /* 100 kHz */ |
paul@54 | 407 | i2c0 = jz4780_i2c_get_channel(i2c, 0); |
paul@54 | 408 | i2c4 = jz4780_i2c_get_channel(i2c, 4); |
paul@0 | 409 | |
paul@54 | 410 | printf("Scan I2C0...\n"); |
paul@54 | 411 | i2c_scan(i2c0, irq0cap); |
paul@0 | 412 | |
paul@54 | 413 | printf("Scan I2C4...\n"); |
paul@54 | 414 | i2c_scan(i2c4, irq4cap); |
paul@54 | 415 | |
paul@61 | 416 | printf("PMIC...\n"); |
paul@61 | 417 | pmic_dump(i2c0, irq0cap); |
paul@61 | 418 | |
paul@61 | 419 | printf("RTC...\n"); |
paul@61 | 420 | rtc_dump(i2c4, irq4cap, rtcregs); |
paul@0 | 421 | |
paul@61 | 422 | rtcregs[0x02] = 0x56; |
paul@61 | 423 | rtcregs[0x03] = 0x34; |
paul@61 | 424 | rtcregs[0x04] = 0x12; |
paul@61 | 425 | rtcregs[0x05] = 0x25; /* 25th */ |
paul@61 | 426 | rtcregs[0x06] = 0x06; /* Saturday */ |
paul@61 | 427 | rtcregs[0x07] = 0x01; /* January */ |
paul@61 | 428 | rtcregs[0x08] = 0x20; /* 2020 */ |
paul@0 | 429 | |
paul@61 | 430 | printf("Updated %d registers.\n", rtc_update(i2c4, irq4cap, rtcregs)); |
paul@61 | 431 | |
paul@62 | 432 | for (i = 0; i < 3; i++) |
paul@61 | 433 | { |
paul@61 | 434 | rtc_dump(i2c4, irq4cap, rtcregs); |
paul@61 | 435 | rtc_datetime(rtcregs); |
paul@61 | 436 | sleep(1); |
paul@61 | 437 | } |
paul@58 | 438 | |
paul@62 | 439 | /* Investigate the internal RTC registers. */ |
paul@62 | 440 | |
paul@62 | 441 | printf("Control: %08x\n", REG(rtc_base + RTC_RTCCR)); |
paul@62 | 442 | printf("Hibernate: %08x\n", REG(rtc_base + RTC_HCR)); |
paul@62 | 443 | printf("Scratchpad: %08x\n", REG(rtc_base + RTC_HSPR)); |
paul@62 | 444 | printf("Power on control: %08x\n", REG(rtc_base + RTC_PWRONCR)); |
paul@62 | 445 | printf("Write enable: %08x\n", REG(rtc_base + RTC_WENR)); |
paul@62 | 446 | |
paul@62 | 447 | rtc_write_enable(rtc_base); |
paul@62 | 448 | rtc_write_ready(rtc_base); |
paul@62 | 449 | REG(rtc_base + RTC_HSPR) = 0x12345678; |
paul@62 | 450 | |
paul@62 | 451 | for (i = 0; i < 3; i++) |
paul@62 | 452 | { |
paul@62 | 453 | printf("Scratchpad: %08x\n", REG(rtc_base + RTC_HSPR)); |
paul@62 | 454 | sleep(1); |
paul@62 | 455 | } |
paul@62 | 456 | |
paul@214 | 457 | //jz4780_i2c_disable(i2c0); |
paul@214 | 458 | //jz4780_i2c_disable(i2c4); |
paul@0 | 459 | |
paul@0 | 460 | /* Detach from the interrupt. */ |
paul@0 | 461 | |
paul@54 | 462 | err = l4_error(l4_irq_detach(irq0cap)) || l4_error(l4_irq_detach(irq4cap)); |
paul@0 | 463 | |
paul@54 | 464 | if (err) |
paul@54 | 465 | printf("Error detaching from IRQ objects: %ld\n", err); |
paul@54 | 466 | |
paul@54 | 467 | printf("Done.\n"); |
paul@0 | 468 | |
paul@0 | 469 | return 0; |
paul@0 | 470 | } |