paul@173 | 1 | /* |
paul@173 | 2 | * Common clock functionality. |
paul@173 | 3 | * |
paul@173 | 4 | * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk> |
paul@173 | 5 | * |
paul@173 | 6 | * This program is free software; you can redistribute it and/or |
paul@173 | 7 | * modify it under the terms of the GNU General Public License as |
paul@173 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@173 | 9 | * the License, or (at your option) any later version. |
paul@173 | 10 | * |
paul@173 | 11 | * This program is distributed in the hope that it will be useful, |
paul@173 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@173 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@173 | 14 | * GNU General Public License for more details. |
paul@173 | 15 | * |
paul@173 | 16 | * You should have received a copy of the GNU General Public License |
paul@173 | 17 | * along with this program; if not, write to the Free Software |
paul@173 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@173 | 19 | * Boston, MA 02110-1301, USA |
paul@173 | 20 | */ |
paul@173 | 21 | |
paul@173 | 22 | #pragma once |
paul@173 | 23 | |
paul@173 | 24 | #ifdef __cplusplus |
paul@173 | 25 | |
paul@211 | 26 | #include <l4/devices/clocks.h> |
paul@173 | 27 | #include <l4/devices/hw_register_block.h> |
paul@173 | 28 | #include <l4/sys/types.h> |
paul@173 | 29 | #include <stdint.h> |
paul@173 | 30 | |
paul@173 | 31 | /* Forward declaration. */ |
paul@173 | 32 | |
paul@173 | 33 | class Clock_base; |
paul@173 | 34 | |
paul@173 | 35 | |
paul@173 | 36 | |
paul@173 | 37 | /* Register access type. */ |
paul@173 | 38 | |
paul@173 | 39 | class Cpm_regs |
paul@173 | 40 | { |
paul@211 | 41 | protected: |
paul@173 | 42 | Hw::Register_block<32> _regs; |
paul@173 | 43 | Clock_base **_clocks; |
paul@173 | 44 | |
paul@173 | 45 | public: |
paul@211 | 46 | explicit Cpm_regs(l4_addr_t addr, Clock_base *clocks[]); |
paul@173 | 47 | |
paul@173 | 48 | // Utility methods. |
paul@173 | 49 | |
paul@173 | 50 | uint32_t get_field(uint32_t reg, uint32_t mask, uint8_t shift); |
paul@173 | 51 | void set_field(uint32_t reg, uint32_t mask, uint8_t shift, uint32_t value); |
paul@173 | 52 | |
paul@173 | 53 | Clock_base *get_clock(int num); |
paul@173 | 54 | }; |
paul@173 | 55 | |
paul@173 | 56 | |
paul@173 | 57 | |
paul@173 | 58 | // Register field abstraction. |
paul@173 | 59 | |
paul@173 | 60 | class Field |
paul@173 | 61 | { |
paul@173 | 62 | uint32_t reg; |
paul@173 | 63 | uint32_t mask; |
paul@173 | 64 | uint8_t bit; |
paul@173 | 65 | bool defined; |
paul@247 | 66 | uint32_t adjustment; |
paul@201 | 67 | uint32_t _asserted = 0, _deasserted = 0; |
paul@173 | 68 | |
paul@173 | 69 | public: |
paul@173 | 70 | explicit Field() |
paul@173 | 71 | : defined(false) |
paul@173 | 72 | { |
paul@173 | 73 | } |
paul@173 | 74 | |
paul@201 | 75 | explicit Field(uint32_t reg, uint32_t mask, uint32_t bit, |
paul@247 | 76 | bool inverted = false, uint32_t adjustment = 0) |
paul@247 | 77 | : reg(reg), mask(mask), bit(bit), defined(true), adjustment(adjustment) |
paul@173 | 78 | { |
paul@201 | 79 | if (inverted) |
paul@201 | 80 | _deasserted = mask; |
paul@201 | 81 | else |
paul@201 | 82 | _asserted = mask; |
paul@173 | 83 | } |
paul@173 | 84 | |
paul@173 | 85 | uint32_t get_field(Cpm_regs ®s); |
paul@173 | 86 | void set_field(Cpm_regs ®s, uint32_t value); |
paul@187 | 87 | |
paul@201 | 88 | uint32_t get_asserted() { return _asserted; } |
paul@201 | 89 | uint32_t get_deasserted() { return _deasserted; } |
paul@201 | 90 | |
paul@173 | 91 | bool is_defined() { return defined; } |
paul@187 | 92 | uint32_t get_limit() { return mask; } |
paul@173 | 93 | |
paul@173 | 94 | // Undefined field object. |
paul@173 | 95 | |
paul@173 | 96 | static Field undefined; |
paul@173 | 97 | }; |
paul@173 | 98 | |
paul@173 | 99 | |
paul@173 | 100 | |
paul@173 | 101 | // Clock sources. |
paul@173 | 102 | |
paul@173 | 103 | class Mux |
paul@173 | 104 | { |
paul@173 | 105 | int _num_inputs; |
paul@173 | 106 | enum Clock_identifiers *_inputs, _input; |
paul@173 | 107 | |
paul@173 | 108 | public: |
paul@173 | 109 | explicit Mux(int num_inputs, enum Clock_identifiers inputs[]) |
paul@173 | 110 | : _num_inputs(num_inputs), _inputs(inputs) |
paul@173 | 111 | { |
paul@173 | 112 | } |
paul@173 | 113 | |
paul@173 | 114 | explicit Mux(enum Clock_identifiers input) |
paul@173 | 115 | : _num_inputs(1), _inputs(&_input) |
paul@173 | 116 | { |
paul@173 | 117 | _input = input; |
paul@173 | 118 | } |
paul@173 | 119 | |
paul@173 | 120 | explicit Mux() |
paul@173 | 121 | : _num_inputs(0), _inputs(NULL) |
paul@173 | 122 | { |
paul@173 | 123 | } |
paul@173 | 124 | |
paul@173 | 125 | int get_number() { return _num_inputs; } |
paul@173 | 126 | enum Clock_identifiers get_input(int num); |
paul@173 | 127 | }; |
paul@173 | 128 | |
paul@174 | 129 | |
paul@174 | 130 | |
paul@175 | 131 | // Controllable clock source. |
paul@175 | 132 | |
paul@173 | 133 | class Source |
paul@173 | 134 | { |
paul@173 | 135 | Mux _inputs; |
paul@173 | 136 | Field _source; |
paul@173 | 137 | |
paul@173 | 138 | public: |
paul@173 | 139 | explicit Source(Mux inputs, Field source) |
paul@173 | 140 | : _inputs(inputs), _source(source) |
paul@173 | 141 | { |
paul@173 | 142 | } |
paul@173 | 143 | |
paul@173 | 144 | explicit Source(Mux inputs) |
paul@173 | 145 | : _inputs(inputs) |
paul@173 | 146 | { |
paul@173 | 147 | } |
paul@173 | 148 | |
paul@173 | 149 | explicit Source() |
paul@173 | 150 | { |
paul@173 | 151 | } |
paul@173 | 152 | |
paul@173 | 153 | int get_number() { return _inputs.get_number(); } |
paul@173 | 154 | enum Clock_identifiers get_input(int num) { return _inputs.get_input(num); } |
paul@173 | 155 | |
paul@173 | 156 | // Clock source. |
paul@173 | 157 | |
paul@173 | 158 | uint8_t get_source(Cpm_regs ®s); |
paul@173 | 159 | void set_source(Cpm_regs ®s, uint8_t source); |
paul@185 | 160 | enum Clock_identifiers get_source_clock(Cpm_regs ®s); |
paul@185 | 161 | void set_source_clock(Cpm_regs ®s, enum Clock_identifiers clock); |
paul@173 | 162 | |
paul@173 | 163 | // Clock source frequency. |
paul@173 | 164 | |
paul@213 | 165 | uint64_t get_frequency(Cpm_regs ®s); |
paul@173 | 166 | }; |
paul@173 | 167 | |
paul@173 | 168 | |
paul@173 | 169 | |
paul@175 | 170 | // Common clock control. |
paul@175 | 171 | |
paul@175 | 172 | class Control_base |
paul@175 | 173 | { |
paul@175 | 174 | public: |
paul@175 | 175 | virtual ~Control_base(); |
paul@175 | 176 | |
paul@175 | 177 | virtual void change_disable(Cpm_regs ®s); |
paul@175 | 178 | virtual void change_enable(Cpm_regs ®s); |
paul@175 | 179 | |
paul@175 | 180 | virtual void wait_busy(Cpm_regs ®s) = 0; |
paul@175 | 181 | virtual int have_clock(Cpm_regs ®s) = 0; |
paul@175 | 182 | virtual void start_clock(Cpm_regs ®s) = 0; |
paul@175 | 183 | virtual void stop_clock(Cpm_regs ®s) = 0; |
paul@175 | 184 | }; |
paul@175 | 185 | |
paul@175 | 186 | |
paul@175 | 187 | |
paul@175 | 188 | // Clock control. |
paul@175 | 189 | |
paul@175 | 190 | class Control : public Control_base |
paul@175 | 191 | { |
paul@175 | 192 | Field _gate, _change_enable, _busy; |
paul@175 | 193 | |
paul@175 | 194 | public: |
paul@175 | 195 | explicit Control(Field gate, |
paul@175 | 196 | Field change_enable = Field::undefined, |
paul@175 | 197 | Field busy = Field::undefined) |
paul@175 | 198 | : _gate(gate), _change_enable(change_enable), _busy(busy) |
paul@175 | 199 | { |
paul@175 | 200 | } |
paul@175 | 201 | |
paul@175 | 202 | explicit Control() |
paul@175 | 203 | : _gate(Field::undefined), _change_enable(Field::undefined), |
paul@175 | 204 | _busy(Field::undefined) |
paul@175 | 205 | { |
paul@175 | 206 | } |
paul@175 | 207 | |
paul@175 | 208 | // Clock control. |
paul@175 | 209 | |
paul@175 | 210 | void change_disable(Cpm_regs ®s); |
paul@175 | 211 | void change_enable(Cpm_regs ®s); |
paul@175 | 212 | |
paul@175 | 213 | void wait_busy(Cpm_regs ®s); |
paul@175 | 214 | int have_clock(Cpm_regs ®s); |
paul@175 | 215 | void start_clock(Cpm_regs ®s); |
paul@175 | 216 | void stop_clock(Cpm_regs ®s); |
paul@211 | 217 | |
paul@211 | 218 | // Undefined control object. |
paul@211 | 219 | |
paul@211 | 220 | static Control undefined; |
paul@175 | 221 | }; |
paul@175 | 222 | |
paul@175 | 223 | |
paul@175 | 224 | |
paul@175 | 225 | // PLL control. |
paul@175 | 226 | |
paul@175 | 227 | class Control_pll : public Control_base |
paul@175 | 228 | { |
paul@175 | 229 | Field _enable, _stable, _bypass; |
paul@175 | 230 | |
paul@213 | 231 | // Frequency change sequence state. |
paul@213 | 232 | |
paul@213 | 233 | bool _enabled = false; |
paul@213 | 234 | |
paul@175 | 235 | // PLL_specific control. |
paul@175 | 236 | |
paul@175 | 237 | int have_pll(Cpm_regs ®s); |
paul@175 | 238 | int pll_enabled(Cpm_regs ®s); |
paul@175 | 239 | |
paul@175 | 240 | public: |
paul@175 | 241 | explicit Control_pll(Field enable, Field stable, Field bypass) |
paul@175 | 242 | : _enable(enable), _stable(stable), _bypass(bypass) |
paul@175 | 243 | { |
paul@175 | 244 | } |
paul@175 | 245 | |
paul@175 | 246 | // Clock control. |
paul@175 | 247 | |
paul@175 | 248 | int pll_bypassed(Cpm_regs ®s); |
paul@175 | 249 | |
paul@187 | 250 | void pll_bypass(Cpm_regs ®s); |
paul@187 | 251 | void pll_engage(Cpm_regs ®s); |
paul@187 | 252 | |
paul@213 | 253 | void change_disable(Cpm_regs ®s); |
paul@213 | 254 | void change_enable(Cpm_regs ®s); |
paul@213 | 255 | |
paul@175 | 256 | void wait_busy(Cpm_regs ®s); |
paul@175 | 257 | int have_clock(Cpm_regs ®s); |
paul@175 | 258 | void start_clock(Cpm_regs ®s); |
paul@175 | 259 | void stop_clock(Cpm_regs ®s); |
paul@175 | 260 | }; |
paul@175 | 261 | |
paul@175 | 262 | |
paul@175 | 263 | |
paul@174 | 264 | // Frequency transformation. |
paul@174 | 265 | |
paul@175 | 266 | class Divider_base |
paul@174 | 267 | { |
paul@174 | 268 | public: |
paul@175 | 269 | virtual ~Divider_base(); |
paul@174 | 270 | |
paul@174 | 271 | // Output frequency. |
paul@174 | 272 | |
paul@213 | 273 | virtual uint64_t get_frequency(Cpm_regs ®s, uint64_t source_frequency) = 0; |
paul@213 | 274 | virtual int set_frequency(Cpm_regs ®s, uint64_t source_frequency, uint64_t frequency) = 0; |
paul@178 | 275 | |
paul@178 | 276 | // Other operations. |
paul@178 | 277 | |
paul@178 | 278 | virtual int get_parameters(Cpm_regs ®s, uint32_t parameters[]) = 0; |
paul@239 | 279 | virtual int set_parameters(Cpm_regs ®s, int num_parameters, uint32_t parameters[]) = 0; |
paul@239 | 280 | }; |
paul@178 | 281 | |
paul@239 | 282 | |
paul@239 | 283 | |
paul@239 | 284 | // Fixed divider. |
paul@239 | 285 | |
paul@239 | 286 | class Divider_fixed : public Divider_base |
paul@239 | 287 | { |
paul@239 | 288 | uint32_t _value; |
paul@239 | 289 | |
paul@239 | 290 | public: |
paul@239 | 291 | explicit Divider_fixed(uint32_t value) |
paul@239 | 292 | : _value(value) |
paul@239 | 293 | { |
paul@239 | 294 | } |
paul@239 | 295 | |
paul@239 | 296 | // Output frequency. |
paul@239 | 297 | |
paul@239 | 298 | uint64_t get_frequency(Cpm_regs ®s, uint64_t source_frequency); |
paul@239 | 299 | int set_frequency(Cpm_regs ®s, uint64_t source_frequency, uint64_t frequency); |
paul@239 | 300 | |
paul@239 | 301 | // Other operations. |
paul@239 | 302 | |
paul@239 | 303 | int get_parameters(Cpm_regs ®s, uint32_t parameters[]); |
paul@239 | 304 | int set_parameters(Cpm_regs ®s, int num_parameters, uint32_t parameters[]); |
paul@174 | 305 | }; |
paul@174 | 306 | |
paul@174 | 307 | |
paul@174 | 308 | |
paul@175 | 309 | // Simple divider for regular clocks. |
paul@175 | 310 | |
paul@175 | 311 | class Divider : public Divider_base |
paul@174 | 312 | { |
paul@174 | 313 | Field _divider; |
paul@244 | 314 | int _scale; |
paul@174 | 315 | |
paul@174 | 316 | public: |
paul@244 | 317 | explicit Divider(Field divider, int scale = 1) |
paul@244 | 318 | : _divider(divider), _scale(scale) |
paul@174 | 319 | { |
paul@174 | 320 | } |
paul@174 | 321 | |
paul@174 | 322 | explicit Divider() |
paul@244 | 323 | : _divider(Field::undefined), _scale(1) |
paul@174 | 324 | { |
paul@174 | 325 | } |
paul@174 | 326 | |
paul@174 | 327 | // Clock divider. |
paul@174 | 328 | |
paul@174 | 329 | uint32_t get_divider(Cpm_regs ®s); |
paul@175 | 330 | void set_divider(Cpm_regs ®s, uint32_t divider); |
paul@174 | 331 | |
paul@174 | 332 | // Output frequency. |
paul@174 | 333 | |
paul@213 | 334 | uint64_t get_frequency(Cpm_regs ®s, uint64_t source_frequency); |
paul@213 | 335 | int set_frequency(Cpm_regs ®s, uint64_t source_frequency, uint64_t frequency); |
paul@174 | 336 | |
paul@178 | 337 | // Other operations. |
paul@178 | 338 | |
paul@178 | 339 | int get_parameters(Cpm_regs ®s, uint32_t parameters[]); |
paul@185 | 340 | int set_parameters(Cpm_regs ®s, int num_parameters, uint32_t parameters[]); |
paul@174 | 341 | }; |
paul@174 | 342 | |
paul@174 | 343 | |
paul@174 | 344 | |
paul@175 | 345 | // Divider for PLLs. |
paul@175 | 346 | |
paul@175 | 347 | class Divider_pll : public Divider_base |
paul@174 | 348 | { |
paul@175 | 349 | Field _multiplier, _input_divider, _output_divider0, _output_divider1; |
paul@211 | 350 | double _intermediate_min, _intermediate_max; |
paul@174 | 351 | |
paul@174 | 352 | // General frequency modifiers. |
paul@174 | 353 | |
paul@175 | 354 | uint32_t get_multiplier(Cpm_regs ®s); |
paul@175 | 355 | void set_multiplier(Cpm_regs ®s, uint32_t multiplier); |
paul@175 | 356 | uint32_t get_input_divider(Cpm_regs ®s); |
paul@175 | 357 | void set_input_divider(Cpm_regs ®s, uint32_t divider); |
paul@175 | 358 | uint32_t get_output_divider(Cpm_regs ®s); |
paul@175 | 359 | void set_output_divider(Cpm_regs ®s, uint32_t divider); |
paul@174 | 360 | |
paul@182 | 361 | public: |
paul@211 | 362 | |
paul@211 | 363 | // Double output divider constructor. |
paul@211 | 364 | |
paul@182 | 365 | explicit Divider_pll(Field multiplier, Field input_divider, |
paul@211 | 366 | Field output_divider0, Field output_divider1, |
paul@247 | 367 | double intermediate_min, double intermediate_max) |
paul@182 | 368 | : _multiplier(multiplier), _input_divider(input_divider), |
paul@211 | 369 | _output_divider0(output_divider0), _output_divider1(output_divider1), |
paul@247 | 370 | _intermediate_min(intermediate_min), _intermediate_max(intermediate_max) |
paul@211 | 371 | { |
paul@211 | 372 | } |
paul@211 | 373 | |
paul@211 | 374 | // Single output divider constructor. |
paul@211 | 375 | |
paul@211 | 376 | explicit Divider_pll(Field multiplier, Field input_divider, |
paul@211 | 377 | Field output_divider, |
paul@247 | 378 | double intermediate_min, double intermediate_max) |
paul@211 | 379 | : _multiplier(multiplier), _input_divider(input_divider), |
paul@211 | 380 | _output_divider0(output_divider), _output_divider1(Field::undefined), |
paul@247 | 381 | _intermediate_min(intermediate_min), _intermediate_max(intermediate_max) |
paul@182 | 382 | { |
paul@182 | 383 | } |
paul@182 | 384 | |
paul@174 | 385 | // Output frequency. |
paul@174 | 386 | |
paul@213 | 387 | uint64_t get_frequency(Cpm_regs ®s, uint64_t source_frequency); |
paul@213 | 388 | int set_frequency(Cpm_regs ®s, uint64_t source_frequency, uint64_t frequency); |
paul@174 | 389 | |
paul@174 | 390 | // Other operations. |
paul@174 | 391 | |
paul@178 | 392 | int get_parameters(Cpm_regs ®s, uint32_t parameters[]); |
paul@185 | 393 | int set_parameters(Cpm_regs ®s, int num_parameters, uint32_t parameters[]); |
paul@175 | 394 | }; |
paul@175 | 395 | |
paul@175 | 396 | |
paul@175 | 397 | |
paul@175 | 398 | // Divider for I2S clocks. |
paul@175 | 399 | |
paul@175 | 400 | class Divider_i2s : public Divider_base |
paul@175 | 401 | { |
paul@185 | 402 | Field _multiplier, _divider_N, _divider_D, _auto_N, _auto_D; |
paul@175 | 403 | |
paul@182 | 404 | // General frequency modifiers. |
paul@182 | 405 | |
paul@182 | 406 | uint32_t get_multiplier(Cpm_regs ®s); |
paul@182 | 407 | uint32_t get_divider_N(Cpm_regs ®s); |
paul@182 | 408 | uint32_t get_divider_D(Cpm_regs ®s); |
paul@182 | 409 | |
paul@175 | 410 | public: |
paul@185 | 411 | explicit Divider_i2s(Field multiplier, Field divider_N, Field divider_D, |
paul@185 | 412 | Field auto_N, Field auto_D) |
paul@185 | 413 | : _multiplier(multiplier), _divider_N(divider_N), _divider_D(divider_D), |
paul@185 | 414 | _auto_N(auto_N), _auto_D(auto_D) |
paul@175 | 415 | { |
paul@175 | 416 | } |
paul@175 | 417 | |
paul@175 | 418 | // Output frequency. |
paul@175 | 419 | |
paul@213 | 420 | uint64_t get_frequency(Cpm_regs ®s, uint64_t source_frequency); |
paul@213 | 421 | int set_frequency(Cpm_regs ®s, uint64_t source_frequency, uint64_t frequency); |
paul@175 | 422 | |
paul@175 | 423 | // Other operations. |
paul@175 | 424 | |
paul@178 | 425 | int get_parameters(Cpm_regs ®s, uint32_t parameters[]); |
paul@178 | 426 | |
paul@185 | 427 | int set_parameters(Cpm_regs ®s, int num_parameters, uint32_t parameters[]); |
paul@174 | 428 | }; |
paul@174 | 429 | |
paul@174 | 430 | |
paul@174 | 431 | |
paul@173 | 432 | // Common clock abstraction. |
paul@173 | 433 | |
paul@173 | 434 | class Clock_base |
paul@173 | 435 | { |
paul@173 | 436 | public: |
paul@175 | 437 | virtual ~Clock_base(); |
paul@175 | 438 | |
paul@176 | 439 | virtual const char *clock_type() { return "unset"; } |
paul@176 | 440 | |
paul@175 | 441 | // Clock control. |
paul@175 | 442 | |
paul@175 | 443 | virtual int have_clock(Cpm_regs ®s) = 0; |
paul@175 | 444 | virtual void start_clock(Cpm_regs ®s) = 0; |
paul@175 | 445 | virtual void stop_clock(Cpm_regs ®s) = 0; |
paul@175 | 446 | |
paul@175 | 447 | // Output frequency. |
paul@175 | 448 | |
paul@213 | 449 | virtual uint64_t get_frequency(Cpm_regs ®s) = 0; |
paul@175 | 450 | }; |
paul@175 | 451 | |
paul@175 | 452 | |
paul@175 | 453 | |
paul@175 | 454 | // Null (absent or undefined) clock abstraction. |
paul@175 | 455 | |
paul@175 | 456 | class Clock_null : public Clock_base |
paul@175 | 457 | { |
paul@175 | 458 | public: |
paul@176 | 459 | const char *clock_type() { return "null"; } |
paul@175 | 460 | |
paul@175 | 461 | // Clock control. |
paul@175 | 462 | |
paul@175 | 463 | int have_clock(Cpm_regs ®s); |
paul@175 | 464 | void start_clock(Cpm_regs ®s); |
paul@175 | 465 | void stop_clock(Cpm_regs ®s); |
paul@175 | 466 | |
paul@175 | 467 | // Output frequency. |
paul@175 | 468 | |
paul@213 | 469 | uint64_t get_frequency(Cpm_regs ®s); |
paul@175 | 470 | }; |
paul@175 | 471 | |
paul@175 | 472 | |
paul@175 | 473 | |
paul@175 | 474 | // Passive (root or input) clock without any source of its own. |
paul@175 | 475 | |
paul@175 | 476 | class Clock_passive : public Clock_base |
paul@175 | 477 | { |
paul@211 | 478 | protected: |
paul@213 | 479 | uint64_t _frequency; |
paul@211 | 480 | |
paul@175 | 481 | public: |
paul@213 | 482 | explicit Clock_passive(uint64_t frequency) |
paul@211 | 483 | : _frequency(frequency) |
paul@211 | 484 | { |
paul@211 | 485 | } |
paul@211 | 486 | |
paul@176 | 487 | const char *clock_type() { return "passive"; } |
paul@173 | 488 | |
paul@173 | 489 | // Clock control. |
paul@173 | 490 | |
paul@173 | 491 | virtual int have_clock(Cpm_regs ®s); |
paul@173 | 492 | virtual void start_clock(Cpm_regs ®s); |
paul@173 | 493 | virtual void stop_clock(Cpm_regs ®s); |
paul@173 | 494 | |
paul@175 | 495 | // Output frequency. |
paul@175 | 496 | |
paul@213 | 497 | uint64_t get_frequency(Cpm_regs ®s); |
paul@175 | 498 | }; |
paul@175 | 499 | |
paul@175 | 500 | |
paul@175 | 501 | |
paul@179 | 502 | class Clock_controlled : public Clock_base |
paul@179 | 503 | { |
paul@179 | 504 | protected: |
paul@179 | 505 | virtual Control_base &_get_control() = 0; |
paul@179 | 506 | |
paul@179 | 507 | public: |
paul@179 | 508 | |
paul@179 | 509 | // Clock control. |
paul@179 | 510 | |
paul@179 | 511 | virtual int have_clock(Cpm_regs ®s); |
paul@179 | 512 | virtual void start_clock(Cpm_regs ®s); |
paul@179 | 513 | virtual void stop_clock(Cpm_regs ®s); |
paul@179 | 514 | }; |
paul@179 | 515 | |
paul@179 | 516 | |
paul@179 | 517 | |
paul@175 | 518 | // An actively managed clock with source. |
paul@175 | 519 | |
paul@179 | 520 | class Clock_active : public Clock_controlled |
paul@175 | 521 | { |
paul@175 | 522 | protected: |
paul@175 | 523 | Source _source; |
paul@175 | 524 | |
paul@175 | 525 | public: |
paul@175 | 526 | explicit Clock_active(Source source) |
paul@175 | 527 | : _source(source) |
paul@175 | 528 | { |
paul@175 | 529 | } |
paul@175 | 530 | |
paul@175 | 531 | virtual ~Clock_active(); |
paul@175 | 532 | |
paul@173 | 533 | // Clock source. |
paul@173 | 534 | |
paul@173 | 535 | virtual uint8_t get_source(Cpm_regs ®s); |
paul@173 | 536 | virtual void set_source(Cpm_regs ®s, uint8_t source); |
paul@185 | 537 | enum Clock_identifiers get_source_clock(Cpm_regs ®s); |
paul@185 | 538 | void set_source_clock(Cpm_regs ®s, enum Clock_identifiers clock); |
paul@173 | 539 | |
paul@173 | 540 | // Clock source frequency. |
paul@173 | 541 | |
paul@213 | 542 | virtual uint64_t get_source_frequency(Cpm_regs ®s); |
paul@173 | 543 | |
paul@173 | 544 | // Output frequency. |
paul@173 | 545 | |
paul@213 | 546 | virtual uint64_t get_frequency(Cpm_regs ®s); |
paul@173 | 547 | }; |
paul@173 | 548 | |
paul@173 | 549 | |
paul@173 | 550 | |
paul@175 | 551 | // Divided clock interface. |
paul@173 | 552 | |
paul@183 | 553 | class Clock_divided_base : public Clock_active |
paul@173 | 554 | { |
paul@175 | 555 | protected: |
paul@175 | 556 | virtual Divider_base &_get_divider() = 0; |
paul@173 | 557 | |
paul@173 | 558 | public: |
paul@183 | 559 | explicit Clock_divided_base(Source source) |
paul@175 | 560 | : Clock_active(source) |
paul@173 | 561 | { |
paul@173 | 562 | } |
paul@173 | 563 | |
paul@183 | 564 | virtual ~Clock_divided_base(); |
paul@174 | 565 | |
paul@178 | 566 | virtual int get_parameters(Cpm_regs ®s, uint32_t parameters[]); |
paul@185 | 567 | virtual int set_parameters(Cpm_regs ®s, int num_parameters, uint32_t parameters[]); |
paul@178 | 568 | |
paul@174 | 569 | // Output frequency. |
paul@174 | 570 | |
paul@213 | 571 | virtual uint64_t get_frequency(Cpm_regs ®s); |
paul@213 | 572 | virtual int set_frequency(Cpm_regs ®s, uint64_t frequency); |
paul@173 | 573 | }; |
paul@173 | 574 | |
paul@175 | 575 | |
paul@175 | 576 | |
paul@175 | 577 | // PLL description. |
paul@175 | 578 | |
paul@183 | 579 | class Pll : public Clock_divided_base |
paul@175 | 580 | { |
paul@175 | 581 | Control_pll _control; |
paul@175 | 582 | Divider_pll _divider; |
paul@175 | 583 | |
paul@175 | 584 | virtual Control_base &_get_control() { return _control; } |
paul@175 | 585 | virtual Divider_base &_get_divider() { return _divider; } |
paul@175 | 586 | |
paul@175 | 587 | public: |
paul@175 | 588 | explicit Pll(Source source, Control_pll control, Divider_pll divider) |
paul@183 | 589 | : Clock_divided_base(source), _control(control), _divider(divider) |
paul@175 | 590 | { |
paul@175 | 591 | } |
paul@175 | 592 | |
paul@175 | 593 | virtual ~Pll(); |
paul@175 | 594 | |
paul@176 | 595 | const char *clock_type() { return "pll"; } |
paul@176 | 596 | |
paul@175 | 597 | // Output frequency. |
paul@175 | 598 | |
paul@213 | 599 | uint64_t get_frequency(Cpm_regs ®s); |
paul@213 | 600 | int set_frequency(Cpm_regs ®s, uint64_t frequency); |
paul@175 | 601 | }; |
paul@175 | 602 | |
paul@175 | 603 | |
paul@175 | 604 | |
paul@183 | 605 | // Plain clock description. |
paul@183 | 606 | |
paul@183 | 607 | class Clock : public Clock_active |
paul@183 | 608 | { |
paul@183 | 609 | Control _control; |
paul@183 | 610 | |
paul@183 | 611 | virtual Control_base &_get_control() { return _control; } |
paul@183 | 612 | |
paul@183 | 613 | public: |
paul@183 | 614 | explicit Clock(Source source, Control control) |
paul@183 | 615 | : Clock_active(source), _control(control) |
paul@183 | 616 | { |
paul@183 | 617 | } |
paul@175 | 618 | |
paul@183 | 619 | explicit Clock(Source source) |
paul@183 | 620 | : Clock_active(source) |
paul@183 | 621 | { |
paul@183 | 622 | } |
paul@183 | 623 | |
paul@183 | 624 | const char *clock_type() { return "clock"; } |
paul@183 | 625 | }; |
paul@183 | 626 | |
paul@183 | 627 | |
paul@183 | 628 | |
paul@183 | 629 | // Divided clock description. |
paul@183 | 630 | |
paul@183 | 631 | class Clock_divided : public Clock_divided_base |
paul@175 | 632 | { |
paul@175 | 633 | Control _control; |
paul@175 | 634 | Divider _divider; |
paul@175 | 635 | |
paul@175 | 636 | virtual Control_base &_get_control() { return _control; } |
paul@175 | 637 | virtual Divider_base &_get_divider() { return _divider; } |
paul@175 | 638 | |
paul@175 | 639 | public: |
paul@183 | 640 | explicit Clock_divided(Source source, Control control, Divider divider) |
paul@183 | 641 | : Clock_divided_base(source), _control(control), _divider(divider) |
paul@175 | 642 | { |
paul@175 | 643 | } |
paul@175 | 644 | |
paul@211 | 645 | explicit Clock_divided(Source source, Divider divider) |
paul@211 | 646 | : Clock_divided_base(source), _control(Control::undefined), _divider(divider) |
paul@211 | 647 | { |
paul@211 | 648 | } |
paul@211 | 649 | |
paul@176 | 650 | const char *clock_type() { return "divided"; } |
paul@175 | 651 | }; |
paul@175 | 652 | |
paul@175 | 653 | |
paul@175 | 654 | |
paul@239 | 655 | // Fixed divider clock description. |
paul@239 | 656 | |
paul@239 | 657 | class Clock_divided_fixed : public Clock_divided_base |
paul@239 | 658 | { |
paul@239 | 659 | Control _control; |
paul@239 | 660 | Divider_fixed _divider; |
paul@239 | 661 | |
paul@239 | 662 | virtual Control_base &_get_control() { return _control; } |
paul@239 | 663 | virtual Divider_base &_get_divider() { return _divider; } |
paul@239 | 664 | |
paul@239 | 665 | public: |
paul@239 | 666 | explicit Clock_divided_fixed(Source source, Divider_fixed divider) |
paul@239 | 667 | : Clock_divided_base(source), _control(Control::undefined), _divider(divider) |
paul@239 | 668 | { |
paul@239 | 669 | } |
paul@239 | 670 | |
paul@239 | 671 | const char *clock_type() { return "fix_div"; } |
paul@239 | 672 | }; |
paul@239 | 673 | |
paul@239 | 674 | |
paul@239 | 675 | |
paul@175 | 676 | // I2S clock description. |
paul@175 | 677 | |
paul@183 | 678 | class Clock_divided_i2s : public Clock_divided_base |
paul@175 | 679 | { |
paul@175 | 680 | Control _control; |
paul@175 | 681 | Divider_i2s _divider; |
paul@175 | 682 | |
paul@175 | 683 | virtual Control_base &_get_control() { return _control; } |
paul@175 | 684 | virtual Divider_base &_get_divider() { return _divider; } |
paul@175 | 685 | |
paul@175 | 686 | public: |
paul@175 | 687 | explicit Clock_divided_i2s(Source source, Control control, Divider_i2s divider) |
paul@183 | 688 | : Clock_divided_base(source), _control(control), _divider(divider) |
paul@175 | 689 | { |
paul@175 | 690 | } |
paul@176 | 691 | |
paul@176 | 692 | const char *clock_type() { return "i2s"; } |
paul@175 | 693 | }; |
paul@175 | 694 | |
paul@173 | 695 | #endif /* __cplusplus */ |