paul@0 | 1 | /* |
paul@128 | 2 | * CPM (clock and power management) support for the JZ4740. |
paul@128 | 3 | * |
paul@128 | 4 | * Copyright (C) 2017, 2018, 2020, 2021 Paul Boddie <paul@boddie.org.uk> |
paul@0 | 5 | * |
paul@0 | 6 | * This program is free software; you can redistribute it and/or |
paul@0 | 7 | * modify it under the terms of the GNU General Public License as |
paul@0 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@0 | 9 | * the License, or (at your option) any later version. |
paul@0 | 10 | * |
paul@0 | 11 | * This program is distributed in the hope that it will be useful, |
paul@0 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@0 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@0 | 14 | * GNU General Public License for more details. |
paul@0 | 15 | * |
paul@0 | 16 | * You should have received a copy of the GNU General Public License |
paul@0 | 17 | * along with this program; if not, write to the Free Software |
paul@0 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@0 | 19 | * Boston, MA 02110-1301, USA |
paul@0 | 20 | */ |
paul@0 | 21 | |
paul@0 | 22 | #pragma once |
paul@0 | 23 | |
paul@133 | 24 | #include <l4/devices/cpm.h> |
paul@0 | 25 | |
paul@0 | 26 | #include <l4/sys/types.h> |
paul@0 | 27 | #include <stdint.h> |
paul@0 | 28 | |
paul@0 | 29 | |
paul@0 | 30 | |
paul@0 | 31 | #ifdef __cplusplus |
paul@0 | 32 | |
paul@0 | 33 | #include <l4/devices/hw_register_block.h> |
paul@0 | 34 | |
paul@0 | 35 | /* A simple abstraction for accessing the CPM registers. |
paul@0 | 36 | * A proper device could inherit from Hw::Device and use an |
paul@0 | 37 | * Int_property for _exclk_freq. */ |
paul@0 | 38 | |
paul@0 | 39 | class Cpm_jz4740_chip : public Cpm_chip |
paul@0 | 40 | { |
paul@0 | 41 | private: |
paul@0 | 42 | Hw::Register_block<32> _regs; |
paul@0 | 43 | uint32_t _exclk_freq; |
paul@0 | 44 | |
paul@0 | 45 | int pll_enabled(); |
paul@0 | 46 | int pll_bypassed(); |
paul@0 | 47 | |
paul@128 | 48 | // Clock control. |
paul@128 | 49 | |
paul@128 | 50 | uint32_t get_clock_gate_value(enum Clock_identifiers clock); |
paul@128 | 51 | |
paul@0 | 52 | public: |
paul@0 | 53 | Cpm_jz4740_chip(l4_addr_t addr, uint32_t exclk_freq); |
paul@0 | 54 | |
paul@128 | 55 | int have_clock(enum Clock_identifiers clock); |
paul@128 | 56 | void start_clock(enum Clock_identifiers clock); |
paul@128 | 57 | void stop_clock(enum Clock_identifiers clock); |
paul@0 | 58 | |
paul@0 | 59 | int have_pll(); |
paul@0 | 60 | |
paul@0 | 61 | uint16_t get_multiplier(); |
paul@0 | 62 | uint8_t get_input_division(); |
paul@0 | 63 | uint8_t get_output_division(); |
paul@0 | 64 | |
paul@0 | 65 | uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift); |
paul@0 | 66 | uint8_t get_cpu_divider(); |
paul@0 | 67 | uint8_t get_hclock_divider(); |
paul@0 | 68 | uint8_t get_pclock_divider(); |
paul@0 | 69 | uint8_t get_memory_divider(); |
paul@0 | 70 | uint8_t get_source_divider(); |
paul@0 | 71 | |
paul@0 | 72 | uint16_t get_lcd_pixel_divider(); |
paul@0 | 73 | |
paul@0 | 74 | void set_lcd_device_divider(uint8_t division); |
paul@0 | 75 | void set_lcd_pixel_divider(uint16_t division); |
paul@133 | 76 | |
paul@133 | 77 | uint32_t get_frequency(enum Clock_frequency_identifiers clock); |
paul@133 | 78 | void set_frequency(enum Clock_frequency_identifiers clock, uint32_t frequency); |
paul@0 | 79 | |
paul@0 | 80 | uint32_t get_pll_frequency(); |
paul@0 | 81 | uint32_t get_output_frequency(); |
paul@0 | 82 | void update_output_frequency(); |
paul@0 | 83 | |
paul@0 | 84 | uint32_t get_cpu_frequency(); |
paul@0 | 85 | uint32_t get_hclock_frequency(); |
paul@0 | 86 | uint32_t get_pclock_frequency(); |
paul@0 | 87 | uint32_t get_memory_frequency(); |
paul@0 | 88 | }; |
paul@0 | 89 | |
paul@0 | 90 | #endif /* __cplusplus */ |
paul@0 | 91 | |
paul@0 | 92 | |
paul@0 | 93 | |
paul@0 | 94 | /* C language interface. */ |
paul@0 | 95 | |
paul@0 | 96 | EXTERN_C_BEGIN |
paul@0 | 97 | |
paul@0 | 98 | void *jz4740_cpm_init(l4_addr_t cpm_base); |
paul@0 | 99 | |
paul@0 | 100 | int jz4740_cpm_have_pll(void *cpm); |
paul@0 | 101 | |
paul@128 | 102 | int jz4740_cpm_have_clock(void *cpm, enum Clock_identifiers clock); |
paul@128 | 103 | void jz4740_cpm_start_clock(void *cpm, enum Clock_identifiers clock); |
paul@128 | 104 | void jz4740_cpm_stop_clock(void *cpm, enum Clock_identifiers clock); |
paul@0 | 105 | |
paul@0 | 106 | uint16_t jz4740_cpm_get_lcd_pixel_divider(void *cpm); |
paul@0 | 107 | |
paul@133 | 108 | uint32_t jz4740_cpm_get_frequency(void *cpm, enum Clock_frequency_identifiers clock); |
paul@133 | 109 | void jz4740_cpm_set_frequency(void *cpm, enum Clock_frequency_identifiers clock, uint32_t frequency); |
paul@133 | 110 | |
paul@0 | 111 | void jz4740_cpm_update_output_frequency(void *cpm); |
paul@0 | 112 | |
paul@0 | 113 | uint32_t jz4740_cpm_get_cpu_frequency(void *cpm); |
paul@0 | 114 | uint32_t jz4740_cpm_get_hclock_frequency(void *cpm); |
paul@0 | 115 | uint32_t jz4740_cpm_get_output_frequency(void *cpm); |
paul@0 | 116 | uint32_t jz4740_cpm_get_pclock_frequency(void *cpm); |
paul@0 | 117 | uint32_t jz4740_cpm_get_memory_frequency(void *cpm); |
paul@0 | 118 | |
paul@0 | 119 | EXTERN_C_END |