paul@123 | 1 | /* |
paul@123 | 2 | * Test DMA transfers. |
paul@123 | 3 | * |
paul@143 | 4 | * Copyright (C) 2018, 2020, 2021, 2023 Paul Boddie <paul@boddie.org.uk> |
paul@123 | 5 | * |
paul@123 | 6 | * This program is free software; you can redistribute it and/or |
paul@123 | 7 | * modify it under the terms of the GNU General Public License as |
paul@123 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@123 | 9 | * the License, or (at your option) any later version. |
paul@123 | 10 | * |
paul@123 | 11 | * This program is distributed in the hope that it will be useful, |
paul@123 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@123 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@123 | 14 | * GNU General Public License for more details. |
paul@123 | 15 | * |
paul@123 | 16 | * You should have received a copy of the GNU General Public License |
paul@123 | 17 | * along with this program; if not, write to the Free Software |
paul@123 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@123 | 19 | * Boston, MA 02110-1301, USA |
paul@123 | 20 | */ |
paul@123 | 21 | |
paul@123 | 22 | #include <l4/devices/cpm-jz4730.h> |
paul@123 | 23 | #include <l4/devices/dma-jz4730.h> |
paul@123 | 24 | #include <l4/devices/memory.h> |
paul@123 | 25 | |
paul@123 | 26 | #include <l4/re/c/util/cap_alloc.h> |
paul@123 | 27 | #include <l4/re/c/dataspace.h> |
paul@143 | 28 | #include <l4/re/c/dma_space.h> |
paul@123 | 29 | #include <l4/re/c/mem_alloc.h> |
paul@123 | 30 | #include <l4/re/c/rm.h> |
paul@143 | 31 | #include <l4/re/protocols.h> |
paul@123 | 32 | |
paul@143 | 33 | #include <l4/sys/err.h> |
paul@123 | 34 | #include <l4/sys/factory.h> |
paul@123 | 35 | #include <l4/sys/icu.h> |
paul@123 | 36 | #include <l4/sys/irq.h> |
paul@123 | 37 | #include <l4/sys/rcv_endpoint.h> |
paul@123 | 38 | |
paul@143 | 39 | #include <l4/vbus/vbus.h> |
paul@143 | 40 | |
paul@123 | 41 | #include <stdio.h> |
paul@123 | 42 | #include <string.h> |
paul@123 | 43 | #include <unistd.h> |
paul@123 | 44 | |
paul@123 | 45 | |
paul@123 | 46 | |
paul@123 | 47 | /* Device and resource discovery. */ |
paul@123 | 48 | |
paul@123 | 49 | static long item_in_range(long start, long end, long index) |
paul@123 | 50 | { |
paul@123 | 51 | if (start < end) |
paul@123 | 52 | return start + index; |
paul@123 | 53 | else |
paul@123 | 54 | return start - index; |
paul@123 | 55 | } |
paul@123 | 56 | |
paul@123 | 57 | |
paul@123 | 58 | |
paul@123 | 59 | int main(void) |
paul@123 | 60 | { |
paul@143 | 61 | long err; |
paul@123 | 62 | void *cpm; |
paul@143 | 63 | void *dmac, *dma0; |
paul@143 | 64 | l4_cap_idx_t dma, vbus; |
paul@143 | 65 | |
paul@143 | 66 | dma = l4re_util_cap_alloc(); |
paul@143 | 67 | vbus = l4re_env_get_cap("vbus"); |
paul@143 | 68 | |
paul@143 | 69 | if (l4_is_invalid_cap(dma)) |
paul@143 | 70 | { |
paul@143 | 71 | printf("Could not allocate DMA capability.\n"); |
paul@143 | 72 | return 1; |
paul@143 | 73 | } |
paul@143 | 74 | |
paul@143 | 75 | /* Create the DMA space. */ |
paul@143 | 76 | |
paul@143 | 77 | err = l4_error(l4_factory_create(l4re_env()->mem_alloc, L4RE_PROTO_DMA_SPACE, dma)); |
paul@143 | 78 | |
paul@143 | 79 | if (err) |
paul@143 | 80 | { |
paul@143 | 81 | printf("Could not create DMA space: %s\n", l4sys_errtostr(err)); |
paul@143 | 82 | return 1; |
paul@143 | 83 | } |
paul@143 | 84 | |
paul@143 | 85 | l4vbus_device_handle_t device = L4VBUS_NULL; |
paul@143 | 86 | l4vbus_resource_t dma_resource; |
paul@143 | 87 | |
paul@143 | 88 | if (!find_resource(&device, &dma_resource, L4VBUS_RESOURCE_DMA_DOMAIN)) |
paul@143 | 89 | { |
paul@143 | 90 | printf("Could not find DMA domain.\n"); |
paul@143 | 91 | return 1; |
paul@143 | 92 | } |
paul@143 | 93 | |
paul@143 | 94 | err = l4vbus_assign_dma_domain(vbus, dma_resource.start, |
paul@143 | 95 | L4VBUS_DMAD_BIND | L4VBUS_DMAD_L4RE_DMA_SPACE, |
paul@143 | 96 | dma); |
paul@143 | 97 | |
paul@143 | 98 | if (err) |
paul@143 | 99 | { |
paul@143 | 100 | printf("Could not assign DMA space: %s\n", l4sys_errtostr(err)); |
paul@143 | 101 | return 1; |
paul@143 | 102 | } |
paul@123 | 103 | |
paul@123 | 104 | /* Allocate memory to test transfers. */ |
paul@123 | 105 | |
paul@123 | 106 | l4_cap_idx_t ds0_mem, ds1_mem; |
paul@123 | 107 | l4_size_t ds0_size = L4_PAGESIZE, ds0_psize, ds1_size = L4_PAGESIZE, ds1_psize; |
paul@143 | 108 | l4_addr_t ds0_addr, ds1_addr; |
paul@143 | 109 | l4re_dma_space_dma_addr_t ds0_paddr, ds1_paddr; |
paul@123 | 110 | |
paul@123 | 111 | ds0_mem = l4re_util_cap_alloc(); |
paul@123 | 112 | ds1_mem = l4re_util_cap_alloc(); |
paul@123 | 113 | |
paul@123 | 114 | if (l4_is_invalid_cap(ds0_mem) || l4_is_invalid_cap(ds1_mem)) |
paul@123 | 115 | { |
paul@123 | 116 | printf("Could not allocate memory capabilities.\n"); |
paul@123 | 117 | return 1; |
paul@123 | 118 | } |
paul@123 | 119 | |
paul@123 | 120 | if (l4re_ma_alloc_align(ds0_size, ds0_mem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED, 8) || |
paul@123 | 121 | l4re_ma_alloc_align(ds1_size, ds1_mem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED, 8)) |
paul@123 | 122 | { |
paul@123 | 123 | printf("Could not allocate memory.\n"); |
paul@123 | 124 | return 1; |
paul@123 | 125 | } |
paul@123 | 126 | |
paul@123 | 127 | if (l4re_rm_attach((void **) &ds0_addr, ds0_size, |
paul@143 | 128 | L4RE_RM_F_SEARCH_ADDR | L4RE_RM_F_EAGER_MAP | L4RE_RM_F_RW, |
paul@123 | 129 | ds0_mem, 0, L4_PAGESHIFT) || |
paul@123 | 130 | l4re_rm_attach((void **) &ds1_addr, ds1_size, |
paul@143 | 131 | L4RE_RM_F_SEARCH_ADDR | L4RE_RM_F_EAGER_MAP | L4RE_RM_F_RW, |
paul@123 | 132 | ds1_mem, 0, L4_PAGESHIFT)) |
paul@123 | 133 | { |
paul@123 | 134 | printf("Could not map memory.\n"); |
paul@123 | 135 | return 1; |
paul@123 | 136 | } |
paul@123 | 137 | |
paul@143 | 138 | err = l4re_dma_space_map(dma, ds0_mem | L4_CAP_FPAGE_RW, 0, &ds0_psize, 0, |
paul@143 | 139 | L4RE_DMA_SPACE_BIDIRECTIONAL, &ds0_paddr) || |
paul@143 | 140 | l4re_dma_space_map(dma, ds1_mem | L4_CAP_FPAGE_RW, 0, &ds1_psize, 0, |
paul@143 | 141 | L4RE_DMA_SPACE_BIDIRECTIONAL, &ds1_paddr); |
paul@143 | 142 | |
paul@143 | 143 | if (err) |
paul@123 | 144 | { |
paul@143 | 145 | printf("Could not get physical addresses for memory: %s\n", l4sys_errtostr(err)); |
paul@123 | 146 | return 1; |
paul@123 | 147 | } |
paul@123 | 148 | |
paul@123 | 149 | /* Fill the allocated memory. */ |
paul@123 | 150 | |
paul@123 | 151 | memset((void *) ds0_addr, 0, ds0_size); |
paul@123 | 152 | memset((void *) ds1_addr, 0, ds1_size); |
paul@123 | 153 | |
paul@123 | 154 | sprintf((char *) ds0_addr, "The quick brown fox jumped over the lazy dog.\n"); |
paul@123 | 155 | |
paul@123 | 156 | /* Interrupts. */ |
paul@123 | 157 | |
paul@123 | 158 | l4_uint32_t dma_irq_start = 0, dma_irq_end = 0; |
paul@123 | 159 | l4_cap_idx_t icucap, irq0cap; |
paul@123 | 160 | |
paul@123 | 161 | /* Obtain resource details describing the interrupt for DMA channel 0. */ |
paul@123 | 162 | |
paul@123 | 163 | printf("Access IRQ...\n"); |
paul@123 | 164 | |
paul@123 | 165 | if (get_irq("jz4730-dma", &dma_irq_start, &dma_irq_end) < 0) |
paul@123 | 166 | return 1; |
paul@123 | 167 | |
paul@123 | 168 | printf("IRQ range at %d...%d.\n", dma_irq_start, dma_irq_end); |
paul@123 | 169 | |
paul@123 | 170 | /* Obtain capabilities for the interrupt controller and an interrupt. */ |
paul@123 | 171 | |
paul@123 | 172 | irq0cap = l4re_util_cap_alloc(); |
paul@123 | 173 | icucap = l4re_env_get_cap("icu"); |
paul@123 | 174 | |
paul@123 | 175 | if (l4_is_invalid_cap(icucap)) |
paul@123 | 176 | { |
paul@123 | 177 | printf("No 'icu' capability available in the virtual bus.\n"); |
paul@123 | 178 | return 1; |
paul@123 | 179 | } |
paul@123 | 180 | |
paul@123 | 181 | if (l4_is_invalid_cap(irq0cap)) |
paul@123 | 182 | { |
paul@123 | 183 | printf("Capabilities not available for interrupts.\n"); |
paul@123 | 184 | return 1; |
paul@123 | 185 | } |
paul@123 | 186 | |
paul@123 | 187 | /* Create interrupt objects. */ |
paul@123 | 188 | |
paul@123 | 189 | err = l4_error(l4_factory_create_irq(l4re_global_env->factory, irq0cap)); |
paul@123 | 190 | |
paul@123 | 191 | if (err) |
paul@123 | 192 | { |
paul@123 | 193 | printf("Could not create IRQ object: %lx\n", err); |
paul@123 | 194 | return 1; |
paul@123 | 195 | } |
paul@123 | 196 | |
paul@123 | 197 | /* Bind interrupt objects to IRQ numbers. */ |
paul@123 | 198 | |
paul@123 | 199 | err = l4_error(l4_icu_bind(icucap, |
paul@123 | 200 | item_in_range(dma_irq_start, dma_irq_end, 0), |
paul@123 | 201 | irq0cap)); |
paul@123 | 202 | |
paul@123 | 203 | if (err) |
paul@123 | 204 | { |
paul@123 | 205 | printf("Could not bind IRQ to the ICU: %ld\n", err); |
paul@123 | 206 | return 1; |
paul@123 | 207 | } |
paul@123 | 208 | |
paul@123 | 209 | /* Attach ourselves to the interrupt handler. */ |
paul@123 | 210 | |
paul@123 | 211 | err = l4_error(l4_rcv_ep_bind_thread(irq0cap, l4re_env()->main_thread, 0)); |
paul@123 | 212 | |
paul@123 | 213 | if (err) |
paul@123 | 214 | { |
paul@123 | 215 | printf("Could not attach to IRQs: %ld\n", err); |
paul@123 | 216 | return 1; |
paul@123 | 217 | } |
paul@123 | 218 | |
paul@123 | 219 | /* Peripheral memory. */ |
paul@123 | 220 | |
paul@123 | 221 | l4_addr_t cpm_base = 0, cpm_base_end = 0; |
paul@123 | 222 | l4_addr_t dma_base = 0, dma_base_end = 0; |
paul@123 | 223 | |
paul@123 | 224 | /* Obtain resource details describing I/O memory. */ |
paul@123 | 225 | |
paul@123 | 226 | printf("Access CPM...\n"); |
paul@123 | 227 | |
paul@123 | 228 | if (get_memory("jz4730-cpm", &cpm_base, &cpm_base_end) < 0) |
paul@123 | 229 | return 1; |
paul@123 | 230 | |
paul@123 | 231 | printf("CPM at 0x%lx...0x%lx.\n", cpm_base, cpm_base_end); |
paul@123 | 232 | |
paul@123 | 233 | printf("Access DMA...\n"); |
paul@123 | 234 | |
paul@123 | 235 | if (get_memory("jz4730-dma", &dma_base, &dma_base_end) < 0) |
paul@123 | 236 | return 1; |
paul@123 | 237 | |
paul@123 | 238 | printf("DMA at 0x%lx...0x%lx.\n", dma_base, dma_base_end); |
paul@123 | 239 | |
paul@123 | 240 | /* Obtain CPM and DMA references. */ |
paul@123 | 241 | |
paul@123 | 242 | cpm = jz4730_cpm_init(cpm_base); |
paul@143 | 243 | dmac = jz4730_dma_init(dma_base, dma_base_end, cpm); |
paul@143 | 244 | dma0 = jz4730_dma_get_channel(dmac, 0, irq0cap); |
paul@123 | 245 | |
paul@123 | 246 | /* Enable DMA. */ |
paul@123 | 247 | |
paul@123 | 248 | printf("Enable DMA...\n"); |
paul@123 | 249 | |
paul@143 | 250 | jz4730_dma_enable(dmac); |
paul@123 | 251 | |
paul@123 | 252 | /* Transfer data between the allocated memory regions. */ |
paul@123 | 253 | |
paul@143 | 254 | printf("Transfer from %llx to %llx...\n", ds0_paddr, ds1_paddr); |
paul@123 | 255 | |
paul@123 | 256 | unsigned int ntransferred = jz4730_dma_transfer(dma0, (uint32_t) ds0_paddr, |
paul@123 | 257 | (uint32_t) ds1_paddr, |
paul@123 | 258 | L4_PAGESIZE / 4, |
paul@123 | 259 | Dma_trans_unit_size_32_bit, |
paul@123 | 260 | Dma_request_auto); |
paul@123 | 261 | |
paul@123 | 262 | printf("Transferred: %d\n", ntransferred); |
paul@123 | 263 | printf("Source: %s\n", (char *) ds0_addr); |
paul@123 | 264 | printf("Destination: %s\n", (char *) ds1_addr); |
paul@123 | 265 | |
paul@123 | 266 | /* Detach from the interrupt. */ |
paul@123 | 267 | |
paul@123 | 268 | err = l4_error(l4_irq_detach(irq0cap)); |
paul@123 | 269 | |
paul@123 | 270 | if (err) |
paul@123 | 271 | printf("Error detaching from IRQ objects: %ld\n", err); |
paul@123 | 272 | |
paul@123 | 273 | return 0; |
paul@123 | 274 | } |