paul@0 | 1 | /* |
paul@0 | 2 | * GPIO driver for Ingenic JZ4730. |
paul@0 | 3 | * (See below for additional copyright and licensing notices.) |
paul@0 | 4 | * |
paul@285 | 5 | * Copyright (C) 2017, 2018, 2023, 2024 Paul Boddie <paul@boddie.org.uk> |
paul@0 | 6 | * |
paul@0 | 7 | * This program is free software; you can redistribute it and/or |
paul@0 | 8 | * modify it under the terms of the GNU General Public License as |
paul@0 | 9 | * published by the Free Software Foundation; either version 2 of |
paul@0 | 10 | * the License, or (at your option) any later version. |
paul@0 | 11 | * |
paul@0 | 12 | * This program is distributed in the hope that it will be useful, |
paul@0 | 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@0 | 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@0 | 15 | * GNU General Public License for more details. |
paul@0 | 16 | * |
paul@0 | 17 | * You should have received a copy of the GNU General Public License |
paul@0 | 18 | * along with this program; if not, write to the Free Software |
paul@0 | 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@0 | 20 | * Boston, MA 02110-1301, USA |
paul@0 | 21 | * |
paul@0 | 22 | * |
paul@0 | 23 | * Subject to other copyrights, being derived from the bcm2835.cc and |
paul@0 | 24 | * omap.cc GPIO driver implementations. |
paul@0 | 25 | * |
paul@0 | 26 | * This file is part of TUD:OS and distributed under the terms of the |
paul@0 | 27 | * GNU General Public License 2. |
paul@0 | 28 | * Please see the COPYING-GPL-2 file for details. |
paul@0 | 29 | */ |
paul@0 | 30 | |
paul@0 | 31 | #pragma once |
paul@0 | 32 | |
paul@0 | 33 | #include <l4/sys/types.h> |
paul@0 | 34 | #include <stdint.h> |
paul@287 | 35 | #include "gpio-generic.h" |
paul@0 | 36 | |
paul@0 | 37 | |
paul@0 | 38 | |
paul@0 | 39 | #ifdef __cplusplus |
paul@0 | 40 | |
paul@0 | 41 | #include <l4/devices/hw_mmio_register_block.h> |
paul@0 | 42 | |
paul@0 | 43 | // GPIO device control. |
paul@0 | 44 | |
paul@0 | 45 | class Gpio_jz4730_irq_pin : public Hw::Gpio_irq_pin |
paul@0 | 46 | { |
paul@0 | 47 | unsigned _pin; |
paul@0 | 48 | Hw::Register_block<32> _regs; |
paul@0 | 49 | |
paul@0 | 50 | // Convenience method for obtaining the bit corresponding to a pin. |
paul@0 | 51 | |
paul@0 | 52 | l4_uint32_t _pin_bit(unsigned pin) |
paul@0 | 53 | { return 1 << (pin & 31); } |
paul@0 | 54 | |
paul@0 | 55 | void write_reg_pin(unsigned reg); |
paul@0 | 56 | |
paul@0 | 57 | // Convenience methods for clearing and setting bits in the absence of |
paul@0 | 58 | // dedicated registers. |
paul@0 | 59 | |
paul@0 | 60 | void clear_reg_pin(unsigned reg); |
paul@0 | 61 | void set_reg_pin(unsigned reg); |
paul@0 | 62 | void clear_reg_pins(uint32_t reg_upper, uint32_t reg_lower); |
paul@0 | 63 | void set_reg_pins(uint32_t reg_upper, uint32_t reg_lower, uint8_t value); |
paul@0 | 64 | |
paul@0 | 65 | public: |
paul@0 | 66 | Gpio_jz4730_irq_pin(unsigned pin, Hw::Register_block<32> const ®s); |
paul@0 | 67 | |
paul@0 | 68 | void do_mask(); |
paul@0 | 69 | void do_unmask(); |
paul@0 | 70 | bool do_set_mode(unsigned mode); |
paul@0 | 71 | int clear(); |
paul@0 | 72 | bool enabled(); |
paul@0 | 73 | }; |
paul@0 | 74 | |
paul@0 | 75 | class Gpio_jz4730_chip : public Hw::Gpio_chip |
paul@0 | 76 | { |
paul@0 | 77 | private: |
paul@0 | 78 | Hw::Register_block<32> _regs; |
paul@0 | 79 | |
paul@285 | 80 | l4_addr_t _start; |
paul@285 | 81 | struct gpio_port *_pull_config; |
paul@0 | 82 | |
paul@0 | 83 | // General configuration register updates. |
paul@0 | 84 | |
paul@0 | 85 | void _config(unsigned bitmap, unsigned mode); |
paul@0 | 86 | |
paul@0 | 87 | // General pull-up register updates. |
paul@0 | 88 | |
paul@0 | 89 | void _config_pull(unsigned bitmap, unsigned mode); |
paul@0 | 90 | |
paul@0 | 91 | // General pad register updates. |
paul@0 | 92 | |
paul@0 | 93 | void _config_pad(unsigned bitmap, unsigned func, unsigned value); |
paul@0 | 94 | |
paul@188 | 95 | // Paired register field access. |
paul@188 | 96 | |
paul@188 | 97 | void _get_pin_value(unsigned pin, uint32_t reg_upper, uint32_t reg_lower, |
paul@188 | 98 | unsigned *value); |
paul@188 | 99 | |
paul@0 | 100 | public: |
paul@287 | 101 | explicit Gpio_jz4730_chip(l4_addr_t start, uint8_t port_number); |
paul@0 | 102 | |
paul@0 | 103 | // Configuration methods. |
paul@0 | 104 | |
paul@0 | 105 | void setup(unsigned pin, unsigned mode, int value = 0); |
paul@0 | 106 | void config_pull(unsigned pin, unsigned mode); |
paul@0 | 107 | void config_pad(unsigned pin, unsigned func, unsigned value); |
paul@0 | 108 | void config_get(unsigned pin, unsigned reg, unsigned *value); |
paul@188 | 109 | void config_pad_get(unsigned pin, unsigned *func, unsigned *value); |
paul@0 | 110 | |
paul@0 | 111 | // Multiple pin configuration methods. |
paul@0 | 112 | |
paul@0 | 113 | void multi_setup(Pin_slice const &mask, unsigned mode, unsigned outvalues = 0); |
paul@0 | 114 | void multi_config_pull(Pin_slice const &mask, unsigned mode); |
paul@0 | 115 | void multi_config_pad(Pin_slice const &mask, unsigned func, unsigned value = 0); |
paul@0 | 116 | void multi_set(Pin_slice const &mask, unsigned data); |
paul@0 | 117 | unsigned multi_get(unsigned offset); |
paul@0 | 118 | |
paul@0 | 119 | // IRQ pin configuration. |
paul@0 | 120 | |
paul@0 | 121 | Hw::Gpio_irq_pin *get_irq(unsigned pin); |
paul@0 | 122 | |
paul@0 | 123 | // Pin/port data methods. |
paul@0 | 124 | |
paul@0 | 125 | int get(unsigned pin); |
paul@0 | 126 | void set(unsigned pin, int value); |
paul@0 | 127 | |
paul@0 | 128 | private: |
paul@0 | 129 | void config(unsigned pin, unsigned mode); |
paul@0 | 130 | }; |
paul@0 | 131 | |
paul@287 | 132 | Hw::Gpio_chip *jz4730_gpio_chip(l4_addr_t start, uint8_t port_number, |
paul@287 | 133 | bool shadow = false); |
paul@287 | 134 | |
paul@0 | 135 | #endif /* __cplusplus */ |
paul@0 | 136 | |
paul@0 | 137 | |
paul@0 | 138 | |
paul@0 | 139 | /* C language interface. */ |
paul@0 | 140 | |
paul@0 | 141 | EXTERN_C_BEGIN |
paul@0 | 142 | |
paul@285 | 143 | void *jz4730_gpio_init(l4_addr_t start, uint8_t port_number); |
paul@0 | 144 | |
paul@0 | 145 | void jz4730_gpio_setup(void *gpio, unsigned pin, unsigned mode, int value); |
paul@0 | 146 | void jz4730_gpio_config_pull(void *gpio, unsigned pin, unsigned mode); |
paul@0 | 147 | void jz4730_gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value); |
paul@0 | 148 | void jz4730_gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value); |
paul@188 | 149 | void jz4730_gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value); |
paul@0 | 150 | |
paul@0 | 151 | void jz4730_gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues); |
paul@0 | 152 | void jz4730_gpio_multi_config_pull(void *gpio, Pin_slice const *mask, unsigned mode); |
paul@0 | 153 | void jz4730_gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value); |
paul@0 | 154 | void jz4730_gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data); |
paul@0 | 155 | unsigned jz4730_gpio_multi_get(void *gpio, unsigned offset); |
paul@0 | 156 | |
paul@0 | 157 | int jz4730_gpio_get(void *gpio, unsigned pin); |
paul@0 | 158 | void jz4730_gpio_set(void *gpio, unsigned pin, int value); |
paul@0 | 159 | |
paul@0 | 160 | void *jz4730_gpio_get_irq(void *gpio, unsigned pin); |
paul@0 | 161 | bool jz4730_gpio_irq_set_mode(void *gpio_irq, unsigned mode); |
paul@0 | 162 | |
paul@0 | 163 | EXTERN_C_END |