7 months ago | Paul Boddie | file changeset files shortlog | Added a level 2 (L2) cache clock and introduced the apparent requirement to set the CPU frequency to the L2 cache frequency before powering down. | cpm-library-improvements |
paul@105 | 1 | #include <l4/devices/protocols.h> |
paul@105 | 2 | |
paul@105 | 3 | [protocol(LANDFALL_SPI)] |
paul@105 | 4 | interface SPI |
paul@105 | 5 | { |
paul@105 | 6 | void send(in int bits, in int data); |
paul@105 | 7 | }; |