1.1 --- a/pkg/devices/lib/cpm/src/x1600.cc Mon Oct 30 17:25:00 2023 +0100
1.2 +++ b/pkg/devices/lib/cpm/src/x1600.cc Fri Nov 03 18:09:49 2023 +0100
1.3 @@ -381,19 +381,22 @@
1.4 Control_pll(Pll_enable_A, Pll_stable_A, Pll_bypass_A),
1.5 Divider_pll(Pll_multiplier_A, Pll_input_division_A,
1.6 Pll_output_division0_A, Pll_output_division1_A,
1.7 - x1600_pll_intermediate_min, x1600_pll_intermediate_max)),
1.8 + x1600_pll_intermediate_min, x1600_pll_intermediate_max,
1.9 + false)),
1.10
1.11 clock_pll_E(Source(mux_external),
1.12 Control_pll(Pll_enable_E, Pll_stable_E, Pll_bypass_E),
1.13 Divider_pll(Pll_multiplier_E, Pll_input_division_E,
1.14 Pll_output_division0_E, Pll_output_division1_E,
1.15 - x1600_pll_intermediate_min, x1600_pll_intermediate_max)),
1.16 + x1600_pll_intermediate_min, x1600_pll_intermediate_max,
1.17 + false)),
1.18
1.19 clock_pll_M(Source(mux_external),
1.20 Control_pll(Pll_enable_M, Pll_stable_M, Pll_bypass_M),
1.21 Divider_pll(Pll_multiplier_M, Pll_input_division_M,
1.22 Pll_output_division0_M, Pll_output_division1_M,
1.23 - x1600_pll_intermediate_min, x1600_pll_intermediate_max));
1.24 + x1600_pll_intermediate_min, x1600_pll_intermediate_max,
1.25 + false));
1.26
1.27
1.28