1.1 --- a/pkg/devices/lib/cpm/include/cpm-jz4740.h Tue Sep 12 17:20:10 2023 +0200
1.2 +++ b/pkg/devices/lib/cpm/include/cpm-jz4740.h Thu Sep 14 00:11:14 2023 +0200
1.3 @@ -1,7 +1,7 @@
1.4 /*
1.5 * CPM (clock and power management) support for the JZ4740.
1.6 *
1.7 - * Copyright (C) 2017, 2018, 2020, 2021 Paul Boddie <paul@boddie.org.uk>
1.8 + * Copyright (C) 2017, 2018, 2020, 2021, 2023 Paul Boddie <paul@boddie.org.uk>
1.9 *
1.10 * This program is free software; you can redistribute it and/or
1.11 * modify it under the terms of the GNU General Public License as
1.12 @@ -42,6 +42,13 @@
1.13 Hw::Register_block<32> _regs;
1.14 uint32_t _exclk_freq;
1.15
1.16 + // Utility methods.
1.17 +
1.18 + uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift);
1.19 +
1.20 + // PLL status.
1.21 +
1.22 + int have_pll();
1.23 int pll_enabled();
1.24 int pll_bypassed();
1.25
1.26 @@ -52,39 +59,45 @@
1.27 public:
1.28 Cpm_jz4740_chip(l4_addr_t addr, uint32_t exclk_freq);
1.29
1.30 - int have_clock(enum Clock_identifiers clock);
1.31 - void start_clock(enum Clock_identifiers clock);
1.32 - void stop_clock(enum Clock_identifiers clock);
1.33 -
1.34 - int have_pll();
1.35 + // PLL configuration.
1.36
1.37 uint16_t get_multiplier();
1.38 uint8_t get_input_division();
1.39 uint8_t get_output_division();
1.40
1.41 - uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift);
1.42 + // Divider configuration.
1.43 +
1.44 uint8_t get_cpu_divider();
1.45 uint8_t get_hclock_divider();
1.46 uint8_t get_pclock_divider();
1.47 uint8_t get_memory_divider();
1.48 uint8_t get_source_divider();
1.49 -
1.50 uint16_t get_lcd_pixel_divider();
1.51
1.52 void set_lcd_device_divider(uint8_t division);
1.53 void set_lcd_pixel_divider(uint16_t division);
1.54
1.55 - uint32_t get_frequency(enum Clock_frequency_identifiers clock);
1.56 - void set_frequency(enum Clock_frequency_identifiers clock, uint32_t frequency);
1.57 + // PLL frequency status.
1.58
1.59 uint32_t get_pll_frequency();
1.60 - uint32_t get_output_frequency();
1.61 - void update_output_frequency();
1.62 + uint32_t get_source_frequency();
1.63 +
1.64 + // Clock frequency status.
1.65
1.66 uint32_t get_cpu_frequency();
1.67 uint32_t get_hclock_frequency();
1.68 uint32_t get_pclock_frequency();
1.69 uint32_t get_memory_frequency();
1.70 +
1.71 + // Clock configuration.
1.72 +
1.73 + uint32_t get_frequency(enum Clock_identifiers clock);
1.74 + void set_frequency(enum Clock_identifiers clock, uint32_t frequency);
1.75 +
1.76 + int have_clock(enum Clock_identifiers clock);
1.77 + void start_clock(enum Clock_identifiers clock);
1.78 + void stop_clock(enum Clock_identifiers clock);
1.79 +
1.80 };
1.81
1.82 #endif /* __cplusplus */
1.83 @@ -105,14 +118,12 @@
1.84
1.85 uint16_t jz4740_cpm_get_lcd_pixel_divider(void *cpm);
1.86
1.87 -uint32_t jz4740_cpm_get_frequency(void *cpm, enum Clock_frequency_identifiers clock);
1.88 -void jz4740_cpm_set_frequency(void *cpm, enum Clock_frequency_identifiers clock, uint32_t frequency);
1.89 -
1.90 -void jz4740_cpm_update_output_frequency(void *cpm);
1.91 +uint32_t jz4740_cpm_get_frequency(void *cpm, enum Clock_identifiers clock);
1.92 +void jz4740_cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint32_t frequency);
1.93
1.94 uint32_t jz4740_cpm_get_cpu_frequency(void *cpm);
1.95 uint32_t jz4740_cpm_get_hclock_frequency(void *cpm);
1.96 -uint32_t jz4740_cpm_get_output_frequency(void *cpm);
1.97 +uint32_t jz4740_cpm_get_source_frequency(void *cpm);
1.98 uint32_t jz4740_cpm_get_pclock_frequency(void *cpm);
1.99 uint32_t jz4740_cpm_get_memory_frequency(void *cpm);
1.100