1.1 --- a/pkg/devices/lib/spi/src/gpio.cc Fri Jun 07 16:08:15 2024 +0200
1.2 +++ b/pkg/devices/lib/spi/src/gpio.cc Fri Jun 07 16:12:32 2024 +0200
1.3 @@ -83,7 +83,7 @@
1.4 /* Initialise pin levels. */
1.5
1.6 _enable_device->set(_enable_pin, 1);
1.7 - _clock_device->set(_clock_pin, 1);
1.8 + _clock_device->set(_clock_pin, 0);
1.9 _data_device->set(_data_pin, 0);
1.10
1.11 if ((_control_device != NULL) && (_control_pin >= 0) && (dc != NULL))
1.12 @@ -109,8 +109,8 @@
1.13 for (uint8_t bit = 0; bit < char_size; bit++)
1.14 {
1.15 /* NOTE: Data presented on falling clock level and sampled on rising clock
1.16 - level. This is SPI mode 3, or 0 given that the enable level is
1.17 - driven low immediately before the first bit is presented. */
1.18 + level. This is SPI mode 0 given that the enable level is driven
1.19 + low immediately before the first bit is presented. */
1.20
1.21 _clock_device->set(_clock_pin, 0);
1.22 _data_device->set(_data_pin, value & mask ? 1 : 0);
1.23 @@ -128,6 +128,7 @@
1.24 }
1.25
1.26 _enable_device->set(_enable_pin, 1);
1.27 + _clock_device->set(_clock_pin, 0);
1.28
1.29 return bytes;
1.30 }