1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/pkg/devices/lib/gpio/include/gpio-jz4730.h Sun May 13 01:34:16 2018 +0200
1.3 @@ -0,0 +1,188 @@
1.4 +/*
1.5 + * GPIO driver for Ingenic JZ4730.
1.6 + * (See below for additional copyright and licensing notices.)
1.7 + *
1.8 + * (c) 2017, 2018 Paul Boddie <paul@boddie.org.uk>
1.9 + *
1.10 + * This program is free software; you can redistribute it and/or
1.11 + * modify it under the terms of the GNU General Public License as
1.12 + * published by the Free Software Foundation; either version 2 of
1.13 + * the License, or (at your option) any later version.
1.14 + *
1.15 + * This program is distributed in the hope that it will be useful,
1.16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.18 + * GNU General Public License for more details.
1.19 + *
1.20 + * You should have received a copy of the GNU General Public License
1.21 + * along with this program; if not, write to the Free Software
1.22 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
1.23 + * Boston, MA 02110-1301, USA
1.24 + *
1.25 + *
1.26 + * Subject to other copyrights, being derived from the bcm2835.cc and
1.27 + * omap.cc GPIO driver implementations.
1.28 + *
1.29 + * This file is part of TUD:OS and distributed under the terms of the
1.30 + * GNU General Public License 2.
1.31 + * Please see the COPYING-GPL-2 file for details.
1.32 + */
1.33 +
1.34 +#pragma once
1.35 +
1.36 +#include <l4/sys/err.h>
1.37 +#include <l4/sys/types.h>
1.38 +#include <stdint.h>
1.39 +#include "gpio.h"
1.40 +
1.41 +
1.42 +
1.43 +#ifdef __cplusplus
1.44 +
1.45 +#include <l4/devices/hw_mmio_register_block.h>
1.46 +
1.47 +// GPIO device control.
1.48 +
1.49 +class Gpio_jz4730_irq_pin : public Hw::Gpio_irq_pin
1.50 +{
1.51 + unsigned _pin;
1.52 + Hw::Register_block<32> _regs;
1.53 +
1.54 + // Convenience method for obtaining the bit corresponding to a pin.
1.55 +
1.56 + l4_uint32_t _pin_bit(unsigned pin)
1.57 + { return 1 << (pin & 31); }
1.58 +
1.59 + void write_reg_pin(unsigned reg);
1.60 +
1.61 + // Convenience methods for clearing and setting bits in the absence of
1.62 + // dedicated registers.
1.63 +
1.64 + void clear_reg_pin(unsigned reg);
1.65 + void set_reg_pin(unsigned reg);
1.66 + void clear_reg_pins(uint32_t reg_upper, uint32_t reg_lower);
1.67 + void set_reg_pins(uint32_t reg_upper, uint32_t reg_lower, uint8_t value);
1.68 +
1.69 +public:
1.70 + Gpio_jz4730_irq_pin(unsigned pin, Hw::Register_block<32> const ®s);
1.71 +
1.72 + void do_mask();
1.73 + void do_unmask();
1.74 + bool do_set_mode(unsigned mode);
1.75 + int clear();
1.76 + bool enabled();
1.77 +};
1.78 +
1.79 +class Gpio_jz4730_chip : public Hw::Gpio_chip
1.80 +{
1.81 +private:
1.82 + Hw::Register_block<32> _regs;
1.83 +
1.84 + l4_addr_t _start, _end;
1.85 + unsigned _nr_pins;
1.86 +
1.87 + // Convenience method for obtaining the bit corresponding to a pin.
1.88 +
1.89 + l4_uint32_t _pin_bit(unsigned pin)
1.90 + { return 1 << (pin & 31); }
1.91 +
1.92 + // Convenience method for obtaining the bit position of a pin.
1.93 +
1.94 + unsigned _pin_shift(unsigned pin)
1.95 + { return pin % 32; }
1.96 +
1.97 + // Permit only "aligned" accesses to registers.
1.98 +
1.99 + unsigned _reg_offset_check(unsigned pin_offset) const
1.100 + {
1.101 + switch (pin_offset)
1.102 + {
1.103 + case 0:
1.104 + return 0;
1.105 +
1.106 + default:
1.107 + throw -L4_EINVAL;
1.108 + }
1.109 + }
1.110 +
1.111 + // General configuration register updates.
1.112 +
1.113 + void _config(unsigned bitmap, unsigned mode);
1.114 +
1.115 + // General pull-up register updates.
1.116 +
1.117 + void _config_pull(unsigned bitmap, unsigned mode);
1.118 +
1.119 + // General pad register updates.
1.120 +
1.121 + void _config_pad(unsigned bitmap, unsigned func, unsigned value);
1.122 +
1.123 +public:
1.124 + Gpio_jz4730_chip(l4_addr_t start, l4_addr_t end,
1.125 + unsigned nr_pins);
1.126 +
1.127 + // Obtain the number of pins.
1.128 +
1.129 + unsigned nr_pins() const { return _nr_pins; }
1.130 +
1.131 + // Unnecessary operations.
1.132 +
1.133 + void request(unsigned) {}
1.134 + void free(unsigned) {}
1.135 +
1.136 + // Configuration methods.
1.137 +
1.138 + void setup(unsigned pin, unsigned mode, int value = 0);
1.139 + void config_pull(unsigned pin, unsigned mode);
1.140 + void config_pad(unsigned pin, unsigned func, unsigned value);
1.141 + void config_get(unsigned pin, unsigned reg, unsigned *value);
1.142 +
1.143 + // Multiple pin configuration methods.
1.144 +
1.145 + void multi_setup(Pin_slice const &mask, unsigned mode, unsigned outvalues = 0);
1.146 + void multi_config_pull(Pin_slice const &mask, unsigned mode);
1.147 + void multi_config_pad(Pin_slice const &mask, unsigned func, unsigned value = 0);
1.148 + void multi_set(Pin_slice const &mask, unsigned data);
1.149 + unsigned multi_get(unsigned offset);
1.150 +
1.151 + // IRQ pin configuration.
1.152 +
1.153 + Hw::Gpio_irq_pin *get_irq(unsigned pin);
1.154 +
1.155 + // Pin/port data methods.
1.156 +
1.157 + int get(unsigned pin);
1.158 + void set(unsigned pin, int value);
1.159 +
1.160 +private:
1.161 + void config(unsigned pin, unsigned mode);
1.162 +};
1.163 +
1.164 +#endif /* __cplusplus */
1.165 +
1.166 +
1.167 +
1.168 +/* C language interface. */
1.169 +
1.170 +EXTERN_C_BEGIN
1.171 +
1.172 +void *jz4730_gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins);
1.173 +
1.174 +void jz4730_gpio_setup(void *gpio, unsigned pin, unsigned mode, int value);
1.175 +void jz4730_gpio_config_pull(void *gpio, unsigned pin, unsigned mode);
1.176 +void jz4730_gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value);
1.177 +void jz4730_gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value);
1.178 +
1.179 +void jz4730_gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues);
1.180 +void jz4730_gpio_multi_config_pull(void *gpio, Pin_slice const *mask, unsigned mode);
1.181 +void jz4730_gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value);
1.182 +void jz4730_gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data);
1.183 +unsigned jz4730_gpio_multi_get(void *gpio, unsigned offset);
1.184 +
1.185 +int jz4730_gpio_get(void *gpio, unsigned pin);
1.186 +void jz4730_gpio_set(void *gpio, unsigned pin, int value);
1.187 +
1.188 +void *jz4730_gpio_get_irq(void *gpio, unsigned pin);
1.189 +bool jz4730_gpio_irq_set_mode(void *gpio_irq, unsigned mode);
1.190 +
1.191 +EXTERN_C_END