1.1 --- a/pkg/landfall-examples/qi_lb60_lcd/jzlcd.c Tue May 29 22:26:18 2018 +0200
1.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
1.3 @@ -1,565 +0,0 @@
1.4 -/*
1.5 - * jz4740 LCD controller configuration.
1.6 - *
1.7 - * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
1.8 - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie <paul@boddie.org.uk>
1.9 - *
1.10 - * This program is free software; you can redistribute it and/or
1.11 - * modify it under the terms of the GNU General Public License as
1.12 - * published by the Free Software Foundation; either version 2 of
1.13 - * the License, or (at your option) any later version.
1.14 - *
1.15 - * This program is distributed in the hope that it will be useful,
1.16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.18 - * GNU General Public License for more details.
1.19 - *
1.20 - * You should have received a copy of the GNU General Public License
1.21 - * along with this program; if not, write to the Free Software
1.22 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
1.23 - * Boston, MA 02110-1301, USA
1.24 - */
1.25 -
1.26 -#include "jzlcd.h"
1.27 -#include "xburst_types.h" /* for REG32 */
1.28 -#include <l4/sys/cache.h> /* for l4_cache functions */
1.29 -
1.30 -/* Useful alignment operations. */
1.31 -
1.32 -static inline void align2(uint32_t *n)
1.33 -{
1.34 - *n = (((*n)+1)>>1)<<1;
1.35 -}
1.36 -
1.37 -static inline void align4(uint32_t *n)
1.38 -{
1.39 - *n = (((*n)+3)>>2)<<2;
1.40 -}
1.41 -
1.42 -static inline void align8(uint32_t *n)
1.43 -{
1.44 - *n = (((*n)+7)>>3)<<3;
1.45 -}
1.46 -
1.47 -
1.48 -
1.49 -/* Register operations. */
1.50 -
1.51 -static inline uint32_t lcd_ctrl_get(vidinfo_t *vid, uint32_t reg)
1.52 -{
1.53 - return REG32(vid->lcd + reg);
1.54 -}
1.55 -
1.56 -static inline void lcd_ctrl_set(vidinfo_t *vid, uint32_t reg, uint32_t value)
1.57 -{
1.58 - REG32(vid->lcd + reg) = value;
1.59 -}
1.60 -
1.61 -
1.62 -
1.63 -/* Configuration operations. */
1.64 -
1.65 -/* Return the number of panels available. */
1.66 -
1.67 -static uint8_t lcd_get_panels(vidinfo_t *vid)
1.68 -{
1.69 - struct jzfb_info *jzfb = vid->jz_fb;
1.70 - uint32_t mode = jzfb->cfg & MODE_MASK;
1.71 -
1.72 - return (mode == MODE_STN_MONO_DUAL) ||
1.73 - (mode == MODE_STN_COLOR_DUAL) ? 2 : 1;
1.74 -}
1.75 -
1.76 -/* Calculate and return the pixel clock frequency. */
1.77 -
1.78 -static uint32_t lcd_get_pixel_clock(vidinfo_t *vid)
1.79 -{
1.80 - struct jzfb_info *jzfb = vid->jz_fb;
1.81 - uint32_t pclk, width_cycles, mode = jzfb->cfg & MODE_MASK;
1.82 -
1.83 - /*
1.84 - Serial mode: 3 pixel clock cycles per pixel (one per channel).
1.85 - Parallel mode: 1 pixel clock cycle per pixel.
1.86 - */
1.87 -
1.88 - if (mode == MODE_8BIT_SERIAL_TFT)
1.89 - width_cycles = jzfb->w * 3;
1.90 - else
1.91 - width_cycles = jzfb->w;
1.92 -
1.93 - /* Derive pixel clock from frame clock. */
1.94 -
1.95 - pclk = jzfb->fclk *
1.96 - (width_cycles + jzfb->hsw + jzfb->elw + jzfb->blw) *
1.97 - (jzfb->h + jzfb->vsw + jzfb->efw + jzfb->bfw);
1.98 -
1.99 - if ((mode == MODE_STN_COLOR_SINGLE) || (mode == MODE_STN_COLOR_DUAL))
1.100 - pclk = (pclk * 3);
1.101 -
1.102 - if ((mode == MODE_STN_COLOR_SINGLE) || (mode == MODE_STN_COLOR_DUAL) ||
1.103 - (mode == MODE_STN_MONO_SINGLE) || (mode == MODE_STN_MONO_DUAL))
1.104 - pclk = pclk >> ((jzfb->cfg & STN_DAT_PINMASK) >> 4);
1.105 -
1.106 - if ((mode == MODE_STN_COLOR_DUAL) || (mode == MODE_STN_MONO_DUAL))
1.107 - pclk >>= 1;
1.108 -
1.109 - return pclk;
1.110 -}
1.111 -
1.112 -
1.113 -
1.114 -/* Functions returning region sizes. */
1.115 -
1.116 -static uint32_t lcd_get_line_size(vidinfo_t *vid)
1.117 -{
1.118 - /* Lines must be aligned to a word boundary. */
1.119 -
1.120 - return ALIGN((vid->jz_fb->w * vid->jz_fb->bpp) / 8, sizeof(uint32_t));
1.121 -}
1.122 -
1.123 -static uint32_t lcd_get_size(vidinfo_t *vid)
1.124 -{
1.125 - return lcd_get_line_size(vid) * vid->jz_fb->h;
1.126 -}
1.127 -
1.128 -static uint32_t lcd_get_aligned_size(vidinfo_t *vid)
1.129 -{
1.130 - /* LCD_CTRL_BST_16 requires 16-word alignment. */
1.131 -
1.132 - return ALIGN(lcd_get_size(vid), 16 * sizeof(uint32_t));
1.133 -}
1.134 -
1.135 -static uint32_t lcd_get_palette_size(vidinfo_t *vid)
1.136 -{
1.137 - /* Get a collection of two-byte entries, one per colour. */
1.138 -
1.139 - if (vid->jz_fb->bpp < 12)
1.140 - return (1 << (vid->jz_fb->bpp)) * sizeof(uint16_t);
1.141 - else
1.142 - return 0;
1.143 -}
1.144 -
1.145 -static uint32_t lcd_get_aligned_palette_size(vidinfo_t *vid)
1.146 -{
1.147 - /* LCD_CTRL_BST_16 requires 16-word alignment. */
1.148 -
1.149 - return ALIGN(lcd_get_palette_size(vid), 16 * sizeof(uint32_t));
1.150 -}
1.151 -
1.152 -static uint32_t lcd_get_descriptors_size(vidinfo_t *vid)
1.153 -{
1.154 - return 3 * sizeof(struct jz_fb_dma_descriptor);
1.155 -}
1.156 -
1.157 -
1.158 -
1.159 -/* Functions returning addresses of each data region.
1.160 -The screen parameter permits the retrieval of virtual or physical addresses. */
1.161 -
1.162 -static uint32_t lcd_get_palette(vidinfo_t *vid, uint32_t screen)
1.163 -{
1.164 - /* Use memory at the end of the allocated region for the palette. */
1.165 -
1.166 - return screen + jz4740_lcd_get_screen_size(vid) - lcd_get_aligned_palette_size(vid);
1.167 -}
1.168 -
1.169 -static uint32_t lcd_get_framebuffer(uint8_t panel, vidinfo_t *vid, uint32_t screen)
1.170 -{
1.171 - /* Framebuffers for panels are allocated at the start of the region. */
1.172 -
1.173 - return screen + (panel * lcd_get_aligned_size(vid));
1.174 -}
1.175 -
1.176 -
1.177 -
1.178 -/* Initialisation functions. */
1.179 -
1.180 -static uint32_t jz_lcd_stn_init(uint32_t stnH, vidinfo_t *vid)
1.181 -{
1.182 - struct jzfb_info *jzfb = vid->jz_fb;
1.183 - uint32_t val = 0;
1.184 -
1.185 - switch (jzfb->bpp) {
1.186 - case 1:
1.187 - /* val |= LCD_CTRL_PEDN; */
1.188 - case 2:
1.189 - val |= LCD_CTRL_FRC_2;
1.190 - break;
1.191 -
1.192 - case 4:
1.193 - val |= LCD_CTRL_FRC_4;
1.194 - break;
1.195 -
1.196 - case 8:
1.197 - default:
1.198 - val |= LCD_CTRL_FRC_16;
1.199 - break;
1.200 - }
1.201 -
1.202 - switch (jzfb->cfg & STN_DAT_PINMASK) {
1.203 - case STN_DAT_PIN1:
1.204 - /* Do not adjust the hori-param value. */
1.205 - break;
1.206 -
1.207 - case STN_DAT_PIN2:
1.208 - align2(&jzfb->hsw);
1.209 - align2(&jzfb->elw);
1.210 - align2(&jzfb->blw);
1.211 - break;
1.212 -
1.213 - case STN_DAT_PIN4:
1.214 - align4(&jzfb->hsw);
1.215 - align4(&jzfb->elw);
1.216 - align4(&jzfb->blw);
1.217 - break;
1.218 -
1.219 - case STN_DAT_PIN8:
1.220 - align8(&jzfb->hsw);
1.221 - align8(&jzfb->elw);
1.222 - align8(&jzfb->blw);
1.223 - break;
1.224 - }
1.225 -
1.226 - lcd_ctrl_set(vid, LCD_VSYNC, jzfb->vsw);
1.227 - lcd_ctrl_set(vid, LCD_HSYNC, ((jzfb->blw + jzfb->w) << 16) | (jzfb->blw + jzfb->w + jzfb->hsw));
1.228 -
1.229 - /* Screen setting */
1.230 - lcd_ctrl_set(vid, LCD_VAT, ((jzfb->blw + jzfb->w + jzfb->hsw + jzfb->elw) << 16) | (stnH + jzfb->vsw + jzfb->bfw + jzfb->efw));
1.231 - lcd_ctrl_set(vid, LCD_DAH, (jzfb->blw << 16) | (jzfb->blw + jzfb->w));
1.232 - lcd_ctrl_set(vid, LCD_DAV, stnH);
1.233 -
1.234 - /* AC BIAs signal */
1.235 - lcd_ctrl_set(vid, LCD_PS, stnH+jzfb->vsw+jzfb->efw+jzfb->bfw);
1.236 -
1.237 - return val;
1.238 -}
1.239 -
1.240 -static void jz_lcd_tft_init(vidinfo_t *vid)
1.241 -{
1.242 - struct jzfb_info *jzfb = vid->jz_fb;
1.243 -
1.244 - lcd_ctrl_set(vid, LCD_VSYNC, jzfb->vsw);
1.245 - lcd_ctrl_set(vid, LCD_HSYNC, jzfb->hsw);
1.246 - lcd_ctrl_set(vid, LCD_DAV, ((jzfb->vsw + jzfb->bfw) << 16) | (jzfb->vsw + jzfb->bfw + jzfb->h));
1.247 - lcd_ctrl_set(vid, LCD_DAH, ((jzfb->hsw + jzfb->blw) << 16) | (jzfb->hsw + jzfb->blw + jzfb->w));
1.248 - lcd_ctrl_set(vid, LCD_VAT, (((jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw)) << 16) |
1.249 - (jzfb->vsw + jzfb->bfw + jzfb->h + jzfb->efw));
1.250 -}
1.251 -
1.252 -static void jz_lcd_samsung_init(vidinfo_t *vid)
1.253 -{
1.254 - struct jzfb_info *jzfb = vid->jz_fb;
1.255 - uint32_t pclk = lcd_get_pixel_clock(vid);
1.256 - uint32_t total, tp_s, tp_e, ckv_s, ckv_e;
1.257 - uint32_t rev_s, rev_e, inv_s, inv_e;
1.258 -
1.259 - jz_lcd_tft_init(vid);
1.260 -
1.261 - total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw;
1.262 - tp_s = jzfb->blw + jzfb->w + 1;
1.263 - tp_e = tp_s + 1;
1.264 - /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
1.265 - ckv_s = tp_s - pclk/(1000000000/4100);
1.266 - ckv_e = tp_s + total;
1.267 - rev_s = tp_s - 11; /* -11.5 clk */
1.268 - rev_e = rev_s + total;
1.269 - inv_s = tp_s;
1.270 - inv_e = inv_s + total;
1.271 - lcd_ctrl_set(vid, LCD_CLS, (tp_s << 16) | tp_e);
1.272 - lcd_ctrl_set(vid, LCD_PS, (ckv_s << 16) | ckv_e);
1.273 - lcd_ctrl_set(vid, LCD_SPL, (rev_s << 16) | rev_e);
1.274 - lcd_ctrl_set(vid, LCD_REV, (inv_s << 16) | inv_e);
1.275 - jzfb->cfg |= STFT_REVHI | STFT_SPLHI;
1.276 -}
1.277 -
1.278 -static void jz_lcd_sharp_init(vidinfo_t *vid)
1.279 -{
1.280 - struct jzfb_info *jzfb = vid->jz_fb;
1.281 - uint32_t total, cls_s, cls_e, ps_s, ps_e;
1.282 - uint32_t spl_s, spl_e, rev_s, rev_e;
1.283 -
1.284 - jz_lcd_tft_init(vid);
1.285 -
1.286 - total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw;
1.287 - spl_s = 1;
1.288 - spl_e = spl_s + 1;
1.289 - cls_s = 0;
1.290 - cls_e = total - 60; /* > 4us (pclk = 80ns) */
1.291 - ps_s = cls_s;
1.292 - ps_e = cls_e;
1.293 - rev_s = total - 40; /* > 3us (pclk = 80ns) */
1.294 - rev_e = rev_s + total;
1.295 - jzfb->cfg |= STFT_PSHI;
1.296 - lcd_ctrl_set(vid, LCD_SPL, (spl_s << 16) | spl_e);
1.297 - lcd_ctrl_set(vid, LCD_CLS, (cls_s << 16) | cls_e);
1.298 - lcd_ctrl_set(vid, LCD_PS, (ps_s << 16) | ps_e);
1.299 - lcd_ctrl_set(vid, LCD_REV, (rev_s << 16) | rev_e);
1.300 -}
1.301 -
1.302 -
1.303 -
1.304 -/* Palette initialisation. */
1.305 -
1.306 -static inline uint16_t rgb8_to_rgb16(uint8_t rgb)
1.307 -{
1.308 - return ((((rgb & 0xe0) >> 5) * 4) << 11) | ((((rgb & 0x1c) >> 2) * 9) << 6) | ((rgb & 0x03) * 10);
1.309 -}
1.310 -
1.311 -static inline uint16_t rgb4_to_rgb16(uint8_t rgb)
1.312 -{
1.313 - return ((((rgb & 8) >> 3) * 0x1f) << 11) | ((((rgb & 6) >> 1) * 0x15) << 5) | ((rgb & 1) * 0x1f);
1.314 -}
1.315 -
1.316 -static void lcd_init_palette(vidinfo_t *vid, uint32_t palette)
1.317 -{
1.318 - uint16_t *entry = (uint16_t *) palette;
1.319 - uint16_t *end = entry + (1 << (vid->jz_fb->bpp));
1.320 - uint8_t value = 0;
1.321 -
1.322 - while (entry < end)
1.323 - {
1.324 - switch (vid->jz_fb->bpp)
1.325 - {
1.326 - case 4:
1.327 - *entry = rgb4_to_rgb16(value);
1.328 - break;
1.329 -
1.330 - case 8:
1.331 - default:
1.332 - *entry = rgb8_to_rgb16(value);
1.333 - break;
1.334 - }
1.335 -
1.336 - value++;
1.337 - entry++;
1.338 - }
1.339 -}
1.340 -
1.341 -
1.342 -
1.343 -/* Public functions. */
1.344 -
1.345 -uint32_t jz4740_lcd_get_aligned_size(vidinfo_t *vid)
1.346 -{
1.347 - return lcd_get_aligned_size(vid);
1.348 -}
1.349 -
1.350 -uint32_t jz4740_lcd_get_descriptors_size(vidinfo_t *vid)
1.351 -{
1.352 - return lcd_get_descriptors_size(vid);
1.353 -}
1.354 -
1.355 -uint32_t jz4740_lcd_get_line_size(vidinfo_t *vid)
1.356 -{
1.357 - return lcd_get_line_size(vid);
1.358 -}
1.359 -
1.360 -/* Return the total size of the required memory. */
1.361 -
1.362 -uint32_t jz4740_lcd_get_screen_size(vidinfo_t *vid)
1.363 -{
1.364 - return lcd_get_aligned_size(vid) * lcd_get_panels(vid) +
1.365 - lcd_get_aligned_palette_size(vid);
1.366 -}
1.367 -
1.368 -/* Return the calculated pixel clock frequency for the display. */
1.369 -
1.370 -uint32_t jz4740_lcd_get_pixel_clock(vidinfo_t *vid)
1.371 -{
1.372 - return lcd_get_pixel_clock(vid);
1.373 -}
1.374 -
1.375 -/* Set the LCD controller address. */
1.376 -
1.377 -void jz4740_lcd_set_base(vidinfo_t *vid, void *lcd_base)
1.378 -{
1.379 - vid->lcd = lcd_base;
1.380 -}
1.381 -
1.382 -/* Initialise the LCD controller with the memory, panel and framebuffer details. */
1.383 -
1.384 -void jz4740_lcd_ctrl_init(
1.385 - struct jz_fb_dma_descriptor *desc_vaddr,
1.386 - struct jz_fb_dma_descriptor *desc_paddr,
1.387 - void *fb_vaddr, void *fb_paddr,
1.388 - vidinfo_t *vid)
1.389 -{
1.390 - struct jz_fb_dma_descriptor *first, *second = 0;
1.391 -
1.392 - /* Initialise a palette for lower colour depths. */
1.393 -
1.394 - if (vid->jz_fb->bpp < 12)
1.395 - lcd_init_palette(vid, lcd_get_palette(vid, (uint32_t) fb_vaddr));
1.396 -
1.397 - /* Populate descriptors. */
1.398 -
1.399 - /* Provide the first framebuffer descriptor in single and dual modes. */
1.400 -
1.401 - desc_vaddr[0].fsadr = lcd_get_framebuffer(0, vid, (uint32_t) fb_paddr);
1.402 - desc_vaddr[0].fidr = 0;
1.403 - desc_vaddr[0].ldcmd = lcd_get_size(vid) / 4; /* length in words */
1.404 -
1.405 - /* Provide the second framebuffer descriptor only in dual-panel mode. */
1.406 -
1.407 - if (lcd_get_panels(vid) == 2)
1.408 - {
1.409 - desc_vaddr[1].fdadr = desc_paddr + 1;
1.410 - desc_vaddr[1].fsadr = lcd_get_framebuffer(1, vid, (uint32_t) fb_paddr);
1.411 - desc_vaddr[1].fidr = 0;
1.412 - desc_vaddr[1].ldcmd = lcd_get_size(vid) / 4;
1.413 -
1.414 - /* Note the address to be provided for the second channel. */
1.415 -
1.416 - second = desc_paddr + 1;
1.417 - }
1.418 -
1.419 - /* Initialise palette descriptor details if a palette is to be used. */
1.420 -
1.421 - /* Assume any mode with <12 bpp is palette driven. */
1.422 -
1.423 - if (vid->jz_fb->bpp < 12)
1.424 - {
1.425 - desc_vaddr[2].fsadr = lcd_get_palette(vid, (uint32_t) fb_paddr);
1.426 - desc_vaddr[2].fidr = 0;
1.427 - desc_vaddr[2].ldcmd = (lcd_get_palette_size(vid) / 4) | LCD_CMD_PAL;
1.428 -
1.429 - /* Flip back and forth between the palette and framebuffer. */
1.430 -
1.431 - desc_vaddr[2].fdadr = desc_paddr;
1.432 - desc_vaddr[0].fdadr = desc_paddr + 2;
1.433 -
1.434 - /* Provide the palette descriptor address first. */
1.435 -
1.436 - first = desc_paddr + 2;
1.437 - }
1.438 - else
1.439 - {
1.440 - /* No palette: always use the framebuffer descriptor. */
1.441 -
1.442 - desc_vaddr[0].fdadr = desc_paddr;
1.443 - first = desc_paddr;
1.444 - }
1.445 -
1.446 - /* Flush cached structure data. */
1.447 -
1.448 - l4_cache_clean_data((unsigned long) desc_vaddr,
1.449 - (unsigned long) desc_vaddr + lcd_get_descriptors_size(vid));
1.450 -
1.451 - /* Configure DMA by setting frame descriptor addresses. */
1.452 -
1.453 - lcd_ctrl_set(vid, LCD_DA0, (uint32_t) first);
1.454 -
1.455 - if (lcd_get_panels(vid) == 2)
1.456 - lcd_ctrl_set(vid, LCD_DA1, (uint32_t) second);
1.457 -}
1.458 -
1.459 -/* Initialise the LCD registers. */
1.460 -
1.461 -void jz4740_lcd_hw_init(vidinfo_t *vid)
1.462 -{
1.463 - struct jzfb_info *jzfb = vid->jz_fb;
1.464 - uint32_t mode = vid->jz_fb->cfg & MODE_MASK;
1.465 - uint32_t val = 0;
1.466 -
1.467 - /* Compute control register flags. */
1.468 -
1.469 - switch (jzfb->bpp) {
1.470 - case 1:
1.471 - val |= LCD_CTRL_BPP_1;
1.472 - break;
1.473 -
1.474 - case 2:
1.475 - val |= LCD_CTRL_BPP_2;
1.476 - break;
1.477 -
1.478 - case 4:
1.479 - val |= LCD_CTRL_BPP_4;
1.480 - break;
1.481 -
1.482 - case 8:
1.483 - val |= LCD_CTRL_BPP_8;
1.484 - break;
1.485 -
1.486 - case 15:
1.487 - val |= LCD_CTRL_RGB555;
1.488 - case 16:
1.489 - val |= LCD_CTRL_BPP_16;
1.490 - break;
1.491 -
1.492 - case 17 ... 32:
1.493 - val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */
1.494 - break;
1.495 -
1.496 - default:
1.497 - val |= LCD_CTRL_BPP_16; /* default to 16bpp */
1.498 - break;
1.499 - }
1.500 -
1.501 - /* Set various configuration registers for the panel. */
1.502 -
1.503 - switch (mode) {
1.504 - case MODE_STN_MONO_DUAL:
1.505 - case MODE_STN_COLOR_DUAL:
1.506 - val |= jz_lcd_stn_init(jzfb->h >> 1, vid);
1.507 - break;
1.508 -
1.509 - case MODE_STN_MONO_SINGLE:
1.510 - case MODE_STN_COLOR_SINGLE:
1.511 - val |= jz_lcd_stn_init(jzfb->h, vid);
1.512 - break;
1.513 -
1.514 - case MODE_TFT_GEN:
1.515 - case MODE_TFT_CASIO:
1.516 - case MODE_8BIT_SERIAL_TFT:
1.517 - case MODE_TFT_18BIT:
1.518 - jz_lcd_tft_init(vid);
1.519 - break;
1.520 -
1.521 - case MODE_TFT_SAMSUNG:
1.522 - jz_lcd_samsung_init(vid);
1.523 - break;
1.524 -
1.525 - case MODE_TFT_SHARP:
1.526 - jz_lcd_sharp_init(vid);
1.527 - break;
1.528 -
1.529 - default:
1.530 - break;
1.531 - }
1.532 -
1.533 - /* Further control register and panel configuration. */
1.534 -
1.535 - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
1.536 - val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
1.537 -
1.538 - lcd_ctrl_set(vid, LCD_CTRL, val);
1.539 - lcd_ctrl_set(vid, LCD_CFG, jzfb->cfg);
1.540 -}
1.541 -
1.542 -/* Set the colour depth. */
1.543 -
1.544 -void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid)
1.545 -{
1.546 - vid->jz_fb->bpp = bpp;
1.547 -}
1.548 -
1.549 -void jz4740_lcd_enable(vidinfo_t *vid)
1.550 -{
1.551 - /* Clear the disable bit (DIS) and set the enable bit (ENA). */
1.552 -
1.553 - lcd_ctrl_set(vid, LCD_CTRL, (lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_DIS) | LCD_CTRL_ENA);
1.554 -}
1.555 -
1.556 -void jz4740_lcd_disable(vidinfo_t *vid)
1.557 -{
1.558 - /* Set the disable bit (DIS). */
1.559 -
1.560 - lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) | LCD_CTRL_DIS);
1.561 -}
1.562 -
1.563 -void jz4740_lcd_quick_disable(vidinfo_t *vid)
1.564 -{
1.565 - /* Clear the enable bit (ENA) for quick disable. */
1.566 -
1.567 - lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_ENA);
1.568 -}