1.1 --- a/pkg/devices/lib/cpm/src/common.cc Sun Sep 17 23:27:45 2023 +0200
1.2 +++ b/pkg/devices/lib/cpm/src/common.cc Sun Sep 17 23:41:57 2023 +0200
1.3 @@ -605,54 +605,12 @@
1.4
1.5
1.6
1.7 -// PLL boilerplate.
1.8 +// PLL functionality.
1.9
1.10 Pll::~Pll()
1.11 {
1.12 }
1.13
1.14 -// Feedback (13-bit) multiplier.
1.15 -
1.16 -uint32_t
1.17 -Pll::get_multiplier(Cpm_regs ®s)
1.18 -{
1.19 - return _divider.get_multiplier(regs);
1.20 -}
1.21 -
1.22 -void
1.23 -Pll::set_multiplier(Cpm_regs ®s, uint32_t multiplier)
1.24 -{
1.25 - _divider.set_multiplier(regs, multiplier);
1.26 -}
1.27 -
1.28 -// Input (6-bit) divider.
1.29 -
1.30 -uint32_t
1.31 -Pll::get_input_divider(Cpm_regs ®s)
1.32 -{
1.33 - return _divider.get_input_divider(regs);
1.34 -}
1.35 -
1.36 -void
1.37 -Pll::set_input_divider(Cpm_regs ®s, uint32_t divider)
1.38 -{
1.39 - _divider.set_input_divider(regs, divider);
1.40 -}
1.41 -
1.42 -// Output (dual 3-bit) dividers.
1.43 -
1.44 -uint32_t
1.45 -Pll::get_output_divider(Cpm_regs ®s)
1.46 -{
1.47 - return _divider.get_output_divider(regs);
1.48 -}
1.49 -
1.50 -void
1.51 -Pll::set_output_divider(Cpm_regs ®s, uint32_t divider)
1.52 -{
1.53 - _divider.set_output_divider(regs, divider);
1.54 -}
1.55 -
1.56 uint32_t
1.57 Pll::get_frequency(Cpm_regs ®s)
1.58 {