1.1 --- a/pkg/devices/lib/cpm/src/jz4780.cc Fri May 22 00:25:28 2020 +0200
1.2 +++ b/pkg/devices/lib/cpm/src/jz4780.cc Sat May 23 16:05:22 2020 +0200
1.3 @@ -796,6 +796,7 @@
1.4 }
1.5
1.6 // NOTE: Compatibility method. Probably needs reviewing.
1.7 +// NOTE: HCLK/AHB0 must be 1.5 (for TFT) or 3 (for STN) times the pixel clock.
1.8
1.9 void
1.10 Cpm_jz4780_chip::set_lcd_frequencies(uint32_t pclk, uint8_t ratio)
1.11 @@ -805,6 +806,7 @@
1.12 }
1.13
1.14 // NOTE: Empty method for compatibility.
1.15 +// NOTE: It could potentially be combined with start_lcd.
1.16
1.17 void
1.18 Cpm_jz4780_chip::update_output_frequency()
1.19 @@ -1083,6 +1085,12 @@
1.20 }
1.21
1.22 void
1.23 +jz4780_cpm_set_lcd_frequencies(void *cpm, uint32_t pclk, uint8_t ratio)
1.24 +{
1.25 + static_cast<Cpm_jz4780_chip *>(cpm)->set_lcd_frequencies(pclk, ratio);
1.26 +}
1.27 +
1.28 +void
1.29 jz4780_cpm_set_mpll_parameters(void *cpm, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider)
1.30 {
1.31 static_cast<Cpm_jz4780_chip *>(cpm)->set_pll_parameters(Pll_control_M, multiplier, in_divider, out_divider);