1.1 --- a/pkg/devices/lib/i2c/include/i2c-jz4730.h Sun Jan 03 17:53:36 2021 +0100
1.2 +++ b/pkg/devices/lib/i2c/include/i2c-jz4730.h Wed Jan 06 00:46:11 2021 +0100
1.3 @@ -39,10 +39,11 @@
1.4 Hw::Register_block<32> _regs;
1.5 Cpm_jz4730_chip *_cpm;
1.6 uint32_t _frequency;
1.7 + l4_cap_idx_t _irq=L4_INVALID_CAP;
1.8
1.9 public:
1.10 I2c_jz4730_channel(l4_addr_t start, Cpm_jz4730_chip *cpm,
1.11 - uint32_t frequency);
1.12 + uint32_t frequency, l4_cap_idx_t irq);
1.13
1.14 void disable();
1.15 void enable();
1.16 @@ -55,20 +56,24 @@
1.17
1.18 // Transaction control.
1.19
1.20 - void set_address(uint8_t address, bool read);
1.21 + bool set_address(uint8_t address, bool read);
1.22
1.23 - void request_next();
1.24 + void clear_next();
1.25 void send_next();
1.26 void signal_last();
1.27
1.28 void start();
1.29 void stop();
1.30
1.31 + bool wait_for_irq(unsigned int timeout);
1.32 +
1.33 // Specific status conditions.
1.34
1.35 + bool busy();
1.36 bool data_valid();
1.37 bool nack();
1.38 bool transferred();
1.39 + bool transferring();
1.40 };
1.41
1.42 // I2C device control.
1.43 @@ -84,7 +89,7 @@
1.44 I2c_jz4730_chip(l4_addr_t start, l4_addr_t end, Cpm_jz4730_chip *cpm,
1.45 uint32_t frequency);
1.46
1.47 - I2c_jz4730_channel *get_channel(uint8_t channel);
1.48 + I2c_jz4730_channel *get_channel(uint8_t channel, l4_cap_idx_t irq);
1.49 };
1.50
1.51 #endif /* __cplusplus */
1.52 @@ -98,7 +103,7 @@
1.53 void *jz4730_i2c_init(l4_addr_t start, l4_addr_t end, void *cpm,
1.54 uint32_t frequency);
1.55
1.56 -void *jz4730_i2c_get_channel(void *i2c, uint8_t channel);
1.57 +void *jz4730_i2c_get_channel(void *i2c, uint8_t channel, l4_cap_idx_t irq);
1.58
1.59 void jz4730_i2c_disable(void *i2c_channel);
1.60