1.1 --- a/pkg/devices/lib/cpm/src/x1600.cc Sun Sep 17 18:41:41 2023 +0200
1.2 +++ b/pkg/devices/lib/cpm/src/x1600.cc Sun Sep 17 19:16:38 2023 +0200
1.3 @@ -236,147 +236,141 @@
1.4
1.5 #define Clocks(...) ((enum Clock_identifiers []) {__VA_ARGS__})
1.6
1.7 -Mux mux_external(Clock_external);
1.8 -
1.9 -Mux mux_pclock(Clock_pclock);
1.10 -
1.11 -Mux mux_ahb2_apb(Clock_ahb2_apb);
1.12 -
1.13 -Mux mux_core(3, Clocks(Clock_none, Clock_main, Clock_pll_M));
1.14 -
1.15 -Mux mux_bus(4, Clocks(Clock_main, Clock_pll_M, Clock_pll_E, Clock_external));
1.16 -
1.17 -Mux mux_dev(3, Clocks(Clock_main, Clock_pll_M, Clock_pll_E));
1.18 -
1.19 -Mux mux_i2s(2, Clocks(Clock_main, Clock_pll_E));
1.20 +static Mux mux_external (Clock_external),
1.21 + mux_pclock (Clock_pclock),
1.22 + mux_ahb2_apb (Clock_ahb2_apb),
1.23 + mux_core (3, Clocks(Clock_none, Clock_main, Clock_pll_M)),
1.24 + mux_bus (4, Clocks(Clock_main, Clock_pll_M, Clock_pll_E, Clock_external)),
1.25 + mux_dev (3, Clocks(Clock_main, Clock_pll_M, Clock_pll_E)),
1.26 + mux_i2s (2, Clocks(Clock_main, Clock_pll_E));
1.27
1.28
1.29
1.30 // Clock instances.
1.31
1.32 -Clock clock_ahb2_apb(Source(mux_core, Clock_source_hclock2));
1.33 -
1.34 -Clock clock_can0(Source(mux_bus, Clock_source_can0),
1.35 - Control(Clock_gate_can0, Clock_change_enable_can0, Clock_busy_can0),
1.36 - Divider(Clock_divider_can0));
1.37 -
1.38 -Clock clock_can1(Source(mux_bus, Clock_source_can1),
1.39 - Control(Clock_gate_can1, Clock_change_enable_can1, Clock_busy_can1),
1.40 - Divider(Clock_divider_can1));
1.41 -
1.42 -Clock clock_cdbus(Source(mux_dev, Clock_source_cdbus),
1.43 - Control(Clock_gate_cdbus, Clock_change_enable_cdbus, Clock_busy_cdbus),
1.44 - Divider(Clock_divider_cdbus));
1.45 -
1.46 -Clock clock_cim(Source(mux_dev, Clock_source_cim),
1.47 - Control(Clock_gate_cim, Clock_change_enable_cim, Clock_busy_cim),
1.48 - Divider(Clock_divider_cim));
1.49 -
1.50 -Clock clock_cpu(Source(mux_core, Clock_source_cpu),
1.51 - Control(Field::undefined, Clock_change_enable_cpu, Clock_busy_cpu),
1.52 - Divider(Clock_divider_cpu));
1.53 -
1.54 -Clock clock_ddr(Source(mux_core, Clock_source_ddr),
1.55 - Control(Clock_gate_ddr, Clock_change_enable_ddr, Clock_busy_ddr),
1.56 - Divider(Clock_divider_ddr));
1.57 -
1.58 -Clock clock_dma(Source(mux_pclock), Control(Clock_gate_dma), Divider::undefined);
1.59 -
1.60 -Clock_passive clock_external;
1.61 +static Clock_passive clock_external;
1.62
1.63 -Clock clock_hclock0(Source(mux_core, Clock_source_hclock0),
1.64 - Control(Clock_gate_ahb0, Clock_change_enable_ahb0),
1.65 - Divider(Clock_divider_hclock0));
1.66 -
1.67 -Clock clock_hclock2(Source(mux_ahb2_apb),
1.68 - Control(Clock_gate_apb0, Clock_change_enable_ahb2),
1.69 - Divider(Clock_divider_hclock2));
1.70 -
1.71 -Clock clock_i2c(Source(mux_pclock), Control(Clock_gate_i2c0), Divider::undefined);
1.72 -
1.73 -Clock clock_i2c0(Source(mux_pclock), Control(Clock_gate_i2c0), Divider::undefined);
1.74 -
1.75 -Clock clock_i2c1(Source(mux_pclock), Control(Clock_gate_i2c1), Divider::undefined);
1.76 +static Clock_null clock_none;
1.77
1.78 -Clock_divided_i2s clock_i2s0_rx(Source(mux_i2s, Clock_source_i2s),
1.79 - Control(Clock_gate_i2s0_rx, Clock_change_enable_i2s),
1.80 - Divider_i2s(Clock_divider_i2s0_m, Clock_divider_i2s0_n,
1.81 - Clock_divider_i2s0_d));
1.82 -
1.83 -Clock_divided_i2s clock_i2s0_tx(Source(mux_i2s, Clock_source_i2s),
1.84 - Control(Clock_gate_i2s0_tx, Clock_change_enable_i2s),
1.85 - Divider_i2s(Clock_divider_i2s1_m, Clock_divider_i2s1_n,
1.86 - Clock_divider_i2s1_d));
1.87 -
1.88 -Clock clock_lcd_pixel(Source(mux_dev, Clock_source_lcd),
1.89 - Control(Clock_gate_lcd_pixel, Clock_change_enable_lcd, Clock_busy_lcd),
1.90 - Divider(Clock_divider_lcd));
1.91 -
1.92 -Clock clock_mac(Source(mux_dev, Clock_source_mac),
1.93 - Control(Clock_gate_gmac0, Clock_change_enable_mac, Clock_busy_mac),
1.94 - Divider(Clock_divider_mac));
1.95 +static Clock clock_ahb2_apb(Source(mux_core, Clock_source_hclock2)),
1.96
1.97 -Clock clock_main(Source(mux_core, Clock_source_main),
1.98 - Control(Clock_gate_main));
1.99 -
1.100 -Clock clock_msc(Source(mux_dev, Clock_source_msc0),
1.101 - Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
1.102 - Divider(Clock_divider_msc0));
1.103 -
1.104 -Clock clock_msc0(Source(mux_dev, Clock_source_msc0),
1.105 - Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
1.106 - Divider(Clock_divider_msc0));
1.107 -
1.108 -Clock clock_msc1(Source(mux_dev, Clock_source_msc1),
1.109 - Control(Clock_gate_msc1, Clock_change_enable_msc1, Clock_busy_msc1),
1.110 - Divider(Clock_divider_msc1));
1.111 -
1.112 -Clock_null clock_none;
1.113 -
1.114 -Clock clock_pclock(Source(mux_ahb2_apb),
1.115 - Control(Clock_gate_apb0, Field::undefined, Field::undefined),
1.116 - Divider(Clock_divider_pclock));
1.117 -
1.118 -Pll clock_pll_A(Source(mux_external),
1.119 - Control_pll(Pll_enable_A, Pll_stable_A, Pll_bypass_A),
1.120 - Divider_pll(Pll_multiplier_A, Pll_input_division_A,
1.121 - Pll_output_division0_A, Pll_output_division1_A));
1.122 -
1.123 -Pll clock_pll_E(Source(mux_external),
1.124 - Control_pll(Pll_enable_E, Pll_stable_E, Pll_bypass_E),
1.125 - Divider_pll(Pll_multiplier_E, Pll_input_division_E,
1.126 - Pll_output_division0_E, Pll_output_division1_E));
1.127 + clock_can0(Source(mux_bus, Clock_source_can0),
1.128 + Control(Clock_gate_can0, Clock_change_enable_can0, Clock_busy_can0),
1.129 + Divider(Clock_divider_can0)),
1.130 +
1.131 + clock_can1(Source(mux_bus, Clock_source_can1),
1.132 + Control(Clock_gate_can1, Clock_change_enable_can1, Clock_busy_can1),
1.133 + Divider(Clock_divider_can1)),
1.134 +
1.135 + clock_cdbus(Source(mux_dev, Clock_source_cdbus),
1.136 + Control(Clock_gate_cdbus, Clock_change_enable_cdbus, Clock_busy_cdbus),
1.137 + Divider(Clock_divider_cdbus)),
1.138 +
1.139 + clock_cim(Source(mux_dev, Clock_source_cim),
1.140 + Control(Clock_gate_cim, Clock_change_enable_cim, Clock_busy_cim),
1.141 + Divider(Clock_divider_cim)),
1.142 +
1.143 + clock_cpu(Source(mux_core, Clock_source_cpu),
1.144 + Control(Field::undefined, Clock_change_enable_cpu, Clock_busy_cpu),
1.145 + Divider(Clock_divider_cpu)),
1.146 +
1.147 + clock_ddr(Source(mux_core, Clock_source_ddr),
1.148 + Control(Clock_gate_ddr, Clock_change_enable_ddr, Clock_busy_ddr),
1.149 + Divider(Clock_divider_ddr)),
1.150 +
1.151 + clock_dma(Source(mux_pclock), Control(Clock_gate_dma), Divider::undefined),
1.152 +
1.153 + clock_hclock0(Source(mux_core, Clock_source_hclock0),
1.154 + Control(Clock_gate_ahb0, Clock_change_enable_ahb0),
1.155 + Divider(Clock_divider_hclock0)),
1.156 +
1.157 + clock_hclock2(Source(mux_ahb2_apb),
1.158 + Control(Clock_gate_apb0, Clock_change_enable_ahb2),
1.159 + Divider(Clock_divider_hclock2)),
1.160 +
1.161 + clock_i2c(Source(mux_pclock), Control(Clock_gate_i2c0), Divider::undefined),
1.162 +
1.163 + clock_i2c0(Source(mux_pclock), Control(Clock_gate_i2c0), Divider::undefined),
1.164 +
1.165 + clock_i2c1(Source(mux_pclock), Control(Clock_gate_i2c1), Divider::undefined),
1.166 +
1.167 + clock_lcd_pixel(Source(mux_dev, Clock_source_lcd),
1.168 + Control(Clock_gate_lcd_pixel, Clock_change_enable_lcd, Clock_busy_lcd),
1.169 + Divider(Clock_divider_lcd)),
1.170 +
1.171 + clock_mac(Source(mux_dev, Clock_source_mac),
1.172 + Control(Clock_gate_gmac0, Clock_change_enable_mac, Clock_busy_mac),
1.173 + Divider(Clock_divider_mac)),
1.174 +
1.175 + clock_main(Source(mux_core, Clock_source_main),
1.176 + Control(Clock_gate_main)),
1.177 +
1.178 + clock_msc(Source(mux_dev, Clock_source_msc0),
1.179 + Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
1.180 + Divider(Clock_divider_msc0)),
1.181 +
1.182 + clock_msc0(Source(mux_dev, Clock_source_msc0),
1.183 + Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
1.184 + Divider(Clock_divider_msc0)),
1.185 +
1.186 + clock_msc1(Source(mux_dev, Clock_source_msc1),
1.187 + Control(Clock_gate_msc1, Clock_change_enable_msc1, Clock_busy_msc1),
1.188 + Divider(Clock_divider_msc1)),
1.189 +
1.190 + clock_pclock(Source(mux_ahb2_apb),
1.191 + Control(Clock_gate_apb0, Field::undefined, Field::undefined),
1.192 + Divider(Clock_divider_pclock)),
1.193 +
1.194 + clock_pwm(Source(mux_dev, Clock_source_pwm),
1.195 + Control(Clock_gate_pwm, Clock_change_enable_pwm, Clock_busy_pwm),
1.196 + Divider(Clock_divider_pwm)),
1.197 +
1.198 + clock_pwm0(Source(mux_dev, Clock_source_pwm),
1.199 + Control(Clock_gate_pwm, Clock_change_enable_pwm, Clock_busy_pwm),
1.200 + Divider(Clock_divider_pwm)),
1.201 +
1.202 + clock_sfc(Source(mux_dev, Clock_source_sfc),
1.203 + Control(Clock_gate_sfc, Clock_change_enable_sfc, Clock_busy_sfc),
1.204 + Divider(Clock_divider_sfc)),
1.205 +
1.206 + clock_ssi(Source(mux_dev, Clock_source_ssi),
1.207 + Control(Clock_gate_ssi0, Clock_change_enable_ssi, Clock_busy_ssi),
1.208 + Divider(Clock_divider_ssi)),
1.209 +
1.210 + clock_timer(Source(mux_pclock), Control(Clock_gate_timer), Divider::undefined),
1.211 +
1.212 + clock_uart0(Source(mux_external), Control(Clock_gate_uart0), Divider::undefined),
1.213 +
1.214 + clock_uart1(Source(mux_external), Control(Clock_gate_uart1), Divider::undefined),
1.215 +
1.216 + clock_uart2(Source(mux_external), Control(Clock_gate_uart2), Divider::undefined),
1.217 +
1.218 + clock_uart3(Source(mux_external), Control(Clock_gate_uart3), Divider::undefined);
1.219 +
1.220 +static Clock_divided_i2s clock_i2s0_rx(Source(mux_i2s, Clock_source_i2s),
1.221 + Control(Clock_gate_i2s0_rx, Clock_change_enable_i2s),
1.222 + Divider_i2s(Clock_divider_i2s0_m, Clock_divider_i2s0_n,
1.223 + Clock_divider_i2s0_d)),
1.224
1.225 -Pll clock_pll_M(Source(mux_external),
1.226 - Control_pll(Pll_enable_M, Pll_stable_M, Pll_bypass_M),
1.227 - Divider_pll(Pll_multiplier_M, Pll_input_division_M,
1.228 - Pll_output_division0_M, Pll_output_division1_M));
1.229 + clock_i2s0_tx(Source(mux_i2s, Clock_source_i2s),
1.230 + Control(Clock_gate_i2s0_tx, Clock_change_enable_i2s),
1.231 + Divider_i2s(Clock_divider_i2s1_m, Clock_divider_i2s1_n,
1.232 + Clock_divider_i2s1_d));
1.233
1.234 -Clock clock_pwm(Source(mux_dev, Clock_source_pwm),
1.235 - Control(Clock_gate_pwm, Clock_change_enable_pwm, Clock_busy_pwm),
1.236 - Divider(Clock_divider_pwm));
1.237 -
1.238 -Clock clock_pwm0(Source(mux_dev, Clock_source_pwm),
1.239 - Control(Clock_gate_pwm, Clock_change_enable_pwm, Clock_busy_pwm),
1.240 - Divider(Clock_divider_pwm));
1.241 +static Pll clock_pll_A(Source(mux_external),
1.242 + Control_pll(Pll_enable_A, Pll_stable_A, Pll_bypass_A),
1.243 + Divider_pll(Pll_multiplier_A, Pll_input_division_A,
1.244 + Pll_output_division0_A, Pll_output_division1_A)),
1.245
1.246 -Clock clock_sfc(Source(mux_dev, Clock_source_sfc),
1.247 - Control(Clock_gate_sfc, Clock_change_enable_sfc, Clock_busy_sfc),
1.248 - Divider(Clock_divider_sfc));
1.249 -
1.250 -Clock clock_ssi(Source(mux_dev, Clock_source_ssi),
1.251 - Control(Clock_gate_ssi0, Clock_change_enable_ssi, Clock_busy_ssi),
1.252 - Divider(Clock_divider_ssi));
1.253 + clock_pll_E(Source(mux_external),
1.254 + Control_pll(Pll_enable_E, Pll_stable_E, Pll_bypass_E),
1.255 + Divider_pll(Pll_multiplier_E, Pll_input_division_E,
1.256 + Pll_output_division0_E, Pll_output_division1_E)),
1.257
1.258 -Clock clock_timer(Source(mux_pclock), Control(Clock_gate_timer), Divider::undefined);
1.259 -
1.260 -Clock clock_uart0(Source(mux_external), Control(Clock_gate_uart0), Divider::undefined);
1.261 -
1.262 -Clock clock_uart1(Source(mux_external), Control(Clock_gate_uart1), Divider::undefined);
1.263 -
1.264 -Clock clock_uart2(Source(mux_external), Control(Clock_gate_uart2), Divider::undefined);
1.265 -
1.266 -Clock clock_uart3(Source(mux_external), Control(Clock_gate_uart3), Divider::undefined);
1.267 + clock_pll_M(Source(mux_external),
1.268 + Control_pll(Pll_enable_M, Pll_stable_M, Pll_bypass_M),
1.269 + Divider_pll(Pll_multiplier_M, Pll_input_division_M,
1.270 + Pll_output_division0_M, Pll_output_division1_M));
1.271
1.272
1.273
1.274 @@ -452,6 +446,12 @@
1.275 // register_property("exclk_freq", &exclk_freq);
1.276 }
1.277
1.278 +const char *
1.279 +Cpm_x1600_chip::clock_type(enum Clock_identifiers clock)
1.280 +{
1.281 + return clocks[clock]->clock_type();
1.282 +}
1.283 +
1.284 int
1.285 Cpm_x1600_chip::have_clock(enum Clock_identifiers clock)
1.286 {
1.287 @@ -580,6 +580,12 @@
1.288 return (void *) new Cpm_x1600_chip(cpm_base, 24000000);
1.289 }
1.290
1.291 +const char *
1.292 +x1600_cpm_clock_type(void *cpm, enum Clock_identifiers clock)
1.293 +{
1.294 + return static_cast<Cpm_x1600_chip *>(cpm)->clock_type(clock);
1.295 +}
1.296 +
1.297 int
1.298 x1600_cpm_have_clock(void *cpm, enum Clock_identifiers clock)
1.299 {