1.1 --- a/pkg/devices/lib/dma/include/dma-x1600.h Wed Apr 24 00:47:34 2024 +0200
1.2 +++ b/pkg/devices/lib/dma/include/dma-x1600.h Sat Apr 27 23:46:28 2024 +0200
1.3 @@ -69,11 +69,19 @@
1.4 Dma_request_aic_in = 63,
1.5 };
1.6
1.7 +/* Descriptor structure. */
1.8 +
1.9 +struct x1600_dma_descriptor
1.10 +{
1.11 + uint32_t command, source, destination, transfer_count,
1.12 + stride, request_source, reserved0, reserved1;
1.13 +};
1.14 +
1.15
1.16
1.17 #ifdef __cplusplus
1.18
1.19 -#include <l4/devices/cpm-x1600.h>
1.20 +#include <l4/devices/dma-generic.h>
1.21 #include <l4/devices/hw_mmio_register_block.h>
1.22
1.23 // Forward declaration.
1.24 @@ -84,23 +92,25 @@
1.25
1.26 // DMA channel.
1.27
1.28 -class Dma_x1600_channel
1.29 +class Dma_x1600_channel : public Dma_channel
1.30 {
1.31 private:
1.32 Hw::Register_block<32> _regs;
1.33 - Dma_x1600_chip *_chip;
1.34 + Dma_chip *_chip;
1.35 uint8_t _channel;
1.36 l4_cap_idx_t _irq = L4_INVALID_CAP;
1.37
1.38 public:
1.39 - Dma_x1600_channel(Dma_x1600_chip *chip, uint8_t channel, l4_addr_t start, l4_cap_idx_t irq);
1.40 + Dma_x1600_channel(Dma_chip *chip, uint8_t channel, l4_addr_t start, l4_cap_idx_t irq);
1.41
1.42 unsigned int transfer(uint32_t source, uint32_t destination,
1.43 unsigned int count,
1.44 bool source_increment, bool destination_increment,
1.45 uint8_t source_width, uint8_t destination_width,
1.46 uint8_t transfer_unit_size,
1.47 - enum Dma_x1600_request_type type=Dma_request_auto);
1.48 + int type=Dma_request_auto,
1.49 + l4_addr_t desc_vaddr = 0,
1.50 + l4re_dma_space_dma_addr_t desc_paddr = 0);
1.51
1.52 unsigned int wait();
1.53
1.54 @@ -132,21 +142,21 @@
1.55
1.56 // DMA device control.
1.57
1.58 -class Dma_x1600_chip
1.59 +class Dma_x1600_chip : public Dma_chip
1.60 {
1.61 private:
1.62 Hw::Register_block<32> _regs;
1.63 l4_addr_t _start, _end;
1.64 - Cpm_x1600_chip *_cpm;
1.65 + Cpm_chip *_cpm;
1.66
1.67 public:
1.68 - Dma_x1600_chip(l4_addr_t start, l4_addr_t end, Cpm_x1600_chip *cpm);
1.69 + Dma_x1600_chip(l4_addr_t start, l4_addr_t end, Cpm_chip *cpm);
1.70
1.71 void disable();
1.72
1.73 void enable();
1.74
1.75 - Dma_x1600_channel *get_channel(uint8_t channel, l4_cap_idx_t irq);
1.76 + Dma_channel *get_channel(uint8_t channel, l4_cap_idx_t irq);
1.77
1.78 // Transaction control.
1.79
1.80 @@ -157,8 +167,14 @@
1.81 bool halted();
1.82
1.83 bool have_interrupt(uint8_t channel);
1.84 +
1.85 + // Descriptor operations.
1.86 +
1.87 + void commit_descriptor(uint8_t channel);
1.88 };
1.89
1.90 +Dma_chip *x1600_dma_chip(l4_addr_t start, l4_addr_t end, Cpm_chip *cpm);
1.91 +
1.92 #endif /* __cplusplus */
1.93
1.94