1 /* 2 * Access various peripherals on a board using the X1600. 3 * 4 * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 #include <l4/devices/aic-x1600.h> 23 #include <l4/devices/cpm-x1600.h> 24 #include <l4/devices/dma-x1600.h> 25 #include <l4/devices/gpio-x1600.h> 26 #include <l4/devices/i2c-x1600.h> 27 #include <l4/devices/msc-x1600.h> 28 #include <l4/devices/rtc-x1600.h> 29 #include <l4/devices/spi-gpio.h> 30 #include <l4/devices/spi-hybrid.h> 31 #include <l4/devices/spi-jz4780.h> 32 #include <l4/devices/tcu-x1600.h> 33 #include "common.h" 34 35 36 37 /* AIC adapter functions. */ 38 39 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 40 { 41 return x1600_aic_init(aic_start, start, end, cpm); 42 } 43 44 void *aic_get_channel(void *aic, int num, void *channel) 45 { 46 return x1600_aic_get_channel(aic, num, channel); 47 } 48 49 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 50 uint32_t count, uint32_t sample_rate, 51 uint8_t sample_size) 52 { 53 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 54 } 55 56 57 58 /* CPM adapter functions. */ 59 60 void *cpm_init(l4_addr_t cpm_base) 61 { 62 return x1600_cpm_init(cpm_base); 63 } 64 65 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 66 { 67 return x1600_cpm_clock_type(cpm, clock); 68 } 69 70 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 71 { 72 return x1600_cpm_have_clock(cpm, clock); 73 } 74 75 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 76 { 77 x1600_cpm_start_clock(cpm, clock); 78 } 79 80 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 81 { 82 x1600_cpm_stop_clock(cpm, clock); 83 } 84 85 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 86 uint32_t parameters[]) 87 { 88 return x1600_cpm_get_parameters(cpm, clock, parameters); 89 } 90 91 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 92 int num_parameters, uint32_t parameters[]) 93 { 94 return x1600_cpm_set_parameters(cpm, clock, num_parameters, parameters); 95 } 96 97 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 98 { 99 return x1600_cpm_get_source(cpm, clock); 100 } 101 102 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 103 { 104 x1600_cpm_set_source(cpm, clock, source); 105 } 106 107 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 108 { 109 return x1600_cpm_get_source_clock(cpm, clock); 110 } 111 112 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 113 { 114 x1600_cpm_set_source_clock(cpm, clock, source); 115 } 116 117 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 118 { 119 return x1600_cpm_get_source_frequency(cpm, clock); 120 } 121 122 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 123 { 124 return x1600_cpm_get_frequency(cpm, clock); 125 } 126 127 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 128 { 129 return x1600_cpm_set_frequency(cpm, clock, frequency); 130 } 131 132 133 134 /* DMA adapter functions. */ 135 136 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 137 { 138 return x1600_dma_init(start, end, cpm); 139 } 140 141 void dma_disable(void *dma_chip) 142 { 143 x1600_dma_disable(dma_chip); 144 } 145 146 void dma_enable(void *dma_chip) 147 { 148 x1600_dma_enable(dma_chip); 149 } 150 151 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 152 { 153 return x1600_dma_get_channel(dma, channel, irq); 154 } 155 156 unsigned int dma_transfer(void *dma_channel, 157 uint32_t source, uint32_t destination, 158 unsigned int count, 159 int source_increment, int destination_increment, 160 uint8_t source_width, uint8_t destination_width, 161 uint8_t transfer_unit_size, 162 int type) 163 { 164 return x1600_dma_transfer(dma_channel, source, destination, count, 165 source_increment, destination_increment, 166 source_width, destination_width, 167 transfer_unit_size, type); 168 } 169 170 unsigned int dma_wait(void *dma_channel) 171 { 172 return x1600_dma_wait(dma_channel); 173 } 174 175 176 177 /* GPIO adapter functions. */ 178 179 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 180 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 181 { 182 return x1600_gpio_init(start, end, pins, pull_ups, pull_downs); 183 } 184 185 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 186 { 187 x1600_gpio_setup(gpio, pin, mode, value); 188 } 189 190 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 191 { 192 x1600_gpio_config_pull(gpio, pin, mode); 193 } 194 195 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 196 { 197 x1600_gpio_config_pad(gpio, pin, func, value); 198 } 199 200 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 201 { 202 x1600_gpio_config_get(gpio, pin, reg, value); 203 } 204 205 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 206 { 207 x1600_gpio_config_pad_get(gpio, pin, func, value); 208 } 209 210 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 211 { 212 x1600_gpio_multi_setup(gpio, mask, mode, outvalues); 213 } 214 215 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 216 { 217 x1600_gpio_multi_config_pad(gpio, mask, func, value); 218 } 219 220 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 221 { 222 x1600_gpio_multi_set(gpio, mask, data); 223 } 224 225 unsigned gpio_multi_get(void *gpio, unsigned offset) 226 { 227 return x1600_gpio_multi_get(gpio, offset); 228 } 229 230 int gpio_get(void *gpio, unsigned pin) 231 { 232 return x1600_gpio_get(gpio, pin); 233 } 234 235 void gpio_set(void *gpio, unsigned pin, int value) 236 { 237 x1600_gpio_set(gpio, pin, value); 238 } 239 240 void *gpio_get_irq(void *gpio, unsigned pin) 241 { 242 return x1600_gpio_get_irq(gpio, pin); 243 } 244 245 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 246 { 247 return x1600_gpio_irq_set_mode(gpio_irq, mode); 248 } 249 250 251 252 /* I2C adapter functions. */ 253 254 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 255 uint32_t frequency) 256 { 257 return x1600_i2c_init(start, end, cpm, frequency); 258 } 259 260 void *i2c_get_channel(void *i2c, uint8_t channel) 261 { 262 return x1600_i2c_get_channel(i2c, channel); 263 } 264 265 uint32_t i2c_get_frequency(void *i2c_channel) 266 { 267 return x1600_i2c_get_frequency(i2c_channel); 268 } 269 270 void i2c_set_target(void *i2c_channel, uint8_t addr) 271 { 272 return x1600_i2c_set_target(i2c_channel, addr); 273 } 274 275 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 276 int stop) 277 { 278 x1600_i2c_start_read(i2c_channel, buf, total, stop); 279 } 280 281 void i2c_read(void *i2c_channel) 282 { 283 x1600_i2c_read(i2c_channel); 284 } 285 286 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 287 int stop) 288 { 289 x1600_i2c_start_write(i2c_channel, buf, total, stop); 290 } 291 292 void i2c_write(void *i2c_channel) 293 { 294 x1600_i2c_write(i2c_channel); 295 } 296 297 int i2c_read_done(void *i2c_channel) 298 { 299 return x1600_i2c_read_done(i2c_channel); 300 } 301 302 int i2c_write_done(void *i2c_channel) 303 { 304 return x1600_i2c_write_done(i2c_channel); 305 } 306 307 unsigned int i2c_have_read(void *i2c_channel) 308 { 309 return x1600_i2c_have_read(i2c_channel); 310 } 311 312 unsigned int i2c_have_written(void *i2c_channel) 313 { 314 return x1600_i2c_have_written(i2c_channel); 315 } 316 317 int i2c_failed(void *i2c_channel) 318 { 319 return x1600_i2c_failed(i2c_channel); 320 } 321 322 void i2c_stop(void *i2c_channel) 323 { 324 x1600_i2c_stop(i2c_channel); 325 } 326 327 328 329 /* MSC adapter functions. */ 330 331 void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end, void *cpm) 332 { 333 return x1600_msc_init(msc_start, start, end, cpm); 334 } 335 336 void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) 337 { 338 return x1600_msc_get_channel(msc, channel, irq, dma); 339 } 340 341 struct msc_card *msc_get_cards(void *msc_channel) 342 { 343 return x1600_msc_get_cards(msc_channel); 344 } 345 346 uint8_t msc_num_cards(void *msc_channel) 347 { 348 return x1600_msc_num_cards(msc_channel); 349 } 350 351 void msc_enable(void *msc_channel) 352 { 353 return x1600_msc_enable(msc_channel); 354 } 355 356 uint32_t msc_read_blocks(void *msc_channel, uint8_t card, 357 struct dma_region *region, 358 uint32_t block_address, uint32_t block_count) 359 { 360 return x1600_msc_read_blocks(msc_channel, card, region, block_address, 361 block_count); 362 } 363 364 365 366 /* RTC adapter functions. */ 367 368 void *rtc_init(l4_addr_t start, void *cpm) 369 { 370 return x1600_rtc_init(start, cpm); 371 } 372 373 void rtc_disable(void *rtc) 374 { 375 x1600_rtc_disable(rtc); 376 } 377 378 void rtc_enable(void *rtc) 379 { 380 x1600_rtc_enable(rtc); 381 } 382 383 void rtc_alarm_disable(void *rtc) 384 { 385 x1600_rtc_alarm_disable(rtc); 386 } 387 388 void rtc_alarm_enable(void *rtc) 389 { 390 x1600_rtc_alarm_enable(rtc); 391 } 392 393 uint32_t rtc_get_seconds(void *rtc) 394 { 395 return x1600_rtc_get_seconds(rtc); 396 } 397 398 void rtc_set_seconds(void *rtc, uint32_t seconds) 399 { 400 x1600_rtc_set_seconds(rtc, seconds); 401 } 402 403 uint32_t rtc_get_alarm_seconds(void *rtc) 404 { 405 return x1600_rtc_get_alarm_seconds(rtc); 406 } 407 408 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 409 { 410 x1600_rtc_set_alarm_seconds(rtc, seconds); 411 } 412 413 void rtc_hibernate(void *rtc) 414 { 415 x1600_rtc_hibernate(rtc); 416 } 417 418 void rtc_power_down(void *rtc) 419 { 420 x1600_rtc_power_down(rtc); 421 } 422 423 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 424 { 425 x1600_rtc_set_regulator(rtc, base, adjustment); 426 } 427 428 429 430 /* SPI adapter functions. */ 431 432 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 433 { 434 return jz4780_spi_init(spi_start, start, end, cpm); 435 } 436 437 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 438 void *control_chip, int control_pin, int control_alt_func) 439 { 440 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 441 442 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 443 } 444 445 void *spi_get_channel_gpio(uint64_t frequency, 446 void *clock_chip, int clock_pin, 447 void *data_chip, int data_pin, 448 void *enable_chip, int enable_pin, 449 void *control_chip, int control_pin) 450 { 451 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 452 data_pin, enable_chip, enable_pin, control_chip, 453 control_pin); 454 455 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 456 } 457 458 void spi_acquire_control(void *channel, int level) 459 { 460 spi_hybrid_acquire_control(channel, level); 461 } 462 463 void spi_release_control(void *channel) 464 { 465 spi_hybrid_release_control(channel); 466 } 467 468 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 469 { 470 spi_hybrid_send(channel, bytes, data); 471 } 472 473 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], uint8_t unit_size, 474 uint8_t char_size, int big_endian) 475 { 476 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 477 } 478 479 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 480 l4re_dma_space_dma_addr_t paddr, uint32_t count, 481 uint8_t unit_size, uint8_t char_size, 482 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 483 { 484 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 485 char_size, desc_vaddr, desc_paddr); 486 } 487 488 489 490 /* TCU adapter functions. */ 491 492 void *tcu_init(l4_addr_t start, l4_addr_t end) 493 { 494 return x1600_tcu_init(start, end); 495 } 496 497 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 498 { 499 return x1600_tcu_get_channel(tcu, channel, irq); 500 } 501 502 void tcu_disable(void *tcu_channel) 503 { 504 x1600_tcu_disable(tcu_channel); 505 } 506 507 void tcu_enable(void *tcu_channel) 508 { 509 x1600_tcu_enable(tcu_channel); 510 } 511 512 int tcu_is_enabled(void *tcu_channel) 513 { 514 return x1600_tcu_is_enabled(tcu_channel); 515 } 516 517 uint8_t tcu_get_clock(void *tcu_channel) 518 { 519 return x1600_tcu_get_clock(tcu_channel); 520 } 521 522 void tcu_set_clock(void *tcu_channel, uint8_t clock) 523 { 524 x1600_tcu_set_clock(tcu_channel, clock); 525 } 526 527 uint32_t tcu_get_prescale(void *tcu_channel) 528 { 529 return x1600_tcu_get_prescale(tcu_channel); 530 } 531 532 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 533 { 534 x1600_tcu_set_prescale(tcu_channel, prescale); 535 } 536 537 uint32_t tcu_get_counter(void *tcu_channel) 538 { 539 return x1600_tcu_get_counter(tcu_channel); 540 } 541 542 void tcu_set_counter(void *tcu_channel, uint32_t value) 543 { 544 x1600_tcu_set_counter(tcu_channel, value); 545 } 546 547 uint8_t tcu_get_count_mode(void *tcu_channel) 548 { 549 return x1600_tcu_get_count_mode(tcu_channel); 550 } 551 552 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 553 { 554 x1600_tcu_set_count_mode(tcu_channel, mode); 555 } 556 557 uint32_t tcu_get_full_data_value(void *tcu_channel) 558 { 559 return x1600_tcu_get_full_data_value(tcu_channel); 560 } 561 562 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 563 { 564 x1600_tcu_set_full_data_value(tcu_channel, value); 565 } 566 567 uint32_t tcu_get_half_data_value(void *tcu_channel) 568 { 569 return x1600_tcu_get_half_data_value(tcu_channel); 570 } 571 572 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 573 { 574 x1600_tcu_set_half_data_value(tcu_channel, value); 575 } 576 577 int tcu_get_full_data_mask(void *tcu_channel) 578 { 579 return x1600_tcu_get_full_data_mask(tcu_channel); 580 } 581 582 void tcu_set_full_data_mask(void *tcu_channel, int masked) 583 { 584 x1600_tcu_set_full_data_mask(tcu_channel, masked); 585 } 586 587 int tcu_get_half_data_mask(void *tcu_channel) 588 { 589 return x1600_tcu_get_half_data_mask(tcu_channel); 590 } 591 592 void tcu_set_half_data_mask(void *tcu_channel, int masked) 593 { 594 x1600_tcu_set_half_data_mask(tcu_channel, masked); 595 } 596 597 int tcu_have_interrupt(void *tcu_channel) 598 { 599 return x1600_tcu_have_interrupt(tcu_channel); 600 } 601 602 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 603 { 604 return x1600_tcu_wait_for_irq(tcu_channel, timeout); 605 } 606 607 608 609 /* Memory regions. */ 610 611 const char *io_memory_regions[] = { 612 [AIC] = "x1600-aic", 613 [CPM] = "x1600-cpm", 614 [DMA] = "x1600-dma", 615 [GPIO] = "x1600-gpio", 616 [I2C] = "x1600-i2c", 617 [MSC] = "x1600-msc", 618 [RTC] = "x1600-rtc", 619 [SSI] = "x1600-ssi", 620 [TCU] = "x1600-tcu", 621 }; 622 623 624 625 /* AIC definitions. */ 626 627 void *aic_channels[] = {NULL}; 628 629 const unsigned int num_aic_channels = 1; 630 631 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 632 633 634 635 /* CPM definitions. */ 636 637 struct clock_info clocks[] = { 638 {"ext", Clock_external, "EXCLK"}, 639 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 640 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 641 {"plla", Clock_pll_A, "PLL A"}, 642 {"plle", Clock_pll_E, "PLL E"}, 643 {"pllm", Clock_pll_M, "PLL M"}, 644 {"main", Clock_main, "Main (SCLK_A)"}, 645 {"cpu", Clock_cpu, "CPU"}, 646 {"l2c", Clock_l2cache, "L2 cache"}, 647 {"ahb0", Clock_hclock0, "AHB0"}, 648 {"ahb2", Clock_hclock2, "AHB2"}, 649 {"apb", Clock_pclock, "APB"}, 650 {"aic", Clock_aic, "AIC"}, 651 {"dma", Clock_dma, "DMA"}, 652 {"lcd0", Clock_lcd_pixel0, "LCD pixel"}, 653 {"msc0", Clock_msc0, "MSC0"}, 654 {"msc1", Clock_msc1, "MSC1"}, 655 {"otg", Clock_otg0, "USB OTG"}, 656 {"i2c0", Clock_i2c0, "I2C0"}, 657 {"i2c1", Clock_i2c1, "I2C1"}, 658 {"i2s0", Clock_i2s0, "I2S0"}, 659 {"i2s1", Clock_i2s1, "I2S1"}, 660 {"i2s0r", Clock_i2s0_rx, "I2S0 RX"}, 661 {"i2s0t", Clock_i2s0_tx, "I2S0 TX"}, 662 {"rtc", Clock_rtc, "RTC"}, 663 {"ssi0", Clock_ssi0, "SSI"}, 664 {"uart0", Clock_uart0, "UART0"}, 665 {"uart1", Clock_uart1, "UART1"}, 666 {"uart2", Clock_uart2, "UART2"}, 667 {"uart3", Clock_uart3, "UART3"}, 668 {"usbphy", Clock_usb_phy, "USB PHY"}, 669 {NULL, Clock_none, NULL}, 670 }; 671 672 673 674 /* DMA definitions. */ 675 676 void *dma_channels[32] = {NULL}; 677 678 const unsigned int num_dma_channels = 32; 679 680 struct dma_region dma_regions[8]; 681 682 const unsigned int num_dma_regions = 8; 683 684 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 685 686 687 688 /* GPIO definitions. */ 689 690 struct gpio_port gpio_ports[] = { 691 {0xffffffff, 0x00000000}, 692 {0xdffbf7bf, 0x00000000}, 693 {0x987e0000, 0x07000007}, 694 {0x0000003f, 0x00000000} 695 }; 696 697 const unsigned int num_gpio_ports = 4; 698 699 const char gpio_port_labels[] = "ABCD"; 700 701 702 703 /* I2C definitions. */ 704 705 void *i2c_channels[] = {NULL, NULL}; 706 707 const unsigned int num_i2c_channels = 2; 708 709 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 710 711 712 713 /* MSC definitions. */ 714 715 void *msc_channels[] = {NULL, NULL}; 716 717 const unsigned int num_msc_channels = 2; 718 719 l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 720 721 722 723 /* SPI definitions. */ 724 725 void *spi_channels[] = {NULL}; 726 727 const unsigned int num_spi_channels = 1; 728 729 730 731 /* TCU definitions. */ 732 733 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 734 735 const unsigned int num_tcu_channels = 8; 736 737 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;