1 /* 2 * Clock identifiers for clock and power management. 3 * 4 * Copyright (C) 2021, 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 #pragma once 23 24 /* Identifiers for controllable "logical" or "abstract" clocks. Operations 25 involving these clocks may operate on multiple "physical" or "specific" 26 clocks. */ 27 28 enum Clock_identifiers 29 { 30 Clock_none, /* not a clock: special value */ 31 32 Clock_aic, 33 Clock_aic_bitclk, 34 Clock_aic_pclk, 35 Clock_can0, 36 Clock_can1, 37 Clock_cdbus, 38 Clock_cim, 39 Clock_cpu, 40 Clock_ddr, 41 Clock_dma, 42 Clock_emac, 43 Clock_external, /* EXCLK */ 44 Clock_external_div, /* EXCLK/128 (JZ4730) or EXCLK/512 (JZ4780) */ 45 Clock_hclock0, /* AHB0 */ 46 Clock_hclock2, /* AHB2 */ 47 Clock_hclock2_pclock, /* AHB2, APB parent clock (JZ4780, X1600) */ 48 Clock_hdmi, 49 Clock_i2c0, 50 Clock_i2c1, 51 Clock_i2c2, 52 Clock_i2c3, 53 Clock_i2c4, 54 Clock_i2s0, 55 Clock_i2s0_rx, 56 Clock_i2s0_tx, 57 Clock_i2s1, 58 Clock_i2s1_rx, 59 Clock_i2s1_tx, 60 Clock_kbc, 61 Clock_l2cache, 62 Clock_lcd, /* LCD peripheral clock */ 63 Clock_lcd_pixel0, 64 Clock_lcd_pixel1, 65 Clock_mac, 66 Clock_main, /* SCLK_A */ 67 Clock_mclock, /* EMC and SDRAM parent clock (JZ4730) */ 68 Clock_mipi_csi, 69 Clock_msc, /* MSC parent clock (JZ4780) */ 70 Clock_msc0, 71 Clock_msc1, 72 Clock_msc2, 73 Clock_nemc, 74 Clock_otg0, 75 Clock_otg1, 76 Clock_pclock, /* APB */ 77 Clock_pcm, 78 Clock_pll, 79 Clock_pll_A, 80 Clock_pll_E, 81 Clock_pll_M, 82 Clock_pll_V, 83 Clock_pwm0, 84 Clock_pwm1, 85 Clock_rtc, /* RTC parent clock */ 86 Clock_rtc_external, /* RTCLK */ 87 Clock_sadc, 88 Clock_scc, 89 Clock_sfc, 90 Clock_ssi, /* SSI parent clock (JZ4780) */ 91 Clock_ssi0, 92 Clock_ssi1, 93 Clock_ssi2, 94 Clock_timer, 95 Clock_uart0, 96 Clock_uart1, 97 Clock_uart2, 98 Clock_uart3, 99 Clock_uart4, 100 Clock_udc, 101 Clock_uhc, 102 Clock_uprt, 103 Clock_usb_phy, 104 Clock_vpu, 105 106 Clock_specific_start, /* not a clock: start of chip-specific clocks */ 107 }; 108 109 // vim: tabstop=2 expandtab shiftwidth=2