Landfall

pkg/landfall-examples/hw_info/jz4780.c

289:3c7cc99ed90f
6 months ago Paul Boddie Widened various address and size values to avoid overflow/truncation issues. Fixed high-capacity card support by changing the initialisation procedure. cpm-library-improvements
     1 /*     2  * Access various peripherals on a board using the JZ4780.     3  *     4  * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk>     5  *     6  * This program is free software; you can redistribute it and/or     7  * modify it under the terms of the GNU General Public License as     8  * published by the Free Software Foundation; either version 2 of     9  * the License, or (at your option) any later version.    10  *    11  * This program is distributed in the hope that it will be useful,    12  * but WITHOUT ANY WARRANTY; without even the implied warranty of    13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the    14  * GNU General Public License for more details.    15  *    16  * You should have received a copy of the GNU General Public License    17  * along with this program; if not, write to the Free Software    18  * Foundation, Inc., 51 Franklin Street, Fifth Floor,    19  * Boston, MA  02110-1301, USA    20  */    21     22 /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S    23          audio over HDMI or via its internal codec to the headphone socket. */    24     25 #include <l4/devices/aic-x1600.h>    26     27 #include <l4/devices/cpm-jz4780.h>    28 #include <l4/devices/dma-jz4780.h>    29 #include <l4/devices/gpio-jz4780.h>    30 #include <l4/devices/i2c-jz4780.h>    31 #include <l4/devices/msc-jz4780.h>    32     33 /* The X1600 RTC functionality is a subset of that in the JZ4780. */    34     35 #include <l4/devices/rtc-x1600.h>    36     37 /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary    38    header provides pins like GPC. */    39     40 #include <l4/devices/spi-gpio.h>    41 #include <l4/devices/spi-hybrid.h>    42 #include <l4/devices/spi-jz4780.h>    43 #include <l4/devices/tcu-jz4780.h>    44 #include "common.h"    45     46     47     48 /* AIC adapter functions. */    49     50 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm)    51 {    52   return x1600_aic_init(aic_start, start, end, cpm);    53 }    54     55 void *aic_get_channel(void *aic, int num, void *channel)    56 {    57   return x1600_aic_get_channel(aic, num, channel);    58 }    59     60 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr,    61                           uint32_t count, uint32_t sample_rate,    62                           uint8_t sample_size)    63 {    64   return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size);    65 }    66     67     68     69 /* CPM adapter functions. */    70     71 void *cpm_init(l4_addr_t cpm_base)    72 {    73   return jz4780_cpm_init(cpm_base);    74 }    75     76 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock)    77 {    78   return jz4780_cpm_clock_type(cpm, clock);    79 }    80     81 int cpm_have_clock(void *cpm, enum Clock_identifiers clock)    82 {    83   return jz4780_cpm_have_clock(cpm, clock);    84 }    85     86 void cpm_start_clock(void *cpm, enum Clock_identifiers clock)    87 {    88   jz4780_cpm_start_clock(cpm, clock);    89 }    90     91 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock)    92 {    93   jz4780_cpm_stop_clock(cpm, clock);    94 }    95     96 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock,    97                        uint32_t parameters[])    98 {    99   return jz4780_cpm_get_parameters(cpm, clock, parameters);   100 }   101    102 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock,   103                        int num_parameters, uint32_t parameters[])   104 {   105   return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters);   106 }   107    108 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock)   109 {   110   return jz4780_cpm_get_source(cpm, clock);   111 }   112    113 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source)   114 {   115   jz4780_cpm_set_source(cpm, clock, source);   116 }   117    118 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock)   119 {   120   return jz4780_cpm_get_source_clock(cpm, clock);   121 }   122    123 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source)   124 {   125   jz4780_cpm_set_source_clock(cpm, clock, source);   126 }   127    128 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock)   129 {   130   return jz4780_cpm_get_source_frequency(cpm, clock);   131 }   132    133 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock)   134 {   135   return jz4780_cpm_get_frequency(cpm, clock);   136 }   137    138 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency)   139 {   140   return jz4780_cpm_set_frequency(cpm, clock, frequency);   141 }   142    143    144    145 /* DMA adapter functions. */   146    147 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm)   148 {   149   return jz4780_dma_init(start, end, cpm);   150 }   151    152 void dma_disable(void *dma_chip)   153 {   154   jz4780_dma_disable(dma_chip);   155 }   156    157 void dma_enable(void *dma_chip)   158 {   159   jz4780_dma_enable(dma_chip);   160 }   161    162 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq)   163 {   164   return jz4780_dma_get_channel(dma, channel, irq);   165 }   166    167 unsigned int dma_transfer(void *dma_channel,   168                           uint32_t source, uint32_t destination,   169                           unsigned int count,   170                           int source_increment, int destination_increment,   171                           uint8_t source_width, uint8_t destination_width,   172                           uint8_t transfer_unit_size,   173                           int type)   174 {   175   return jz4780_dma_transfer(dma_channel, source, destination, count,   176                              source_increment, destination_increment,   177                              source_width, destination_width,   178                              transfer_unit_size, type);   179 }   180    181 unsigned int dma_wait(void *dma_channel)   182 {   183   return jz4780_dma_wait(dma_channel);   184 }   185    186    187    188 /* GPIO adapter functions. */   189    190 void *gpio_init(l4_addr_t start, uint8_t port_number)   191 {   192   return jz4780_gpio_init(start, port_number);   193 }   194    195 void *gpio_init_shadow(l4_addr_t start, uint8_t port_number)   196 {   197   return jz4780_gpio_init(start, port_number);   198 }   199    200 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value)   201 {   202   jz4780_gpio_setup(gpio, pin, mode, value);   203 }   204    205 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode)   206 {   207   jz4780_gpio_config_pull(gpio, pin, mode);   208 }   209    210 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value)   211 {   212   jz4780_gpio_config_pad(gpio, pin, func, value);   213 }   214    215 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value)   216 {   217   jz4780_gpio_config_get(gpio, pin, reg, value);   218 }   219    220 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value)   221 {   222   jz4780_gpio_config_pad_get(gpio, pin, func, value);   223 }   224    225 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues)   226 {   227   jz4780_gpio_multi_setup(gpio, mask, mode, outvalues);   228 }   229    230 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value)   231 {   232   jz4780_gpio_multi_config_pad(gpio, mask, func, value);   233 }   234    235 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data)   236 {   237   jz4780_gpio_multi_set(gpio, mask, data);   238 }   239    240 unsigned gpio_multi_get(void *gpio, unsigned offset)   241 {   242   return jz4780_gpio_multi_get(gpio, offset);   243 }   244    245 int gpio_get(void *gpio, unsigned pin)   246 {   247   return jz4780_gpio_get(gpio, pin);   248 }   249    250 void gpio_set(void *gpio, unsigned pin, int value)   251 {   252   jz4780_gpio_set(gpio, pin, value);   253 }   254    255 void *gpio_get_irq(void *gpio, unsigned pin)   256 {   257   return jz4780_gpio_get_irq(gpio, pin);   258 }   259    260 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode)   261 {   262   return jz4780_gpio_irq_set_mode(gpio_irq, mode);   263 }   264    265    266    267 /* I2C adapter functions. */   268    269 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm,   270                uint32_t frequency)   271 {   272   return jz4780_i2c_init(start, end, cpm, frequency);   273 }   274    275 void *i2c_get_channel(void *i2c, uint8_t channel)   276 {   277   return jz4780_i2c_get_channel(i2c, channel);   278 }   279    280 uint32_t i2c_get_frequency(void *i2c_channel)   281 {   282   return jz4780_i2c_get_frequency(i2c_channel);   283 }   284    285 void i2c_set_target(void *i2c_channel, uint8_t addr)   286 {   287   return jz4780_i2c_set_target(i2c_channel, addr);   288 }   289    290 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total,   291                     int stop)   292 {   293   jz4780_i2c_start_read(i2c_channel, buf, total, stop);   294 }   295    296 void i2c_read(void *i2c_channel)   297 {   298   jz4780_i2c_read(i2c_channel);   299 }   300    301 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total,   302                      int stop)   303 {   304   jz4780_i2c_start_write(i2c_channel, buf, total, stop);   305 }   306    307 void i2c_write(void *i2c_channel)   308 {   309   jz4780_i2c_write(i2c_channel);   310 }   311    312 int i2c_read_done(void *i2c_channel)   313 {   314   return jz4780_i2c_read_done(i2c_channel);   315 }   316    317 int i2c_write_done(void *i2c_channel)   318 {   319   return jz4780_i2c_write_done(i2c_channel);   320 }   321    322 unsigned int i2c_have_read(void *i2c_channel)   323 {   324   return jz4780_i2c_have_read(i2c_channel);   325 }   326    327 unsigned int i2c_have_written(void *i2c_channel)   328 {   329   return jz4780_i2c_have_written(i2c_channel);   330 }   331    332 int i2c_failed(void *i2c_channel)   333 {   334   return jz4780_i2c_failed(i2c_channel);   335 }   336    337 void i2c_stop(void *i2c_channel)   338 {   339   jz4780_i2c_stop(i2c_channel);   340 }   341    342    343    344 /* MSC adapter functions. */   345    346 void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end, void *cpm)   347 {   348   return jz4780_msc_init(msc_start, start, end, cpm);   349 }   350    351 void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma)   352 {   353   return jz4780_msc_get_channel(msc, channel, irq, dma);   354 }   355    356 struct msc_card *msc_get_cards(void *msc_channel)   357 {   358   return jz4780_msc_get_cards(msc_channel);   359 }   360    361 uint8_t msc_num_cards(void *msc_channel)   362 {   363   return jz4780_msc_num_cards(msc_channel);   364 }   365    366 void msc_enable(void *msc_channel)   367 {   368   jz4780_msc_enable(msc_channel);   369 }   370    371 uint32_t msc_read_blocks(void *msc_channel, uint8_t card,   372                          struct dma_region *region,   373                          uint32_t block_address, uint32_t block_count)   374 {   375   return jz4780_msc_read_blocks(msc_channel, card, region, block_address,   376                                 block_count);   377 }   378    379    380    381 /* RTC adapter functions. */   382    383 void *rtc_init(l4_addr_t start, void *cpm)   384 {   385   /* Ignore the CPM requirement for the JZ4780. */   386    387   (void) cpm;   388   return x1600_rtc_init(start, NULL);   389 }   390    391 void rtc_disable(void *rtc)   392 {   393   x1600_rtc_disable(rtc);   394 }   395    396 void rtc_enable(void *rtc)   397 {   398   x1600_rtc_enable(rtc);   399 }   400    401 void rtc_alarm_disable(void *rtc)   402 {   403   x1600_rtc_alarm_disable(rtc);   404 }   405    406 void rtc_alarm_enable(void *rtc)   407 {   408   x1600_rtc_alarm_enable(rtc);   409 }   410    411 uint32_t rtc_get_seconds(void *rtc)   412 {   413   return x1600_rtc_get_seconds(rtc);   414 }   415    416 void rtc_set_seconds(void *rtc, uint32_t seconds)   417 {   418   x1600_rtc_set_seconds(rtc, seconds);   419 }   420    421 uint32_t rtc_get_alarm_seconds(void *rtc)   422 {   423   return x1600_rtc_get_alarm_seconds(rtc);   424 }   425    426 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds)   427 {   428   x1600_rtc_set_alarm_seconds(rtc, seconds);   429 }   430    431 void rtc_hibernate(void *rtc)   432 {   433   x1600_rtc_hibernate(rtc);   434 }   435    436 void rtc_power_down(void *rtc)   437 {   438   x1600_rtc_power_down(rtc);   439 }   440    441 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment)   442 {   443   x1600_rtc_set_regulator(rtc, base, adjustment);   444 }   445    446    447    448 /* SPI adapter functions. */   449    450 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm)   451 {   452   return jz4780_spi_init(spi_start, start, end, cpm);   453 }   454    455 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency,   456                       void *control_chip, int control_pin, int control_alt_func)   457 {   458   void *ch = jz4780_spi_get_channel(spi, num, channel, frequency);   459    460   return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func);   461 }   462    463 void *spi_get_channel_gpio(uint64_t frequency,   464                            void *clock_chip, int clock_pin,   465                            void *data_chip, int data_pin,   466                            void *enable_chip, int enable_pin,   467                            void *control_chip, int control_pin)   468 {   469   void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip,   470                                   data_pin, enable_chip, enable_pin, control_chip,   471                                   control_pin);   472    473   return spi_hybrid_get_channel(ch, control_chip, control_pin, -1);   474 }   475    476 void spi_acquire_control(void *channel, int level)   477 {   478   spi_hybrid_acquire_control(channel, level);   479 }   480    481 void spi_release_control(void *channel)   482 {   483   spi_hybrid_release_control(channel);   484 }   485    486 void spi_send(void *channel, uint32_t bytes, const uint8_t data[])   487 {   488   spi_hybrid_send(channel, bytes, data);   489 }   490    491 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[],   492                     uint8_t unit_size, uint8_t char_size, int big_endian)   493 {   494   spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian);   495 }   496    497 uint32_t spi_transfer(void *channel, l4_addr_t vaddr,   498                       l4re_dma_space_dma_addr_t paddr, uint32_t count,   499                       uint8_t unit_size, uint8_t char_size,   500                       l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr)   501 {   502   return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size,   503                                         char_size, desc_vaddr, desc_paddr);   504 }   505    506    507    508 /* TCU adapter functions. */   509    510 void *tcu_init(l4_addr_t start, l4_addr_t end)   511 {   512   return jz4780_tcu_init(start, end);   513 }   514    515 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq)   516 {   517   return jz4780_tcu_get_channel(tcu, channel, irq);   518 }   519    520 void tcu_disable(void *tcu_channel)   521 {   522   jz4780_tcu_disable(tcu_channel);   523 }   524    525 void tcu_enable(void *tcu_channel)   526 {   527   jz4780_tcu_enable(tcu_channel);   528 }   529    530 int tcu_is_enabled(void *tcu_channel)   531 {   532   return jz4780_tcu_is_enabled(tcu_channel);   533 }   534    535 uint8_t tcu_get_clock(void *tcu_channel)   536 {   537   return jz4780_tcu_get_clock(tcu_channel);   538 }   539    540 void tcu_set_clock(void *tcu_channel, uint8_t clock)   541 {   542   jz4780_tcu_set_clock(tcu_channel, clock);   543 }   544    545 uint32_t tcu_get_prescale(void *tcu_channel)   546 {   547   return jz4780_tcu_get_prescale(tcu_channel);   548 }   549    550 void tcu_set_prescale(void *tcu_channel, uint32_t prescale)   551 {   552   jz4780_tcu_set_prescale(tcu_channel, prescale);   553 }   554    555 uint32_t tcu_get_counter(void *tcu_channel)   556 {   557   return jz4780_tcu_get_counter(tcu_channel);   558 }   559    560 void tcu_set_counter(void *tcu_channel, uint32_t value)   561 {   562   jz4780_tcu_set_counter(tcu_channel, value);   563 }   564    565 uint8_t tcu_get_count_mode(void *tcu_channel)   566 {   567   return jz4780_tcu_get_count_mode(tcu_channel);   568 }   569    570 void tcu_set_count_mode(void *tcu_channel, uint8_t mode)   571 {   572   jz4780_tcu_set_count_mode(tcu_channel, mode);   573 }   574    575 uint32_t tcu_get_full_data_value(void *tcu_channel)   576 {   577   return jz4780_tcu_get_full_data_value(tcu_channel);   578 }   579    580 void tcu_set_full_data_value(void *tcu_channel, uint32_t value)   581 {   582   jz4780_tcu_set_full_data_value(tcu_channel, value);   583 }   584    585 uint32_t tcu_get_half_data_value(void *tcu_channel)   586 {   587   return jz4780_tcu_get_half_data_value(tcu_channel);   588 }   589    590 void tcu_set_half_data_value(void *tcu_channel, uint32_t value)   591 {   592   jz4780_tcu_set_half_data_value(tcu_channel, value);   593 }   594    595 int tcu_get_full_data_mask(void *tcu_channel)   596 {   597   return jz4780_tcu_get_full_data_mask(tcu_channel);   598 }   599    600 void tcu_set_full_data_mask(void *tcu_channel, int masked)   601 {   602   jz4780_tcu_set_full_data_mask(tcu_channel, masked);   603 }   604    605 int tcu_get_half_data_mask(void *tcu_channel)   606 {   607   return jz4780_tcu_get_half_data_mask(tcu_channel);   608 }   609    610 void tcu_set_half_data_mask(void *tcu_channel, int masked)   611 {   612   jz4780_tcu_set_half_data_mask(tcu_channel, masked);   613 }   614    615 int tcu_have_interrupt(void *tcu_channel)   616 {   617   return jz4780_tcu_have_interrupt(tcu_channel);   618 }   619    620 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout)   621 {   622   return jz4780_tcu_wait_for_irq(tcu_channel, timeout);   623 }   624    625    626    627 /* Memory regions. */   628    629 const char *io_memory_regions[] = {   630   [AIC] = "jz4780-aic",   631   [CPM] = "jz4780-cpm",   632   [DMA] = "jz4780-dma",   633   [GPIO] = "jz4780-gpio",   634   [I2C] = "jz4780-i2c",   635   [MSC] = "jz4780-msc",   636   [RTC] = "jz4780-rtc",   637   [SSI] = "jz4780-ssi",   638   [TCU] = "jz4780-tcu",   639 };   640    641    642    643 /* AIC definitions. */   644    645 void *aic_channels[] = {NULL, NULL};   646    647 const unsigned int num_aic_channels = 2;   648    649 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP};   650    651    652    653 /* CPM definitions. */   654    655 struct clock_info clocks[] = {   656   {"ext",     Clock_external, "EXCLK"},   657   {"ext_512", Clock_external_div, "EXCLK/512"},   658   {"rtc_ext", Clock_rtc_external, "RTCLK"},   659   {"plla",    Clock_pll_A, "PLL A"},   660   {"plle",    Clock_pll_E, "PLL E"},   661   {"pllm",    Clock_pll_M, "PLL M"},   662   {"pllv",    Clock_pll_V, "PLL V"},   663   {"main",    Clock_main, "Main (SCLK_A)"},   664   {"cpu",     Clock_cpu, "CPU"},   665   {"l2c",     Clock_l2cache, "L2 cache"},   666   {"h2p",     Clock_hclock2_pclock, "AHB2/APB"},   667   {"ahb0",    Clock_hclock0, "AHB0"},   668   {"ahb2",    Clock_hclock2, "AHB2"},   669   {"apb",     Clock_pclock, "APB"},   670   {"dma",     Clock_dma, "DMA"},   671   {"hdmi",    Clock_lcd, "HDMI"},   672   {"lcd",     Clock_lcd, "LCD"},   673   {"lcd0",    Clock_lcd_pixel0, "LCD0 pixel"},   674   {"lcd1",    Clock_lcd_pixel1, "LCD1 pixel"},   675   {"msc",     Clock_msc, "MSC"},   676   {"msc0",    Clock_msc0, "MSC0"},   677   {"msc1",    Clock_msc1, "MSC1"},   678   {"msc2",    Clock_msc1, "MSC2"},   679   {"otg0",    Clock_otg0, "USB OTG0"},   680   {"otg1",    Clock_otg1, "USB OTG1"},   681   {"i2c0",    Clock_i2c0, "I2C0"},   682   {"i2c1",    Clock_i2c1, "I2C1"},   683   {"i2c2",    Clock_i2c2, "I2C2"},   684   {"i2c3",    Clock_i2c3, "I2C3"},   685   {"i2c4",    Clock_i2c4, "I2C4"},   686   {"i2s0",    Clock_i2s0, "I2S0"},   687   {"i2s1",    Clock_i2s1, "I2S1"},   688   {"pcm",     Clock_pcm, "PCM"},   689   {"rtc",     Clock_rtc, "RTC"},   690   {"ssi",     Clock_ssi, "SSI"},   691   {"ssi0",    Clock_ssi0, "SSI0"},   692   {"ssi1",    Clock_ssi1, "SSI1"},   693   {"uart0",   Clock_uart0, "UART0"},   694   {"uart1",   Clock_uart1, "UART1"},   695   {"uart2",   Clock_uart2, "UART2"},   696   {"uart3",   Clock_uart3, "UART3"},   697   {"uart4",   Clock_uart4, "UART4"},   698   {"usbphy",  Clock_usb_phy, "USB PHY"},   699   {NULL,      Clock_none, NULL},   700 };   701    702    703    704 /* DMA definitions. */   705    706 void *dma_channels[32] = {NULL};   707    708 const unsigned int num_dma_channels = 32;   709    710 struct dma_region dma_regions[8];   711    712 const unsigned int num_dma_regions = 8;   713    714 l4_cap_idx_t dma_irq = L4_INVALID_CAP;   715    716    717    718 /* GPIO definitions. */   719    720 const unsigned int num_gpio_ports = 6;   721    722 const char gpio_port_labels[] = "ABCDEF";   723    724    725    726 /* I2C definitions. */   727    728 void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL};   729    730 const unsigned int num_i2c_channels = 5;   731    732 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP};   733    734    735    736 /* MSC definitions. */   737    738 void *msc_channels[] = {NULL, NULL, NULL};   739    740 const unsigned int num_msc_channels = 3;   741    742 l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP};   743    744    745    746 /* SPI definitions. */   747    748 void *spi_channels[] = {NULL, NULL};   749    750 const unsigned int num_spi_channels = 2;   751    752    753    754 /* TCU definitions. */   755    756 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL};   757    758 const unsigned int num_tcu_channels = 8;   759 const unsigned int tcu_irq_num = 1;   760    761 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;