Landfall

pkg/devices/lib/cpm/include/cpm-jz4740.h

0:89a1bc19c1fc
2018-05-13 Paul Boddie Added device libraries and programs, configuration files and examples. Also added an installation script and copyright and licensing information.
     1 /*     2  * (c) 2017, 2018 Paul Boddie <paul@boddie.org.uk>     3  *     4  * This program is free software; you can redistribute it and/or     5  * modify it under the terms of the GNU General Public License as     6  * published by the Free Software Foundation; either version 2 of     7  * the License, or (at your option) any later version.     8  *     9  * This program is distributed in the hope that it will be useful,    10  * but WITHOUT ANY WARRANTY; without even the implied warranty of    11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the    12  * GNU General Public License for more details.    13  *    14  * You should have received a copy of the GNU General Public License    15  * along with this program; if not, write to the Free Software    16  * Foundation, Inc., 51 Franklin Street, Fifth Floor,    17  * Boston, MA  02110-1301, USA    18  */    19     20 #pragma once    21     22 #include "cpm.h"    23     24 #include <l4/sys/types.h>    25 #include <stdint.h>    26     27     28     29 #ifdef __cplusplus    30     31 #include <l4/devices/hw_register_block.h>    32     33 /* A simple abstraction for accessing the CPM registers.    34  * A proper device could inherit from Hw::Device and use an    35  * Int_property for _exclk_freq. */    36     37 class Cpm_jz4740_chip : public Cpm_chip    38 {    39 private:    40   Hw::Register_block<32> _regs;    41   uint32_t _exclk_freq;    42     43   int pll_enabled();    44   int pll_bypassed();    45     46 public:    47   Cpm_jz4740_chip(l4_addr_t addr, uint32_t exclk_freq);    48     49   int have_clock();    50   void start_clock();    51     52   int have_pll();    53     54   uint16_t get_multiplier();    55   uint8_t get_input_division();    56   uint8_t get_output_division();    57     58   uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift);    59   uint8_t get_cpu_divider();    60   uint8_t get_hclock_divider();    61   uint8_t get_pclock_divider();    62   uint8_t get_memory_divider();    63   uint8_t get_source_divider();    64     65   uint16_t get_lcd_pixel_divider();    66   uint32_t get_lcd_pixel_frequency();    67     68   void set_lcd_device_divider(uint8_t division);    69   void set_lcd_pixel_divider(uint16_t division);    70   void set_lcd_frequencies(uint32_t pclk, uint8_t ratio);    71     72   void start_lcd();    73   void stop_lcd();    74     75   uint32_t get_pll_frequency();    76   uint32_t get_output_frequency();    77   void update_output_frequency();    78     79   uint32_t get_cpu_frequency();    80   uint32_t get_hclock_frequency();    81   uint32_t get_pclock_frequency();    82   uint32_t get_memory_frequency();    83 };    84     85 #endif /* __cplusplus */    86     87     88     89 /* C language interface. */    90     91 EXTERN_C_BEGIN    92     93 void *jz4740_cpm_init(l4_addr_t cpm_base);    94     95 int jz4740_cpm_have_pll(void *cpm);    96     97 int jz4740_cpm_have_clock(void *cpm);    98 void jz4740_cpm_start_clock(void *cpm);    99    100 void jz4740_cpm_start_lcd(void *cpm);   101 void jz4740_cpm_stop_lcd(void *cpm);   102    103 uint16_t jz4740_cpm_get_lcd_pixel_divider(void *cpm);   104 uint32_t jz4740_cpm_get_lcd_pixel_frequency(void *cpm);   105    106 void jz4740_cpm_set_lcd_frequencies(void *cpm, uint32_t pclk, uint8_t ratio);   107 void jz4740_cpm_update_output_frequency(void *cpm);   108    109 uint32_t jz4740_cpm_get_cpu_frequency(void *cpm);   110 uint32_t jz4740_cpm_get_hclock_frequency(void *cpm);   111 uint32_t jz4740_cpm_get_output_frequency(void *cpm);   112 uint32_t jz4740_cpm_get_pclock_frequency(void *cpm);   113 uint32_t jz4740_cpm_get_memory_frequency(void *cpm);   114    115 EXTERN_C_END