1 /* 2 * (c) 2017, 2018 Paul Boddie <paul@boddie.org.uk> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 17 * Boston, MA 02110-1301, USA 18 */ 19 20 #pragma once 21 22 #include "cpm.h" 23 24 #include <l4/sys/types.h> 25 #include <stdint.h> 26 27 28 29 #ifdef __cplusplus 30 31 #include <l4/devices/hw_register_block.h> 32 33 /* A simple abstraction for accessing the CPM registers. 34 * A proper device could inherit from Hw::Device and use an 35 * Int_property for _exclk_freq and _rtclk_freq. */ 36 37 class Cpm_jz4780_chip : public Cpm_chip 38 { 39 private: 40 Hw::Register_block<32> _regs; 41 uint32_t _exclk_freq, _rtclk_freq; 42 43 // Utility methods. 44 45 uint32_t get_field(uint32_t reg, uint32_t mask, uint8_t shift); 46 void set_field(uint32_t reg, uint32_t mask, uint8_t shift, uint32_t value); 47 uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift); 48 49 // PLL control. 50 51 int have_pll(uint32_t pll_reg); 52 int pll_enabled(uint32_t pll_reg); 53 int pll_bypassed(uint32_t pll_reg); 54 55 // General frequency modifiers. 56 57 uint16_t get_multiplier(uint32_t pll_reg); 58 void set_multiplier(uint32_t pll_reg, uint16_t multiplier); 59 uint8_t get_input_division(uint32_t pll_reg); 60 void set_input_division(uint32_t pll_reg, uint8_t divider); 61 uint8_t get_output_division(uint32_t pll_reg); 62 void set_output_division(uint32_t pll_reg, uint8_t divider); 63 64 // Clock dividers. 65 66 void set_lcd_pixel_divider(uint16_t division); 67 68 // Clock control. 69 70 void _update_i2c(uint8_t channel, int enable); 71 72 // Input frequencies. 73 74 uint32_t get_pll_frequency(uint32_t pll_reg); 75 76 // Clock sources. 77 78 void set_hclock2_source(uint8_t source); 79 void set_lcd_source(uint8_t source); 80 81 public: 82 void set_pclock_source(uint8_t source); 83 Cpm_jz4780_chip(l4_addr_t addr, uint32_t exclk_freq, uint32_t rtclk_freq); 84 85 int have_clock(); 86 void start_clock(); 87 88 // Clock divider values. 89 90 uint8_t get_cpu_divider(); 91 uint8_t get_hclock0_divider(); 92 uint8_t get_hclock2_divider(); 93 uint8_t get_pclock_divider(); 94 uint8_t get_lcd_pixel_divider(); 95 uint8_t get_memory_divider(); 96 97 // Clock control. 98 99 void start_lcd(); 100 void stop_lcd(); 101 102 void start_i2c(uint8_t channel); 103 void stop_i2c(uint8_t channel); 104 105 // Input frequencies. 106 107 uint8_t get_main_source(); 108 uint32_t get_main_frequency(); 109 110 // Clock sources, providing the input frequency. 111 112 uint8_t get_cpu_source(); 113 uint8_t get_hclock0_source(); 114 uint8_t get_hclock2_source(); 115 uint8_t get_lcd_source(); 116 uint8_t get_memory_source(); 117 uint8_t get_pclock_source(); 118 119 uint32_t get_cpu_source_frequency(); 120 uint32_t get_hclock0_source_frequency(); 121 uint32_t get_hclock2_source_frequency(); 122 uint32_t get_lcd_source_frequency(); 123 uint32_t get_memory_source_frequency(); 124 uint32_t get_pclock_source_frequency(); 125 126 // Final, calculated frequencies. 127 128 uint32_t get_cpu_frequency(); 129 uint32_t get_hclock0_frequency(); 130 uint32_t get_hclock2_frequency(); 131 uint32_t get_lcd_pixel_frequency(); 132 uint32_t get_memory_frequency(); 133 uint32_t get_pclock_frequency(); 134 135 uint32_t get_apll_frequency(); 136 uint32_t get_epll_frequency(); 137 uint32_t get_mpll_frequency(); 138 uint32_t get_vpll_frequency(); 139 140 void set_lcd_pixel_frequency(uint32_t pclk); 141 void set_lcd_frequencies(uint32_t pclk, uint8_t multiplier); 142 void set_pll_parameters(uint32_t pll_reg, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider); 143 144 void update_output_frequency(); 145 }; 146 147 #endif /* __cplusplus */ 148 149 150 151 /* C language interface. */ 152 153 EXTERN_C_BEGIN 154 155 void *jz4780_cpm_init(l4_addr_t cpm_base); 156 157 int jz4780_cpm_have_clock(void *cpm); 158 void jz4780_cpm_start_clock(void *cpm); 159 160 void jz4780_cpm_start_lcd(void *cpm); 161 void jz4780_cpm_stop_lcd(void *cpm); 162 163 uint8_t jz4780_cpm_get_cpu_divider(void *cpm); 164 uint8_t jz4780_cpm_get_hclock0_divider(void *cpm); 165 uint8_t jz4780_cpm_get_hclock2_divider(void *cpm); 166 uint8_t jz4780_cpm_get_lcd_pixel_divider(void *cpm); 167 uint8_t jz4780_cpm_get_memory_divider(void *cpm); 168 uint8_t jz4780_cpm_get_pclock_divider(void *cpm); 169 170 uint8_t jz4780_cpm_get_hclock0_source(void *cpm); 171 uint8_t jz4780_cpm_get_hclock2_source(void *cpm); 172 uint8_t jz4780_cpm_get_lcd_source(void *cpm); 173 uint8_t jz4780_cpm_get_memory_source(void *cpm); 174 uint8_t jz4780_cpm_get_pclock_source(void *cpm); 175 176 uint32_t jz4780_cpm_get_hclock0_source_frequency(void *cpm); 177 uint32_t jz4780_cpm_get_hclock2_source_frequency(void *cpm); 178 uint32_t jz4780_cpm_get_lcd_source_frequency(void *cpm); 179 uint32_t jz4780_cpm_get_memory_source_frequency(void *cpm); 180 uint32_t jz4780_cpm_get_pclock_source_frequency(void *cpm); 181 182 void jz4780_cpm_set_pclock_source(void *cpm, uint8_t source); 183 184 uint8_t jz4780_cpm_get_main_source(void *cpm); 185 uint32_t jz4780_cpm_get_main_frequency(void *cpm); 186 187 uint32_t jz4780_cpm_get_cpu_frequency(void *cpm); 188 uint32_t jz4780_cpm_get_hclock0_frequency(void *cpm); 189 uint32_t jz4780_cpm_get_hclock2_frequency(void *cpm); 190 uint32_t jz4780_cpm_get_lcd_pixel_frequency(void *cpm); 191 uint32_t jz4780_cpm_get_memory_frequency(void *cpm); 192 uint32_t jz4780_cpm_get_pclock_frequency(void *cpm); 193 194 uint32_t jz4780_cpm_get_apll_frequency(void *cpm); 195 uint32_t jz4780_cpm_get_epll_frequency(void *cpm); 196 uint32_t jz4780_cpm_get_mpll_frequency(void *cpm); 197 uint32_t jz4780_cpm_get_vpll_frequency(void *cpm); 198 199 void jz4780_cpm_set_lcd_pixel_frequency(void *cpm, uint32_t pclk); 200 void jz4780_cpm_set_mpll_parameters(void *cpm, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider); 201 202 EXTERN_C_END