1 /* 2 * CPM (clock and power management) support for the X1600. 3 * 4 * Copyright (C) 2017, 2018, 2020, 2021, 2023 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 #pragma once 23 24 #include <l4/devices/cpm.h> 25 26 #include <l4/sys/types.h> 27 #include <stdint.h> 28 29 30 31 #ifdef __cplusplus 32 33 #include <l4/devices/hw_register_block.h> 34 35 /* A simple abstraction for accessing the CPM registers. 36 * A proper device could inherit from Hw::Device and use an 37 * Int_property for _exclk_freq. */ 38 39 class Cpm_x1600_chip : public Cpm_chip 40 { 41 private: 42 Hw::Register_block<32> _regs; 43 uint32_t _exclk_freq; 44 45 // Utility methods. 46 47 uint32_t get_field(uint32_t reg, uint32_t mask, uint8_t shift); 48 void set_field(uint32_t reg, uint32_t mask, uint8_t shift, uint32_t value); 49 50 // PLL control. 51 52 int have_pll(uint32_t pll_reg); 53 int pll_enabled(uint32_t pll_reg); 54 int pll_bypassed(uint32_t pll_reg); 55 void pll_disable(uint32_t pll_reg); 56 void pll_enable(uint32_t pll_reg); 57 58 // General frequency modifiers. 59 60 uint16_t get_multiplier(uint32_t pll_reg); 61 void set_multiplier(uint32_t pll_reg, uint16_t multiplier); 62 uint8_t get_input_division(uint32_t pll_reg); 63 void set_input_division(uint32_t pll_reg, uint8_t divider); 64 uint8_t get_output_division(uint32_t pll_reg); 65 void set_output_division(uint32_t pll_reg, uint8_t divider); 66 67 // Input frequencies. 68 69 uint32_t get_pll_frequency(uint32_t pll_reg); 70 uint32_t get_input_frequency(enum Clock_input_identifiers clock); 71 72 // Clock control. 73 74 void change_disable(enum Clock_identifiers clock); 75 void change_enable(enum Clock_identifiers clock); 76 void wait_busy(enum Clock_identifiers clock); 77 78 public: 79 Cpm_x1600_chip(l4_addr_t addr, uint32_t exclk_freq); 80 81 int have_clock(enum Clock_identifiers clock); 82 void start_clock(enum Clock_identifiers clock); 83 void stop_clock(enum Clock_identifiers clock); 84 85 // Clock dividers. 86 87 uint32_t get_divider(enum Clock_identifiers clock); 88 void set_divider(enum Clock_identifiers clock, uint32_t divider); 89 90 // Clock sources. 91 92 uint8_t get_source(enum Clock_identifiers clock); 93 void set_source(enum Clock_identifiers clock, uint8_t source); 94 95 // Source frequencies. 96 97 uint32_t get_source_frequency(enum Clock_identifiers clock); 98 99 // Output clock frequencies. 100 101 uint32_t get_frequency(enum Clock_identifiers clock); 102 void set_frequency(enum Clock_identifiers clock, uint32_t frequency); 103 104 // Other operations. 105 106 void set_pll_parameters(uint32_t pll_reg, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider); 107 }; 108 109 #endif /* __cplusplus */ 110 111 112 113 /* C language interface. */ 114 115 EXTERN_C_BEGIN 116 117 void *x1600_cpm_init(l4_addr_t cpm_base); 118 119 int x1600_cpm_have_clock(void *cpm, enum Clock_identifiers clock); 120 void x1600_cpm_start_clock(void *cpm, enum Clock_identifiers clock); 121 void x1600_cpm_stop_clock(void *cpm, enum Clock_identifiers clock); 122 123 uint32_t x1600_cpm_get_divider(void *cpm, enum Clock_identifiers clock); 124 void x1600_cpm_set_divider(void *cpm, enum Clock_identifiers clock, uint32_t divider); 125 126 uint8_t x1600_cpm_get_source(void *cpm, enum Clock_identifiers clock); 127 void x1600_cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source); 128 129 uint32_t x1600_cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock); 130 131 uint32_t x1600_cpm_get_frequency(void *cpm, enum Clock_identifiers clock); 132 void x1600_cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint32_t frequency); 133 134 void x1600_cpm_set_mpll_parameters(void *cpm, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider); 135 136 EXTERN_C_END