1 /* 2 * Access various peripherals on a board using the JZ4780. 3 * 4 * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S 23 audio over HDMI or via its internal codec to the headphone socket. */ 24 25 #include <l4/devices/aic-x1600.h> 26 27 #include <l4/devices/cpm-jz4780.h> 28 #include <l4/devices/dma-jz4780.h> 29 #include <l4/devices/gpio-jz4780.h> 30 #include <l4/devices/i2c-jz4780.h> 31 32 /* The X1600 RTC functionality is a subset of that in the JZ4780. */ 33 34 #include <l4/devices/rtc-x1600.h> 35 36 /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary 37 header provides pins like GPC. */ 38 39 #include <l4/devices/spi-gpio.h> 40 #include <l4/devices/spi-hybrid.h> 41 #include <l4/devices/spi-jz4780.h> 42 #include <l4/devices/tcu-jz4780.h> 43 #include "common.h" 44 45 46 47 /* AIC adapter functions. */ 48 49 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 50 { 51 return x1600_aic_init(aic_start, start, end, cpm); 52 } 53 54 void *aic_get_channel(void *aic, int num, void *channel) 55 { 56 return x1600_aic_get_channel(aic, num, channel); 57 } 58 59 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 60 uint32_t count, uint32_t sample_rate, 61 uint8_t sample_size) 62 { 63 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 64 } 65 66 67 68 /* CPM adapter functions. */ 69 70 void *cpm_init(l4_addr_t cpm_base) 71 { 72 return jz4780_cpm_init(cpm_base); 73 } 74 75 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 76 { 77 return jz4780_cpm_clock_type(cpm, clock); 78 } 79 80 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 81 { 82 return jz4780_cpm_have_clock(cpm, clock); 83 } 84 85 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 86 { 87 jz4780_cpm_start_clock(cpm, clock); 88 } 89 90 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 91 { 92 jz4780_cpm_stop_clock(cpm, clock); 93 } 94 95 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 96 uint32_t parameters[]) 97 { 98 return jz4780_cpm_get_parameters(cpm, clock, parameters); 99 } 100 101 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 102 int num_parameters, uint32_t parameters[]) 103 { 104 return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters); 105 } 106 107 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 108 { 109 return jz4780_cpm_get_source(cpm, clock); 110 } 111 112 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 113 { 114 jz4780_cpm_set_source(cpm, clock, source); 115 } 116 117 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 118 { 119 return jz4780_cpm_get_source_clock(cpm, clock); 120 } 121 122 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 123 { 124 jz4780_cpm_set_source_clock(cpm, clock, source); 125 } 126 127 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 128 { 129 return jz4780_cpm_get_source_frequency(cpm, clock); 130 } 131 132 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 133 { 134 return jz4780_cpm_get_frequency(cpm, clock); 135 } 136 137 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 138 { 139 return jz4780_cpm_set_frequency(cpm, clock, frequency); 140 } 141 142 143 144 /* DMA adapter functions. */ 145 146 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 147 { 148 return jz4780_dma_init(start, end, cpm); 149 } 150 151 void dma_disable(void *dma_chip) 152 { 153 jz4780_dma_disable(dma_chip); 154 } 155 156 void dma_enable(void *dma_chip) 157 { 158 jz4780_dma_enable(dma_chip); 159 } 160 161 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 162 { 163 return jz4780_dma_get_channel(dma, channel, irq); 164 } 165 166 unsigned int dma_transfer(void *dma_channel, 167 uint32_t source, uint32_t destination, 168 unsigned int count, 169 int source_increment, int destination_increment, 170 uint8_t source_width, uint8_t destination_width, 171 uint8_t transfer_unit_size, 172 int type) 173 { 174 return jz4780_dma_transfer(dma_channel, source, destination, count, 175 source_increment, destination_increment, 176 source_width, destination_width, 177 transfer_unit_size, type); 178 } 179 180 unsigned int dma_wait(void *dma_channel) 181 { 182 return jz4780_dma_wait(dma_channel); 183 } 184 185 186 187 /* GPIO adapter functions. */ 188 189 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 190 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 191 { 192 return jz4780_gpio_init(start, end, pins, pull_ups, pull_downs); 193 } 194 195 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 196 { 197 jz4780_gpio_setup(gpio, pin, mode, value); 198 } 199 200 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 201 { 202 jz4780_gpio_config_pull(gpio, pin, mode); 203 } 204 205 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 206 { 207 jz4780_gpio_config_pad(gpio, pin, func, value); 208 } 209 210 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 211 { 212 jz4780_gpio_config_get(gpio, pin, reg, value); 213 } 214 215 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 216 { 217 jz4780_gpio_config_pad_get(gpio, pin, func, value); 218 } 219 220 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 221 { 222 jz4780_gpio_multi_setup(gpio, mask, mode, outvalues); 223 } 224 225 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 226 { 227 jz4780_gpio_multi_config_pad(gpio, mask, func, value); 228 } 229 230 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 231 { 232 jz4780_gpio_multi_set(gpio, mask, data); 233 } 234 235 unsigned gpio_multi_get(void *gpio, unsigned offset) 236 { 237 return jz4780_gpio_multi_get(gpio, offset); 238 } 239 240 int gpio_get(void *gpio, unsigned pin) 241 { 242 return jz4780_gpio_get(gpio, pin); 243 } 244 245 void gpio_set(void *gpio, unsigned pin, int value) 246 { 247 jz4780_gpio_set(gpio, pin, value); 248 } 249 250 void *gpio_get_irq(void *gpio, unsigned pin) 251 { 252 return jz4780_gpio_get_irq(gpio, pin); 253 } 254 255 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 256 { 257 return jz4780_gpio_irq_set_mode(gpio_irq, mode); 258 } 259 260 261 262 /* I2C adapter functions. */ 263 264 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 265 uint32_t frequency) 266 { 267 return jz4780_i2c_init(start, end, cpm, frequency); 268 } 269 270 void *i2c_get_channel(void *i2c, uint8_t channel) 271 { 272 return jz4780_i2c_get_channel(i2c, channel); 273 } 274 275 uint32_t i2c_get_frequency(void *i2c_channel) 276 { 277 return jz4780_i2c_get_frequency(i2c_channel); 278 } 279 280 void i2c_set_target(void *i2c_channel, uint8_t addr) 281 { 282 return jz4780_i2c_set_target(i2c_channel, addr); 283 } 284 285 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 286 int stop) 287 { 288 jz4780_i2c_start_read(i2c_channel, buf, total, stop); 289 } 290 291 void i2c_read(void *i2c_channel) 292 { 293 jz4780_i2c_read(i2c_channel); 294 } 295 296 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 297 int stop) 298 { 299 jz4780_i2c_start_write(i2c_channel, buf, total, stop); 300 } 301 302 void i2c_write(void *i2c_channel) 303 { 304 jz4780_i2c_write(i2c_channel); 305 } 306 307 int i2c_read_done(void *i2c_channel) 308 { 309 return jz4780_i2c_read_done(i2c_channel); 310 } 311 312 int i2c_write_done(void *i2c_channel) 313 { 314 return jz4780_i2c_write_done(i2c_channel); 315 } 316 317 unsigned int i2c_have_read(void *i2c_channel) 318 { 319 return jz4780_i2c_have_read(i2c_channel); 320 } 321 322 unsigned int i2c_have_written(void *i2c_channel) 323 { 324 return jz4780_i2c_have_written(i2c_channel); 325 } 326 327 int i2c_failed(void *i2c_channel) 328 { 329 return jz4780_i2c_failed(i2c_channel); 330 } 331 332 void i2c_stop(void *i2c_channel) 333 { 334 jz4780_i2c_stop(i2c_channel); 335 } 336 337 338 339 /* RTC adapter functions. */ 340 341 void *rtc_init(l4_addr_t start, void *cpm) 342 { 343 /* Ignore the CPM requirement for the JZ4780. */ 344 345 (void) cpm; 346 return x1600_rtc_init(start, NULL); 347 } 348 349 void rtc_disable(void *rtc) 350 { 351 x1600_rtc_disable(rtc); 352 } 353 354 void rtc_enable(void *rtc) 355 { 356 x1600_rtc_enable(rtc); 357 } 358 359 void rtc_alarm_disable(void *rtc) 360 { 361 x1600_rtc_alarm_disable(rtc); 362 } 363 364 void rtc_alarm_enable(void *rtc) 365 { 366 x1600_rtc_alarm_enable(rtc); 367 } 368 369 uint32_t rtc_get_seconds(void *rtc) 370 { 371 return x1600_rtc_get_seconds(rtc); 372 } 373 374 void rtc_set_seconds(void *rtc, uint32_t seconds) 375 { 376 x1600_rtc_set_seconds(rtc, seconds); 377 } 378 379 uint32_t rtc_get_alarm_seconds(void *rtc) 380 { 381 return x1600_rtc_get_alarm_seconds(rtc); 382 } 383 384 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 385 { 386 x1600_rtc_set_alarm_seconds(rtc, seconds); 387 } 388 389 void rtc_hibernate(void *rtc) 390 { 391 x1600_rtc_hibernate(rtc); 392 } 393 394 void rtc_power_down(void *rtc) 395 { 396 x1600_rtc_power_down(rtc); 397 } 398 399 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 400 { 401 x1600_rtc_set_regulator(rtc, base, adjustment); 402 } 403 404 405 406 /* SPI adapter functions. */ 407 408 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 409 { 410 return jz4780_spi_init(spi_start, start, end, cpm); 411 } 412 413 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 414 void *control_chip, int control_pin, int control_alt_func) 415 { 416 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 417 418 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 419 } 420 421 void *spi_get_channel_gpio(uint64_t frequency, 422 void *clock_chip, int clock_pin, 423 void *data_chip, int data_pin, 424 void *enable_chip, int enable_pin, 425 void *control_chip, int control_pin) 426 { 427 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 428 data_pin, enable_chip, enable_pin, control_chip, 429 control_pin); 430 431 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 432 } 433 434 void spi_acquire_control(void *channel, int level) 435 { 436 spi_hybrid_acquire_control(channel, level); 437 } 438 439 void spi_release_control(void *channel) 440 { 441 spi_hybrid_release_control(channel); 442 } 443 444 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 445 { 446 spi_hybrid_send(channel, bytes, data); 447 } 448 449 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], 450 uint8_t unit_size, uint8_t char_size, int big_endian) 451 { 452 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 453 } 454 455 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 456 l4re_dma_space_dma_addr_t paddr, uint32_t count, 457 uint8_t unit_size, uint8_t char_size, 458 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 459 { 460 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 461 char_size, desc_vaddr, desc_paddr); 462 } 463 464 465 466 /* TCU adapter functions. */ 467 468 void *tcu_init(l4_addr_t start, l4_addr_t end) 469 { 470 return jz4780_tcu_init(start, end); 471 } 472 473 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 474 { 475 return jz4780_tcu_get_channel(tcu, channel, irq); 476 } 477 478 void tcu_disable(void *tcu_channel) 479 { 480 jz4780_tcu_disable(tcu_channel); 481 } 482 483 void tcu_enable(void *tcu_channel) 484 { 485 jz4780_tcu_enable(tcu_channel); 486 } 487 488 int tcu_is_enabled(void *tcu_channel) 489 { 490 return jz4780_tcu_is_enabled(tcu_channel); 491 } 492 493 uint8_t tcu_get_clock(void *tcu_channel) 494 { 495 return jz4780_tcu_get_clock(tcu_channel); 496 } 497 498 void tcu_set_clock(void *tcu_channel, uint8_t clock) 499 { 500 jz4780_tcu_set_clock(tcu_channel, clock); 501 } 502 503 uint32_t tcu_get_prescale(void *tcu_channel) 504 { 505 return jz4780_tcu_get_prescale(tcu_channel); 506 } 507 508 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 509 { 510 jz4780_tcu_set_prescale(tcu_channel, prescale); 511 } 512 513 uint32_t tcu_get_counter(void *tcu_channel) 514 { 515 return jz4780_tcu_get_counter(tcu_channel); 516 } 517 518 void tcu_set_counter(void *tcu_channel, uint32_t value) 519 { 520 jz4780_tcu_set_counter(tcu_channel, value); 521 } 522 523 uint8_t tcu_get_count_mode(void *tcu_channel) 524 { 525 return jz4780_tcu_get_count_mode(tcu_channel); 526 } 527 528 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 529 { 530 jz4780_tcu_set_count_mode(tcu_channel, mode); 531 } 532 533 uint32_t tcu_get_full_data_value(void *tcu_channel) 534 { 535 return jz4780_tcu_get_full_data_value(tcu_channel); 536 } 537 538 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 539 { 540 jz4780_tcu_set_full_data_value(tcu_channel, value); 541 } 542 543 uint32_t tcu_get_half_data_value(void *tcu_channel) 544 { 545 return jz4780_tcu_get_half_data_value(tcu_channel); 546 } 547 548 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 549 { 550 jz4780_tcu_set_half_data_value(tcu_channel, value); 551 } 552 553 int tcu_get_full_data_mask(void *tcu_channel) 554 { 555 return jz4780_tcu_get_full_data_mask(tcu_channel); 556 } 557 558 void tcu_set_full_data_mask(void *tcu_channel, int masked) 559 { 560 jz4780_tcu_set_full_data_mask(tcu_channel, masked); 561 } 562 563 int tcu_get_half_data_mask(void *tcu_channel) 564 { 565 return jz4780_tcu_get_half_data_mask(tcu_channel); 566 } 567 568 void tcu_set_half_data_mask(void *tcu_channel, int masked) 569 { 570 jz4780_tcu_set_half_data_mask(tcu_channel, masked); 571 } 572 573 int tcu_have_interrupt(void *tcu_channel) 574 { 575 return jz4780_tcu_have_interrupt(tcu_channel); 576 } 577 578 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 579 { 580 return jz4780_tcu_wait_for_irq(tcu_channel, timeout); 581 } 582 583 584 585 /* Memory regions. */ 586 587 const char *io_memory_regions[] = { 588 [AIC] = "jz4780-aic", 589 [CPM] = "jz4780-cpm", 590 [DMA] = "jz4780-dma", 591 [GPIO] = "jz4780-gpio", 592 [I2C] = "jz4780-i2c", 593 [RTC] = "jz4780-rtc", 594 [SSI] = "jz4780-ssi", 595 [TCU] = "jz4780-tcu", 596 }; 597 598 599 600 /* AIC definitions. */ 601 602 void *aic_channels[] = {NULL, NULL}; 603 604 const unsigned int num_aic_channels = 2; 605 606 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 607 608 609 610 /* CPM definitions. */ 611 612 struct clock_info clocks[] = { 613 {"ext", Clock_external, "EXCLK"}, 614 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 615 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 616 {"plla", Clock_pll_A, "PLL A"}, 617 {"plle", Clock_pll_E, "PLL E"}, 618 {"pllm", Clock_pll_M, "PLL M"}, 619 {"pllv", Clock_pll_V, "PLL V"}, 620 {"main", Clock_main, "Main (SCLK_A)"}, 621 {"cpu", Clock_cpu, "CPU"}, 622 {"l2c", Clock_l2cache, "L2 cache"}, 623 {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, 624 {"ahb0", Clock_hclock0, "AHB0"}, 625 {"ahb2", Clock_hclock2, "AHB2"}, 626 {"apb", Clock_pclock, "APB"}, 627 {"dma", Clock_dma, "DMA"}, 628 {"hdmi", Clock_lcd, "HDMI"}, 629 {"lcd", Clock_lcd, "LCD"}, 630 {"lcd0", Clock_lcd_pixel0, "LCD0 pixel"}, 631 {"lcd1", Clock_lcd_pixel1, "LCD1 pixel"}, 632 {"msc", Clock_msc, "MSC"}, 633 {"msc0", Clock_msc0, "MSC0"}, 634 {"msc1", Clock_msc1, "MSC1"}, 635 {"msc2", Clock_msc1, "MSC2"}, 636 {"otg0", Clock_otg0, "USB OTG0"}, 637 {"otg1", Clock_otg1, "USB OTG1"}, 638 {"i2c0", Clock_i2c0, "I2C0"}, 639 {"i2c1", Clock_i2c1, "I2C1"}, 640 {"i2c2", Clock_i2c2, "I2C2"}, 641 {"i2c3", Clock_i2c3, "I2C3"}, 642 {"i2c4", Clock_i2c4, "I2C4"}, 643 {"i2s0", Clock_i2s0, "I2S0"}, 644 {"i2s1", Clock_i2s1, "I2S1"}, 645 {"pcm", Clock_pcm, "PCM"}, 646 {"rtc", Clock_rtc, "RTC"}, 647 {"ssi", Clock_ssi, "SSI"}, 648 {"ssi0", Clock_ssi0, "SSI0"}, 649 {"ssi1", Clock_ssi1, "SSI1"}, 650 {"uart0", Clock_uart0, "UART0"}, 651 {"uart1", Clock_uart1, "UART1"}, 652 {"uart2", Clock_uart2, "UART2"}, 653 {"uart3", Clock_uart3, "UART3"}, 654 {"uart4", Clock_uart4, "UART4"}, 655 {"usbphy", Clock_usb_phy, "USB PHY"}, 656 {NULL, Clock_none, NULL}, 657 }; 658 659 660 661 /* DMA definitions. */ 662 663 void *dma_channels[32] = {NULL}; 664 665 const unsigned int num_dma_channels = 32; 666 667 struct dma_region dma_regions[8]; 668 669 const unsigned int num_dma_regions = 8; 670 671 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 672 673 674 675 /* GPIO definitions. */ 676 677 struct gpio_port gpio_ports[] = { 678 {0x3fff00ff, 0x00000000}, 679 {0xfff0f3fc, 0x000f0c03}, 680 {0x0fffffff, 0x00000000}, 681 {0xffff4fff, 0x0000b000}, 682 {0xf0fff37c, 0x00000483}, 683 {0x7fa7f00f, 0x00580ff0}, 684 }; 685 686 const unsigned int num_gpio_ports = 6; 687 688 const char gpio_port_labels[] = "ABCDEF"; 689 690 691 692 /* I2C definitions. */ 693 694 void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL}; 695 696 const unsigned int num_i2c_channels = 5; 697 698 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 699 700 701 702 /* SPI definitions. */ 703 704 void *spi_channels[] = {NULL, NULL}; 705 706 const unsigned int num_spi_channels = 2; 707 708 709 710 /* TCU definitions. */ 711 712 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 713 714 const unsigned int num_tcu_channels = 8; 715 716 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;