1 /* 2 * Access various peripherals on a board using the X1600. 3 * 4 * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 #include <l4/devices/aic-x1600.h> 23 #include <l4/devices/cpm-x1600.h> 24 #include <l4/devices/dma-x1600.h> 25 #include <l4/devices/gpio-x1600.h> 26 #include <l4/devices/i2c-x1600.h> 27 #include <l4/devices/rtc-x1600.h> 28 #include <l4/devices/spi-gpio.h> 29 #include <l4/devices/spi-hybrid.h> 30 #include <l4/devices/spi-jz4780.h> 31 #include <l4/devices/tcu-x1600.h> 32 #include "common.h" 33 34 35 36 /* AIC adapter functions. */ 37 38 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 39 { 40 return x1600_aic_init(aic_start, start, end, cpm); 41 } 42 43 void *aic_get_channel(void *aic, int num, void *channel) 44 { 45 return x1600_aic_get_channel(aic, num, channel); 46 } 47 48 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 49 uint32_t count, uint32_t sample_rate, 50 uint8_t sample_size) 51 { 52 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 53 } 54 55 56 57 /* CPM adapter functions. */ 58 59 void *cpm_init(l4_addr_t cpm_base) 60 { 61 return x1600_cpm_init(cpm_base); 62 } 63 64 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 65 { 66 return x1600_cpm_clock_type(cpm, clock); 67 } 68 69 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 70 { 71 return x1600_cpm_have_clock(cpm, clock); 72 } 73 74 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 75 { 76 x1600_cpm_start_clock(cpm, clock); 77 } 78 79 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 80 { 81 x1600_cpm_stop_clock(cpm, clock); 82 } 83 84 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 85 uint32_t parameters[]) 86 { 87 return x1600_cpm_get_parameters(cpm, clock, parameters); 88 } 89 90 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 91 int num_parameters, uint32_t parameters[]) 92 { 93 return x1600_cpm_set_parameters(cpm, clock, num_parameters, parameters); 94 } 95 96 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 97 { 98 return x1600_cpm_get_source(cpm, clock); 99 } 100 101 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 102 { 103 x1600_cpm_set_source(cpm, clock, source); 104 } 105 106 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 107 { 108 return x1600_cpm_get_source_clock(cpm, clock); 109 } 110 111 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 112 { 113 x1600_cpm_set_source_clock(cpm, clock, source); 114 } 115 116 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 117 { 118 return x1600_cpm_get_source_frequency(cpm, clock); 119 } 120 121 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 122 { 123 return x1600_cpm_get_frequency(cpm, clock); 124 } 125 126 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 127 { 128 return x1600_cpm_set_frequency(cpm, clock, frequency); 129 } 130 131 132 133 /* DMA adapter functions. */ 134 135 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 136 { 137 return x1600_dma_init(start, end, cpm); 138 } 139 140 void dma_disable(void *dma_chip) 141 { 142 x1600_dma_disable(dma_chip); 143 } 144 145 void dma_enable(void *dma_chip) 146 { 147 x1600_dma_enable(dma_chip); 148 } 149 150 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 151 { 152 return x1600_dma_get_channel(dma, channel, irq); 153 } 154 155 unsigned int dma_transfer(void *dma_channel, 156 uint32_t source, uint32_t destination, 157 unsigned int count, 158 int source_increment, int destination_increment, 159 uint8_t source_width, uint8_t destination_width, 160 uint8_t transfer_unit_size, 161 int type) 162 { 163 return x1600_dma_transfer(dma_channel, source, destination, count, 164 source_increment, destination_increment, 165 source_width, destination_width, 166 transfer_unit_size, type); 167 } 168 169 unsigned int dma_wait(void *dma_channel) 170 { 171 return x1600_dma_wait(dma_channel); 172 } 173 174 175 176 /* GPIO adapter functions. */ 177 178 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 179 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 180 { 181 return x1600_gpio_init(start, end, pins, pull_ups, pull_downs); 182 } 183 184 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 185 { 186 x1600_gpio_setup(gpio, pin, mode, value); 187 } 188 189 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 190 { 191 x1600_gpio_config_pull(gpio, pin, mode); 192 } 193 194 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 195 { 196 x1600_gpio_config_pad(gpio, pin, func, value); 197 } 198 199 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 200 { 201 x1600_gpio_config_get(gpio, pin, reg, value); 202 } 203 204 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 205 { 206 x1600_gpio_config_pad_get(gpio, pin, func, value); 207 } 208 209 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 210 { 211 x1600_gpio_multi_setup(gpio, mask, mode, outvalues); 212 } 213 214 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 215 { 216 x1600_gpio_multi_config_pad(gpio, mask, func, value); 217 } 218 219 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 220 { 221 x1600_gpio_multi_set(gpio, mask, data); 222 } 223 224 unsigned gpio_multi_get(void *gpio, unsigned offset) 225 { 226 return x1600_gpio_multi_get(gpio, offset); 227 } 228 229 int gpio_get(void *gpio, unsigned pin) 230 { 231 return x1600_gpio_get(gpio, pin); 232 } 233 234 void gpio_set(void *gpio, unsigned pin, int value) 235 { 236 x1600_gpio_set(gpio, pin, value); 237 } 238 239 void *gpio_get_irq(void *gpio, unsigned pin) 240 { 241 return x1600_gpio_get_irq(gpio, pin); 242 } 243 244 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 245 { 246 return x1600_gpio_irq_set_mode(gpio_irq, mode); 247 } 248 249 250 251 /* I2C adapter functions. */ 252 253 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 254 uint32_t frequency) 255 { 256 return x1600_i2c_init(start, end, cpm, frequency); 257 } 258 259 void *i2c_get_channel(void *i2c, uint8_t channel) 260 { 261 return x1600_i2c_get_channel(i2c, channel); 262 } 263 264 uint32_t i2c_get_frequency(void *i2c_channel) 265 { 266 return x1600_i2c_get_frequency(i2c_channel); 267 } 268 269 void i2c_set_target(void *i2c_channel, uint8_t addr) 270 { 271 return x1600_i2c_set_target(i2c_channel, addr); 272 } 273 274 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 275 int stop) 276 { 277 x1600_i2c_start_read(i2c_channel, buf, total, stop); 278 } 279 280 void i2c_read(void *i2c_channel) 281 { 282 x1600_i2c_read(i2c_channel); 283 } 284 285 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 286 int stop) 287 { 288 x1600_i2c_start_write(i2c_channel, buf, total, stop); 289 } 290 291 void i2c_write(void *i2c_channel) 292 { 293 x1600_i2c_write(i2c_channel); 294 } 295 296 int i2c_read_done(void *i2c_channel) 297 { 298 return x1600_i2c_read_done(i2c_channel); 299 } 300 301 int i2c_write_done(void *i2c_channel) 302 { 303 return x1600_i2c_write_done(i2c_channel); 304 } 305 306 unsigned int i2c_have_read(void *i2c_channel) 307 { 308 return x1600_i2c_have_read(i2c_channel); 309 } 310 311 unsigned int i2c_have_written(void *i2c_channel) 312 { 313 return x1600_i2c_have_written(i2c_channel); 314 } 315 316 int i2c_failed(void *i2c_channel) 317 { 318 return x1600_i2c_failed(i2c_channel); 319 } 320 321 void i2c_stop(void *i2c_channel) 322 { 323 x1600_i2c_stop(i2c_channel); 324 } 325 326 327 328 /* RTC adapter functions. */ 329 330 void *rtc_init(l4_addr_t start, void *cpm) 331 { 332 return x1600_rtc_init(start, cpm); 333 } 334 335 void rtc_disable(void *rtc) 336 { 337 x1600_rtc_disable(rtc); 338 } 339 340 void rtc_enable(void *rtc) 341 { 342 x1600_rtc_enable(rtc); 343 } 344 345 void rtc_alarm_disable(void *rtc) 346 { 347 x1600_rtc_alarm_disable(rtc); 348 } 349 350 void rtc_alarm_enable(void *rtc) 351 { 352 x1600_rtc_alarm_enable(rtc); 353 } 354 355 uint32_t rtc_get_seconds(void *rtc) 356 { 357 return x1600_rtc_get_seconds(rtc); 358 } 359 360 void rtc_set_seconds(void *rtc, uint32_t seconds) 361 { 362 x1600_rtc_set_seconds(rtc, seconds); 363 } 364 365 uint32_t rtc_get_alarm_seconds(void *rtc) 366 { 367 return x1600_rtc_get_alarm_seconds(rtc); 368 } 369 370 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 371 { 372 x1600_rtc_set_alarm_seconds(rtc, seconds); 373 } 374 375 void rtc_hibernate(void *rtc) 376 { 377 x1600_rtc_hibernate(rtc); 378 } 379 380 void rtc_power_down(void *rtc) 381 { 382 x1600_rtc_power_down(rtc); 383 } 384 385 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 386 { 387 x1600_rtc_set_regulator(rtc, base, adjustment); 388 } 389 390 391 392 /* SPI adapter functions. */ 393 394 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 395 { 396 return jz4780_spi_init(spi_start, start, end, cpm); 397 } 398 399 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 400 void *control_chip, int control_pin, int control_alt_func) 401 { 402 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 403 404 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 405 } 406 407 void *spi_get_channel_gpio(uint64_t frequency, 408 void *clock_chip, int clock_pin, 409 void *data_chip, int data_pin, 410 void *enable_chip, int enable_pin, 411 void *control_chip, int control_pin) 412 { 413 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 414 data_pin, enable_chip, enable_pin, control_chip, 415 control_pin); 416 417 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 418 } 419 420 void spi_acquire_control(void *channel, int level) 421 { 422 spi_hybrid_acquire_control(channel, level); 423 } 424 425 void spi_release_control(void *channel) 426 { 427 spi_hybrid_release_control(channel); 428 } 429 430 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 431 { 432 spi_hybrid_send(channel, bytes, data); 433 } 434 435 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], uint8_t unit_size, 436 uint8_t char_size, int big_endian) 437 { 438 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 439 } 440 441 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 442 l4re_dma_space_dma_addr_t paddr, uint32_t count, 443 uint8_t unit_size, uint8_t char_size, 444 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 445 { 446 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 447 char_size, desc_vaddr, desc_paddr); 448 } 449 450 451 452 /* TCU adapter functions. */ 453 454 void *tcu_init(l4_addr_t start, l4_addr_t end) 455 { 456 return x1600_tcu_init(start, end); 457 } 458 459 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 460 { 461 return x1600_tcu_get_channel(tcu, channel, irq); 462 } 463 464 void tcu_disable(void *tcu_channel) 465 { 466 x1600_tcu_disable(tcu_channel); 467 } 468 469 void tcu_enable(void *tcu_channel) 470 { 471 x1600_tcu_enable(tcu_channel); 472 } 473 474 int tcu_is_enabled(void *tcu_channel) 475 { 476 return x1600_tcu_is_enabled(tcu_channel); 477 } 478 479 uint8_t tcu_get_clock(void *tcu_channel) 480 { 481 return x1600_tcu_get_clock(tcu_channel); 482 } 483 484 void tcu_set_clock(void *tcu_channel, uint8_t clock) 485 { 486 x1600_tcu_set_clock(tcu_channel, clock); 487 } 488 489 uint32_t tcu_get_prescale(void *tcu_channel) 490 { 491 return x1600_tcu_get_prescale(tcu_channel); 492 } 493 494 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 495 { 496 x1600_tcu_set_prescale(tcu_channel, prescale); 497 } 498 499 uint32_t tcu_get_counter(void *tcu_channel) 500 { 501 return x1600_tcu_get_counter(tcu_channel); 502 } 503 504 void tcu_set_counter(void *tcu_channel, uint32_t value) 505 { 506 x1600_tcu_set_counter(tcu_channel, value); 507 } 508 509 uint8_t tcu_get_count_mode(void *tcu_channel) 510 { 511 return x1600_tcu_get_count_mode(tcu_channel); 512 } 513 514 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 515 { 516 x1600_tcu_set_count_mode(tcu_channel, mode); 517 } 518 519 uint32_t tcu_get_full_data_value(void *tcu_channel) 520 { 521 return x1600_tcu_get_full_data_value(tcu_channel); 522 } 523 524 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 525 { 526 x1600_tcu_set_full_data_value(tcu_channel, value); 527 } 528 529 uint32_t tcu_get_half_data_value(void *tcu_channel) 530 { 531 return x1600_tcu_get_half_data_value(tcu_channel); 532 } 533 534 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 535 { 536 x1600_tcu_set_half_data_value(tcu_channel, value); 537 } 538 539 int tcu_get_full_data_mask(void *tcu_channel) 540 { 541 return x1600_tcu_get_full_data_mask(tcu_channel); 542 } 543 544 void tcu_set_full_data_mask(void *tcu_channel, int masked) 545 { 546 x1600_tcu_set_full_data_mask(tcu_channel, masked); 547 } 548 549 int tcu_get_half_data_mask(void *tcu_channel) 550 { 551 return x1600_tcu_get_half_data_mask(tcu_channel); 552 } 553 554 void tcu_set_half_data_mask(void *tcu_channel, int masked) 555 { 556 x1600_tcu_set_half_data_mask(tcu_channel, masked); 557 } 558 559 int tcu_have_interrupt(void *tcu_channel) 560 { 561 return x1600_tcu_have_interrupt(tcu_channel); 562 } 563 564 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 565 { 566 return x1600_tcu_wait_for_irq(tcu_channel, timeout); 567 } 568 569 570 571 /* Memory regions. */ 572 573 const char *io_memory_regions[] = { 574 [AIC] = "x1600-aic", 575 [CPM] = "x1600-cpm", 576 [DMA] = "x1600-dma", 577 [GPIO] = "x1600-gpio", 578 [I2C] = "x1600-i2c", 579 [RTC] = "x1600-rtc", 580 [SSI] = "x1600-ssi", 581 [TCU] = "x1600-tcu", 582 }; 583 584 585 586 /* AIC definitions. */ 587 588 void *aic_channels[] = {NULL}; 589 590 const unsigned int num_aic_channels = 1; 591 592 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 593 594 595 596 /* CPM definitions. */ 597 598 struct clock_info clocks[] = { 599 {"ext", Clock_external, "EXCLK"}, 600 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 601 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 602 {"plla", Clock_pll_A, "PLL A"}, 603 {"plle", Clock_pll_E, "PLL E"}, 604 {"pllm", Clock_pll_M, "PLL M"}, 605 {"main", Clock_main, "Main (SCLK_A)"}, 606 {"cpu", Clock_cpu, "CPU"}, 607 {"l2c", Clock_l2cache, "L2 cache"}, 608 {"ahb0", Clock_hclock0, "AHB0"}, 609 {"ahb2", Clock_hclock2, "AHB2"}, 610 {"apb", Clock_pclock, "APB"}, 611 {"aic", Clock_aic, "AIC"}, 612 {"dma", Clock_dma, "DMA"}, 613 {"lcd0", Clock_lcd_pixel0, "LCD pixel"}, 614 {"msc0", Clock_msc0, "MSC0"}, 615 {"msc1", Clock_msc1, "MSC1"}, 616 {"otg", Clock_otg0, "USB OTG"}, 617 {"i2c0", Clock_i2c0, "I2C0"}, 618 {"i2c1", Clock_i2c1, "I2C1"}, 619 {"i2s0", Clock_i2s0, "I2S0"}, 620 {"i2s1", Clock_i2s1, "I2S1"}, 621 {"i2s0r", Clock_i2s0_rx, "I2S0 RX"}, 622 {"i2s0t", Clock_i2s0_tx, "I2S0 TX"}, 623 {"rtc", Clock_rtc, "RTC"}, 624 {"ssi0", Clock_ssi0, "SSI"}, 625 {"uart0", Clock_uart0, "UART0"}, 626 {"uart1", Clock_uart1, "UART1"}, 627 {"uart2", Clock_uart2, "UART2"}, 628 {"uart3", Clock_uart3, "UART3"}, 629 {"usbphy", Clock_usb_phy, "USB PHY"}, 630 {NULL, Clock_none, NULL}, 631 }; 632 633 634 635 /* DMA definitions. */ 636 637 void *dma_channels[32] = {NULL}; 638 639 const unsigned int num_dma_channels = 32; 640 641 struct dma_region dma_regions[8]; 642 643 const unsigned int num_dma_regions = 8; 644 645 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 646 647 648 649 /* GPIO definitions. */ 650 651 struct gpio_port gpio_ports[] = { 652 {0xffffffff, 0x00000000}, 653 {0xdffbf7bf, 0x00000000}, 654 {0x987e0000, 0x07000007}, 655 {0x0000003f, 0x00000000} 656 }; 657 658 const unsigned int num_gpio_ports = 4; 659 660 const char gpio_port_labels[] = "ABCD"; 661 662 663 664 /* I2C definitions. */ 665 666 void *i2c_channels[] = {NULL, NULL}; 667 668 const unsigned int num_i2c_channels = 2; 669 670 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 671 672 673 674 /* SPI definitions. */ 675 676 void *spi_channels[] = {NULL}; 677 678 const unsigned int num_spi_channels = 1; 679 680 681 682 /* TCU definitions. */ 683 684 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 685 686 const unsigned int num_tcu_channels = 8; 687 688 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;